LOG_DEBUG(" ");
+ /* FIXME when halt is requested, make it work somehow... */
+
+ /* Issue some kind of warm reset. */
+ if (target_has_event_action(target, TARGET_EVENT_RESET_ASSERT)) {
+ target_handle_event(target, TARGET_EVENT_RESET_ASSERT);
+ } else if (jtag_get_reset_config() & RESET_HAS_SRST) {
+ /* REVISIT handle "pulls" cases, if there's
+ * hardware that needs them to work.
+ */
+ jtag_add_reset(0, 1);
+ } else {
+ LOG_ERROR("%s: how to reset?", target_name(target));
+ return ERROR_FAIL;
+ }
+
/* registers are now invalid */
register_cache_invalidate(armv7a->armv4_5_common.core_cache);
static int cortex_a8_deassert_reset(struct target *target)
{
+ int retval;
LOG_DEBUG(" ");
- if (target->reset_halt)
- {
- int retval;
- if ((retval = target_halt(target)) != ERROR_OK)
- return retval;
+ /* be certain SRST is off */
+ jtag_add_reset(0, 0);
+
+ retval = cortex_a8_poll(target);
+
+ if (target->reset_halt) {
+ if (target->state != TARGET_HALTED) {
+ LOG_WARNING("%s: ran after reset and before halt ...",
+ target_name(target));
+ if ((retval = target_halt(target)) != ERROR_OK)
+ return retval;
+ }
}
return ERROR_OK;
COMMAND_REGISTRATION_DONE
};
static const struct command_registration cortex_a8_command_handlers[] = {
+ {
+ .chain = arm_command_handlers,
+ },
+ {
+ .chain = armv7a_command_handlers,
+ },
{
.name = "cortex_a8",
.mode = COMMAND_ANY,
COMMAND_REGISTRATION_DONE
};
-static int cortex_a8_register_commands(struct command_context *cmd_ctx)
-{
- armv4_5_register_commands(cmd_ctx);
- armv7a_register_commands(cmd_ctx);
- return register_commands(cmd_ctx, NULL, cortex_a8_command_handlers);
-}
-
struct target_type cortexa8_target = {
.name = "cortex_a8",
.add_watchpoint = NULL,
.remove_watchpoint = NULL,
- .register_commands = cortex_a8_register_commands,
+ .commands = cortex_a8_command_handlers,
.target_create = cortex_a8_target_create,
.init_target = cortex_a8_init_target,
.examine = cortex_a8_examine,