ret = 48;
break;
default:
- LOG_INFO("Unknow physicall address size");
+ LOG_INFO("Unknown physical address size");
break;
}
return ret;
armv8->armv8_mmu.ttbcr = ttbcr;
/*
- * ARM Architecture Reference Manual (ARMv7-A and ARMv7-Redition),
+ * ARM Architecture Reference Manual (ARMv7-A and ARMv7-R edition),
* document # ARM DDI 0406C
*/
armv8->armv8_mmu.ttbr_range[0] = 0xffffffff >> ttbcr_n;
if (retval != ERROR_OK)
goto done;
- /* claaer ttrr1_used and ttbr0_mask */
+ /* clear ttrr1_used and ttbr0_mask */
memset(&armv8->armv8_mmu.ttbr1_used, 0, sizeof(armv8->armv8_mmu.ttbr1_used));
memset(&armv8->armv8_mmu.ttbr0_mask, 0, sizeof(armv8->armv8_mmu.ttbr0_mask));
goto done;
break;
default:
- LOG_ERROR("unknow core state");
+ LOG_ERROR("unknown core state");
retval = ERROR_FAIL;
break;
}
unsigned int argp = 0;
int retval;
- static const Jim_Nvp nvp_ecatch_modes[] = {
+ static const struct jim_nvp nvp_ecatch_modes[] = {
{ .name = "off", .value = 0 },
{ .name = "nsec_el1", .value = (1 << 5) },
{ .name = "nsec_el2", .value = (2 << 5) },
{ .name = "sec_el13", .value = (5 << 1) },
{ .name = NULL, .value = -1 },
};
- const Jim_Nvp *n;
+ const struct jim_nvp *n;
if (CMD_ARGC == 0) {
const char *sec = NULL, *nsec = NULL;
if (retval != ERROR_OK)
return retval;
- n = Jim_Nvp_value2name_simple(nvp_ecatch_modes, edeccr & 0x0f);
+ n = jim_nvp_value2name_simple(nvp_ecatch_modes, edeccr & 0x0f);
if (n->name != NULL)
sec = n->name;
- n = Jim_Nvp_value2name_simple(nvp_ecatch_modes, edeccr & 0xf0);
+ n = jim_nvp_value2name_simple(nvp_ecatch_modes, edeccr & 0xf0);
if (n->name != NULL)
nsec = n->name;
if (sec == NULL || nsec == NULL) {
- LOG_WARNING("Exception Catch: unknown exception catch configuration: EDECCR = %02x", edeccr & 0xff);
+ LOG_WARNING("Exception Catch: unknown exception catch configuration: EDECCR = %02" PRIx32, edeccr & 0xff);
return ERROR_FAIL;
}
}
while (CMD_ARGC > argp) {
- n = Jim_Nvp_name2value_simple(nvp_ecatch_modes, CMD_ARGV[argp]);
+ n = jim_nvp_name2value_simple(nvp_ecatch_modes, CMD_ARGV[argp]);
if (n->name == NULL) {
LOG_ERROR("Unknown option: %s", CMD_ARGV[argp]);
return ERROR_FAIL;
static int armv8_setup_semihosting(struct target *target, int enable)
{
- struct arm *arm = target_to_arm(target);
-
- if (arm->core_state != ARM_STATE_AARCH64) {
- LOG_ERROR("semihosting only supported in AArch64 state\n");
- return ERROR_FAIL;
- }
-
return ERROR_OK;
}
return ERROR_OK;
}
-int armv8_aarch64_state(struct target *target)
+static int armv8_aarch64_state(struct target *target)
{
struct arm *arm = target_to_arm(target);
armv8_show_fault_registers(target);
if (target->debug_reason == DBG_REASON_WATCHPOINT)
- LOG_USER("Watchpoint triggered at PC %#08x",
- (unsigned) armv8->dpm.wp_pc);
+ LOG_USER("Watchpoint triggered at " TARGET_ADDR_FMT, armv8->dpm.wp_addr);
return ERROR_OK;
}