- added ft2232_latency command

[openocd.git] / src / target / arm9tdmi.c

diff --git a/src/target/arm9tdmi.c b/src/target/arm9tdmi.c
index 112926d16ea4960873f4663c7434771c34ca4742..b9b1f953f5f5016a2c5e5479ffe71b181594a876 100644 (file)
--- a/src/target/arm9tdmi.c
+++ b/src/target/arm9tdmi.c
@@ -57,6 +57,8 @@ target_type_t arm9tdmi_target =
        .poll = arm7_9_poll,
        .arch_state = armv4_5_arch_state,
 
+       .target_request_data = arm7_9_target_request_data,
+
        .halt = arm7_9_halt,
        .resume = arm7_9_resume,
        .step = arm7_9_step,
@@ -104,7 +106,7 @@ int arm9tdmi_jtag_error_handler(u8 *in_value, void *priv)
        
        DEBUG("caller: %s", caller);
        
-       return ERROR_OK;
+       return ERROR_JTAG_QUEUE_FAILED;
 }
 
 int arm9tdmi_examine_debug_reason(target_t *target)
@@ -117,7 +119,6 @@ int arm9tdmi_examine_debug_reason(target_t *target)
        if ((target->debug_reason != DBG_REASON_DBGRQ)
                        && (target->debug_reason != DBG_REASON_SINGLESTEP))
        {
-               error_handler_t error_handler;
                scan_field_t fields[3];
                u8 databus[4];
                u8 instructionbus[4];
@@ -156,9 +157,7 @@ int arm9tdmi_examine_debug_reason(target_t *target)
                fields[2].in_handler_priv = NULL;
                
                arm_jtag_scann(&arm7_9->jtag_info, 0x1);
-               error_handler.error_handler = arm9tdmi_jtag_error_handler;
-               error_handler.error_handler_priv = "arm9tdmi_examine_debug_reason";
-               arm_jtag_set_instr(&arm7_9->jtag_info, arm7_9->jtag_info.intest_instr, &error_handler);
+               arm_jtag_set_instr(&arm7_9->jtag_info, arm7_9->jtag_info.intest_instr, NULL);
 
                jtag_add_dr_scan(3, fields, TAP_PD, NULL);
                jtag_execute_queue();
@@ -187,7 +186,6 @@ int arm9tdmi_examine_debug_reason(target_t *target)
 /* put an instruction in the ARM9TDMI pipeline or write the data bus, and optionally read data */
 int arm9tdmi_clock_out(arm_jtag_t *jtag_info, u32 instr, u32 out, u32 *in, int sysspeed)
 {
-       error_handler_t error_handler;
        scan_field_t fields[3];
        u8 out_buf[4];
        u8 instr_buf[4];
@@ -204,10 +202,7 @@ int arm9tdmi_clock_out(arm_jtag_t *jtag_info, u32 instr, u32 out, u32 *in, int s
        jtag_add_end_state(TAP_PD);
        arm_jtag_scann(jtag_info, 0x1);
        
-       error_handler.error_handler = arm9tdmi_jtag_error_handler;
-       error_handler.error_handler_priv = "arm9tdmi_clock_out";
-       
-       arm_jtag_set_instr(jtag_info, jtag_info->intest_instr, &error_handler);
+       arm_jtag_set_instr(jtag_info, jtag_info->intest_instr, NULL);
                
        fields[0].device = jtag_info->chain_pos;
        fields[0].num_bits = 32;
@@ -271,15 +266,11 @@ int arm9tdmi_clock_out(arm_jtag_t *jtag_info, u32 instr, u32 out, u32 *in, int s
 int arm9tdmi_clock_data_in(arm_jtag_t *jtag_info, u32 *in)
 {
        scan_field_t fields[3];
-       error_handler_t error_handler;
 
        jtag_add_end_state(TAP_PD);
        arm_jtag_scann(jtag_info, 0x1);
        
-       error_handler.error_handler = arm9tdmi_jtag_error_handler;
-       error_handler.error_handler_priv = "arm9tdmi_clock_data_in_endianness";
-       
-       arm_jtag_set_instr(jtag_info, jtag_info->intest_instr, &error_handler);
+       arm_jtag_set_instr(jtag_info, jtag_info->intest_instr, NULL);
                
        fields[0].device = jtag_info->chain_pos;
        fields[0].num_bits = 32;
@@ -340,15 +331,11 @@ int arm9tdmi_clock_data_in(arm_jtag_t *jtag_info, u32 *in)
 int arm9tdmi_clock_data_in_endianness(arm_jtag_t *jtag_info, void *in, int size, int be)
 {
        scan_field_t fields[3];
-       error_handler_t error_handler;
        
        jtag_add_end_state(TAP_PD);
        arm_jtag_scann(jtag_info, 0x1);
        
-       error_handler.error_handler = arm9tdmi_jtag_error_handler;
-       error_handler.error_handler_priv = "arm9tdmi_clock_data_in_endianness";
-       
-       arm_jtag_set_instr(jtag_info, jtag_info->intest_instr, &error_handler);
+       arm_jtag_set_instr(jtag_info, jtag_info->intest_instr, NULL);
                
        fields[0].device = jtag_info->chain_pos;
        fields[0].num_bits = 32;
@@ -874,16 +861,10 @@ void arm9tdmi_build_reg_cache(target_t *target)
        (*cache_p)->next = embeddedice_build_reg_cache(target, arm7_9);
        arm7_9->eice_cache = (*cache_p)->next;
 
-       if (arm7_9->has_etm)
-       {
-               (*cache_p)->next->next = etm_build_reg_cache(target, jtag_info, 0);
-               arm7_9->etm_cache = (*cache_p)->next->next;
-       }
-       
-       if (arm7_9->etb)
+       if (arm7_9->etm_ctx)
        {
-               (*cache_p)->next->next->next = etb_build_reg_cache(arm7_9->etb);
-               arm7_9->etb->reg_cache = (*cache_p)->next->next->next;
+               (*cache_p)->next->next = etm_build_reg_cache(target, jtag_info, arm7_9->etm_ctx);
+               arm7_9->etm_ctx->reg_cache = (*cache_p)->next->next;
        }
 }