jtag_set_end_state(TAP_DRPAUSE);
- fields[0].tap = arm7_9->jtag_info.tap;
fields[0].num_bits = 32;
fields[0].out_value = NULL;
fields[0].in_value = databus;
- fields[1].tap = arm7_9->jtag_info.tap;
fields[1].num_bits = 3;
fields[1].out_value = NULL;
fields[1].in_value = &debug_reason;
- fields[2].tap = arm7_9->jtag_info.tap;
fields[2].num_bits = 32;
fields[2].out_value = NULL;
fields[2].in_value = instructionbus;
}
arm_jtag_set_instr(&arm7_9->jtag_info, arm7_9->jtag_info.intest_instr, NULL);
- jtag_add_dr_scan(3, fields, jtag_set_end_state(TAP_DRPAUSE));
+ jtag_add_dr_scan(arm7_9->jtag_info.tap, 3, fields, jtag_set_end_state(TAP_DRPAUSE));
if ((retval = jtag_execute_queue()) != ERROR_OK)
{
return retval;
fields[2].in_value = NULL;
fields[2].out_value = instructionbus;
- jtag_add_dr_scan(3, fields, jtag_set_end_state(TAP_DRPAUSE));
+ jtag_add_dr_scan(arm7_9->jtag_info.tap, 3, fields, jtag_set_end_state(TAP_DRPAUSE));
if (debug_reason & 0x4)
if (debug_reason & 0x2)
arm_jtag_set_instr(jtag_info, jtag_info->intest_instr, NULL);
- fields[0].tap = jtag_info->tap;
fields[0].num_bits = 32;
fields[0].out_value = out_buf;
fields[0].in_value = NULL;
- fields[1].tap = jtag_info->tap;
fields[1].num_bits = 3;
fields[1].out_value = &sysspeed_buf;
fields[1].in_value = NULL;
- fields[2].tap = jtag_info->tap;
fields[2].num_bits = 32;
fields[2].out_value = instr_buf;
fields[2].in_value = NULL;
if (in)
{
fields[0].in_value = (uint8_t *)in;
- jtag_add_dr_scan(3, fields, jtag_get_end_state());
+ jtag_add_dr_scan(jtag_info->tap, 3, fields, jtag_get_end_state());
jtag_add_callback(arm_le_to_h_u32, (jtag_callback_data_t)in);
}
else
{
- jtag_add_dr_scan(3, fields, jtag_get_end_state());
+ jtag_add_dr_scan(jtag_info->tap, 3, fields, jtag_get_end_state());
}
jtag_add_runtest(0, jtag_get_end_state());
arm_jtag_set_instr(jtag_info, jtag_info->intest_instr, NULL);
- fields[0].tap = jtag_info->tap;
fields[0].num_bits = 32;
fields[0].out_value = NULL;
fields[0].in_value = (uint8_t *)in;
- fields[1].tap = jtag_info->tap;
fields[1].num_bits = 3;
fields[1].out_value = NULL;
fields[1].in_value = NULL;
- fields[2].tap = jtag_info->tap;
fields[2].num_bits = 32;
fields[2].out_value = NULL;
fields[2].in_value = NULL;
- jtag_add_dr_scan(3, fields, jtag_get_end_state());
+ jtag_add_dr_scan(jtag_info->tap, 3, fields, jtag_get_end_state());
jtag_add_callback(arm_le_to_h_u32, (jtag_callback_data_t)in);
arm_jtag_set_instr(jtag_info, jtag_info->intest_instr, NULL);
- fields[0].tap = jtag_info->tap;
fields[0].num_bits = 32;
fields[0].out_value = NULL;
jtag_alloc_in_value32(&fields[0]);
- fields[1].tap = jtag_info->tap;
fields[1].num_bits = 3;
fields[1].out_value = NULL;
fields[1].in_value = NULL;
- fields[2].tap = jtag_info->tap;
fields[2].num_bits = 32;
fields[2].out_value = NULL;
fields[2].in_value = NULL;
- jtag_add_dr_scan(3, fields, jtag_get_end_state());
+ jtag_add_dr_scan(jtag_info->tap, 3, fields, jtag_get_end_state());
jtag_add_callback4(arm9endianness, (jtag_callback_data_t)in, (jtag_callback_data_t)size, (jtag_callback_data_t)be, (jtag_callback_data_t)fields[0].in_value);
/* fetch NOP, LDM in EXECUTE stage (1st cycle) */
arm9tdmi_clock_out(jtag_info, ARMV4_5_NOP, 0, NULL, 0);
/* nothing fetched, LDM in EXECUTE stage (2nd cycle) */
- arm9tdmi_clock_out(jtag_info, ARMV4_5_NOP, buf_get_u32(armv4_5->core_cache->reg_list[15].value, 0, 32) | 1, NULL, 0);
+ arm9tdmi_clock_out(jtag_info, ARMV4_5_NOP,
+ buf_get_u32(armv4_5->pc->value, 0, 32) | 1, NULL, 0);
/* nothing fetched, LDM in EXECUTE stage (3rd cycle) */
arm9tdmi_clock_out(jtag_info, ARMV4_5_NOP, 0, NULL, 0);
.target_create = arm9tdmi_target_create,
.init_target = arm9tdmi_init_target,
.examine = arm7_9_examine,
+ .check_reset = arm7_9_check_reset,
};