target: avoid checking for non NULL pointer to free it

[openocd.git] / src / target / arm946e.c

diff --git a/src/target/arm946e.c b/src/target/arm946e.c
index 278a70ca24f0447b82801491fd75fbd9de701efd..8754c861ced25c5affd32f9a8d06aee2aa1e8575 100644 (file)
--- a/src/target/arm946e.c
+++ b/src/target/arm946e.c
@@ -45,7 +45,7 @@
 /**
  * flag to give info about cache manipulation during debug :
  * "0" -       cache lines are invalidated "on the fly", for affected addresses.
- *                     This is prefered from performance point of view.
+ *                     This is preferred from performance point of view.
  * "1" -       cache is invalidated and switched off on debug_entry, and switched back on on restore.
  *                     It is kept off during debugging.
  */
@@ -99,11 +99,21 @@ static int arm946e_target_create(struct target *target, Jim_Interp *interp)
        return ERROR_OK;
 }
 
+static void arm946e_deinit_target(struct target *target)
+{
+       struct arm *arm = target_to_arm(target);
+       struct arm946e_common *arm946e = target_to_arm946(target);
+
+       arm7_9_deinit(target);
+       arm_free_reg_cache(arm);
+       free(arm946e);
+}
+
 static int arm946e_verify_pointer(struct command_invocation *cmd,
        struct arm946e_common *arm946e)
 {
        if (arm946e->common_magic != ARM946E_COMMON_MAGIC) {
-               command_print(cmd->ctx, "target is not an ARM946");
+               command_print(cmd, "target is not an ARM946");
                return ERROR_TARGET_INVALID;
        }
        return ERROR_OK;
@@ -251,7 +261,7 @@ uint32_t arm946e_invalidate_whole_dcache(struct target *target)
         */
        int nb_idx = (csize / (4*8*NB_CACHE_WAYS));     /* gives nb of lines (indexes) in the cache */
 
-       /* Loop for all segmentde (i.e. ways) */
+       /* Loop for all segments (i.e. ways) */
        uint32_t seg;
        for (seg = 0; seg < NB_CACHE_WAYS; seg++) {
                /* Loop for all indexes */
@@ -267,7 +277,11 @@ uint32_t arm946e_invalidate_whole_dcache(struct target *target)
 
                        /* Read dtag */
                        uint32_t dtag;
-                       arm946e_read_cp15(target, 0x16, (uint32_t *) &dtag);
+                       retval = arm946e_read_cp15(target, 0x16, &dtag);
+                       if (retval != ERROR_OK) {
+                               LOG_DEBUG("ERROR reading dtag");
+                               return retval;
+                       }
 
                        /* Check cache line VALID bit */
                        if (!(dtag >> 4 & 0x1))
@@ -321,7 +335,7 @@ int arm946e_post_debug_entry(struct target *target)
 
        /* See if CACHES are enabled, and save that info
         * in the context bits, so that arm946e_pre_restore_context() can use them */
-       arm946e_read_cp15(target, CP15_CTL, (uint32_t *) &ctr_reg);
+       arm946e_read_cp15(target, CP15_CTL, &ctr_reg);
 
        /* Save control reg in the context */
        arm946e->cp15_control_reg = ctr_reg;
@@ -362,7 +376,7 @@ void arm946e_pre_restore_context(struct target *target)
        if (arm946e_preserve_cache) {
                struct arm946e_common *arm946e = target_to_arm946(target);
                /* Get the contents of the CTR reg */
-               arm946e_read_cp15(target, CP15_CTL, (uint32_t *) &ctr_reg);
+               arm946e_read_cp15(target, CP15_CTL, &ctr_reg);
 
                /**
                 * Read-modify-write CP15 control
@@ -410,7 +424,11 @@ uint32_t arm946e_invalidate_dcache(struct target *target, uint32_t address,
                        }
 
                        /* Read dtag */
-                       arm946e_read_cp15(target, 0x16, (uint32_t *) &dtag);
+                       retval = arm946e_read_cp15(target, 0x16, &dtag);
+                       if (retval != ERROR_OK) {
+                               LOG_DEBUG("ERROR reading dtag");
+                               return retval;
+                       }
 
                        /* Check cache line VALID bit */
                        if (!(dtag >> 4 & 0x1))
@@ -463,7 +481,11 @@ uint32_t arm946e_invalidate_icache(struct target *target, uint32_t address,
                        }
 
                        /* Read itag */
-                       arm946e_read_cp15(target, 0x17, (uint32_t *) &itag);
+                       retval = arm946e_read_cp15(target, 0x17, &itag);
+                       if (retval != ERROR_OK) {
+                               LOG_DEBUG("ERROR reading itag");
+                               return retval;
+                       }
 
                        /* Check cache line VALID bit */
                        if (!(itag >> 4 & 0x1))
@@ -563,7 +585,7 @@ COMMAND_HANDLER(arm946e_handle_cp15)
                return retval;
 
        if (target->state != TARGET_HALTED) {
-               command_print(CMD_CTX, "target must be stopped for \"%s\" command", CMD_NAME);
+               command_print(CMD, "target must be stopped for \"%s\" command", CMD_NAME);
                return ERROR_TARGET_NOT_HALTED;
        }
 
@@ -574,7 +596,7 @@ COMMAND_HANDLER(arm946e_handle_cp15)
                uint32_t value;
                retval = arm946e_read_cp15(target, address, &value);
                if (retval != ERROR_OK) {
-                       command_print(CMD_CTX, "%s cp15 reg %" PRIi32 " access failed", target_name(target), address);
+                       command_print(CMD, "%s cp15 reg %" PRIu32 " access failed", target_name(target), address);
                        return retval;
                }
                retval = jtag_execute_queue();
@@ -582,14 +604,14 @@ COMMAND_HANDLER(arm946e_handle_cp15)
                        return retval;
 
                /* Return value in hex format */
-               command_print(CMD_CTX, "0x%08" PRIx32, value);
+               command_print(CMD, "0x%08" PRIx32, value);
        } else if (CMD_ARGC == 2) {
                uint32_t value;
                COMMAND_PARSE_NUMBER(u32, CMD_ARGV[1], value);
 
                retval = arm946e_write_cp15(target, address, value);
                if (retval != ERROR_OK) {
-                       command_print(CMD_CTX, "%s cp15 reg %" PRIi32 " access failed", target_name(target), address);
+                       command_print(CMD, "%s cp15 reg %" PRIu32 " access failed", target_name(target), address);
                        return retval;
                }
                if (address == CP15_CTL)
@@ -613,7 +635,7 @@ COMMAND_HANDLER(arm946e_handle_idcache)
                return retval;
 
        if (target->state != TARGET_HALTED) {
-               command_print(CMD_CTX, "target must be stopped for \"%s\" command", CMD_NAME);
+               command_print(CMD, "target must be stopped for \"%s\" command", CMD_NAME);
                return ERROR_TARGET_NOT_HALTED;
        }
 
@@ -623,9 +645,9 @@ COMMAND_HANDLER(arm946e_handle_idcache)
                bool  bena = ((arm946e->cp15_control_reg & (icache ? CP15_CTL_ICACHE : CP15_CTL_DCACHE)) != 0)
                          && (arm946e->cp15_control_reg & 0x1);
                if (csize == 0)
-                       command_print(CMD_CTX, "%s-cache absent", icache ? "I" : "D");
+                       command_print(CMD, "%s-cache absent", icache ? "I" : "D");
                else
-                       command_print(CMD_CTX, "%s-cache size: %" PRIu32 "K, %s",
+                       command_print(CMD, "%s-cache size: %" PRIu32 "K, %s",
                                      icache ? "I" : "D", csize, bena ? "enabled" : "disabled");
                return ERROR_OK;
        }
@@ -643,7 +665,7 @@ COMMAND_HANDLER(arm946e_handle_idcache)
 
        /* Do not invalidate or change state, if cache is absent */
        if (csize == 0) {
-               command_print(CMD_CTX, "%s-cache absent, '%s' operation undefined", icache ? "I" : "D", CMD_ARGV[0]);
+               command_print(CMD, "%s-cache absent, '%s' operation undefined", icache ? "I" : "D", CMD_ARGV[0]);
                return ERROR_TARGET_RESOURCE_NOT_AVAILABLE;
        }
 
@@ -764,6 +786,7 @@ struct target_type arm946e_target = {
        .commands = arm946e_command_handlers,
        .target_create = arm946e_target_create,
        .init_target = arm9tdmi_init_target,
+       .deinit_target = arm946e_deinit_target,
        .examine = arm7_9_examine,
        .check_reset = arm7_9_check_reset,
 };