bugfix: stack corruption loading IHex images
[openocd.git] / src / target / arm926ejs.c
index 9d2404e44c656ea6c1c00e1cb70ffbd721037810..ef9a4941300dae92e9f5143853632fdc5c64bf54 100644 (file)
@@ -2,6 +2,9 @@
  *   Copyright (C) 2007 by Dominic Rath                                    *
  *   Dominic.Rath@gmx.de                                                   *
  *                                                                         *
+ *   Copyright (C) 2007,2008,2009 by Ã˜yvind Harboe                         *
+ *   oyvind.harboe@zylin.com                                               *
+ *                                                                         *
  *   This program is free software; you can redistribute it and/or modify  *
  *   it under the terms of the GNU General Public License as published by  *
  *   the Free Software Foundation; either version 2 of the License, or     *
 
 /* cli handling */
 int arm926ejs_handle_cp15_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc);
-int arm926ejs_handle_cp15i_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc);
 int arm926ejs_handle_cache_info_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc);
-int arm926ejs_handle_md_phys_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc);
-int arm926ejs_handle_mw_phys_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc);
 
 int arm926ejs_handle_read_cache_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc);
 int arm926ejs_handle_read_mmu_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc);
@@ -44,11 +44,36 @@ int arm926ejs_handle_read_mmu_command(struct command_context_s *cmd_ctx, char *c
 int arm926ejs_target_create(struct target_s *target, Jim_Interp *interp);
 int arm926ejs_init_target(struct command_context_s *cmd_ctx, struct target_s *target);
 int arm926ejs_quit(void);
-int arm926ejs_read_memory(struct target_s *target, uint32_t address, uint32_t size, uint32_t count, uint8_t *buffer);
+
+int arm926ejs_read_phys_memory(struct target_s *target, uint32_t address, uint32_t size, uint32_t count, uint8_t *buffer);
+int arm926ejs_write_phys_memory(struct target_s *target, uint32_t address, uint32_t size, uint32_t count, uint8_t *buffer);
 
 static int arm926ejs_virt2phys(struct target_s *target, uint32_t virtual, uint32_t *physical);
 static int arm926ejs_mmu(struct target_s *target, int *enabled);
 
+int arm926ejs_cp15_read(target_t *target, uint32_t op1, uint32_t op2, uint32_t CRn, uint32_t CRm, uint32_t *value);
+int arm926ejs_cp15_write(target_t *target, uint32_t op1, uint32_t op2, uint32_t CRn, uint32_t CRm, uint32_t value);
+
+static int arm926ejs_mrc(target_t *target, int cpnum, uint32_t op1, uint32_t op2, uint32_t CRn, uint32_t CRm, uint32_t *value)
+{
+       if (cpnum!=15)
+       {
+               LOG_ERROR("Only cp15 is supported");
+               return ERROR_FAIL;
+       }
+       return arm926ejs_cp15_read(target, op1, op2, CRn, CRm, value);
+}
+
+static int arm926ejs_mcr(target_t *target, int cpnum, uint32_t op1, uint32_t op2, uint32_t CRn, uint32_t CRm, uint32_t value)
+{
+       if (cpnum!=15)
+       {
+               LOG_ERROR("Only cp15 is supported");
+               return ERROR_FAIL;
+       }
+       return arm926ejs_cp15_write(target, op1, op2, CRn, CRm, value);
+}
+
 target_type_t arm926ejs_target =
 {
        .name = "arm926ejs",
@@ -87,7 +112,12 @@ target_type_t arm926ejs_target =
        .examine = arm9tdmi_examine,
        .quit = arm926ejs_quit,
        .virt2phys = arm926ejs_virt2phys,
-       .mmu = arm926ejs_mmu
+       .mmu = arm926ejs_mmu,
+
+       .read_phys_memory = arm926ejs_read_phys_memory,
+       .write_phys_memory = arm926ejs_write_phys_memory,
+       .mrc = arm926ejs_mrc,
+       .mcr = arm926ejs_mcr,
 };
 
 int arm926ejs_catch_broken_irscan(uint8_t *captured, void *priv, scan_field_t *field)
@@ -680,8 +710,40 @@ int arm926ejs_write_memory(struct target_s *target, uint32_t address, uint32_t s
        arm9tdmi_common_t *arm9tdmi = arm7_9->arch_info;
        arm926ejs_common_t *arm926ejs = arm9tdmi->arch_info;
 
-       if ((retval = arm7_9_write_memory(target, address, size, count, buffer)) != ERROR_OK)
-               return retval;
+       /* FIX!!!! this should be cleaned up and made much more general. The
+        * plan is to write up and test on arm926ejs specifically and
+        * then generalize and clean up afterwards. */
+       if (arm926ejs->armv4_5_mmu.mmu_enabled && (count == 1) && ((size==2) || (size==4)))
+       {
+               /* special case the handling of single word writes to bypass MMU
+                * to allow implementation of breakpoints in memory marked read only
+                * by MMU */
+               if (arm926ejs->armv4_5_mmu.armv4_5_cache.d_u_cache_enabled)
+               {
+                       /* flush and invalidate data cache
+                        *
+                        * MCR p15,0,p,c7,c10,1 - clean cache line using virtual address
+                        *
+                        */
+                       retval = arm926ejs->write_cp15(target, 0, 1, 7, 10, address&~0x3);
+                       if (retval != ERROR_OK)
+                               return retval;
+               }
+
+               uint32_t pa;
+               retval = target->type->virt2phys(target, address, &pa);
+               if (retval != ERROR_OK)
+                       return retval;
+
+               /* write directly to physical memory bypassing any read only MMU bits, etc. */
+               retval = armv4_5_mmu_write_physical(target, &arm926ejs->armv4_5_mmu, pa, size, count, buffer);
+               if (retval != ERROR_OK)
+                       return retval;
+       } else
+       {
+               if ((retval = arm7_9_write_memory(target, address, size, count, buffer)) != ERROR_OK)
+                       return retval;
+       }
 
        /* If ICache is enabled, we have to invalidate affected ICache lines
         * the DCache is forced to write-through, so we don't have to clean it here
@@ -703,6 +765,26 @@ int arm926ejs_write_memory(struct target_s *target, uint32_t address, uint32_t s
        return retval;
 }
 
+int arm926ejs_write_phys_memory(struct target_s *target, uint32_t address, uint32_t size, uint32_t count, uint8_t *buffer)
+{
+       armv4_5_common_t *armv4_5 = target->arch_info;
+       arm7_9_common_t *arm7_9 = armv4_5->arch_info;
+       arm9tdmi_common_t *arm9tdmi = arm7_9->arch_info;
+       arm926ejs_common_t *arm926ejs = arm9tdmi->arch_info;
+
+       return armv4_5_mmu_write_physical(target, &arm926ejs->armv4_5_mmu, address, size, count, buffer);
+}
+
+int arm926ejs_read_phys_memory(struct target_s *target, uint32_t address, uint32_t size, uint32_t count, uint8_t *buffer)
+{
+       armv4_5_common_t *armv4_5 = target->arch_info;
+       arm7_9_common_t *arm7_9 = armv4_5->arch_info;
+       arm9tdmi_common_t *arm9tdmi = arm7_9->arch_info;
+       arm926ejs_common_t *arm926ejs = arm9tdmi->arch_info;
+
+       return armv4_5_mmu_read_physical(target, &arm926ejs->armv4_5_mmu, address, size, count, buffer);
+}
+
 int arm926ejs_init_target(struct command_context_s *cmd_ctx, struct target_s *target)
 {
        arm9tdmi_init_target(cmd_ctx, target);
@@ -775,14 +857,6 @@ int arm926ejs_register_commands(struct command_context_s *cmd_ctx)
 
        register_command(cmd_ctx, arm926ejs_cmd, "cache_info", arm926ejs_handle_cache_info_command, COMMAND_EXEC, "display information about target caches");
 
-       register_command(cmd_ctx, arm926ejs_cmd, "mdw_phys", arm926ejs_handle_md_phys_command, COMMAND_EXEC, "display memory words <physical addr> [count]");
-       register_command(cmd_ctx, arm926ejs_cmd, "mdh_phys", arm926ejs_handle_md_phys_command, COMMAND_EXEC, "display memory half-words <physical addr> [count]");
-       register_command(cmd_ctx, arm926ejs_cmd, "mdb_phys", arm926ejs_handle_md_phys_command, COMMAND_EXEC, "display memory bytes <physical addr> [count]");
-
-       register_command(cmd_ctx, arm926ejs_cmd, "mww_phys", arm926ejs_handle_mw_phys_command, COMMAND_EXEC, "write memory word <physical addr> <value>");
-       register_command(cmd_ctx, arm926ejs_cmd, "mwh_phys", arm926ejs_handle_mw_phys_command, COMMAND_EXEC, "write memory half-word <physical addr> <value>");
-       register_command(cmd_ctx, arm926ejs_cmd, "mwb_phys", arm926ejs_handle_mw_phys_command, COMMAND_EXEC, "write memory byte <physical addr> <value>");
-
        return retval;
 }
 
@@ -868,58 +942,6 @@ int arm926ejs_handle_cache_info_command(struct command_context_s *cmd_ctx, char
        return armv4_5_handle_cache_info_command(cmd_ctx, &arm926ejs->armv4_5_mmu.armv4_5_cache);
 }
 
-int arm926ejs_handle_md_phys_command(command_context_t *cmd_ctx, char *cmd, char **args, int argc)
-{
-       target_t *target = get_current_target(cmd_ctx);
-       armv4_5_common_t *armv4_5;
-       arm7_9_common_t *arm7_9;
-       arm9tdmi_common_t *arm9tdmi;
-       arm926ejs_common_t *arm926ejs;
-       arm_jtag_t *jtag_info;
-
-       if (arm926ejs_get_arch_pointers(target, &armv4_5, &arm7_9, &arm9tdmi, &arm926ejs) != ERROR_OK)
-       {
-               command_print(cmd_ctx, "current target isn't an ARM926EJ-S target");
-               return ERROR_OK;
-       }
-
-       jtag_info = &arm7_9->jtag_info;
-
-       if (target->state != TARGET_HALTED)
-       {
-               command_print(cmd_ctx, "target must be stopped for \"%s\" command", cmd);
-               return ERROR_OK;
-       }
-
-       return armv4_5_mmu_handle_md_phys_command(cmd_ctx, cmd, args, argc, target, &arm926ejs->armv4_5_mmu);
-}
-
-int arm926ejs_handle_mw_phys_command(command_context_t *cmd_ctx, char *cmd, char **args, int argc)
-{
-       target_t *target = get_current_target(cmd_ctx);
-       armv4_5_common_t *armv4_5;
-       arm7_9_common_t *arm7_9;
-       arm9tdmi_common_t *arm9tdmi;
-       arm926ejs_common_t *arm926ejs;
-       arm_jtag_t *jtag_info;
-
-       if (arm926ejs_get_arch_pointers(target, &armv4_5, &arm7_9, &arm9tdmi, &arm926ejs) != ERROR_OK)
-       {
-               command_print(cmd_ctx, "current target isn't an ARM926EJ-S target");
-               return ERROR_OK;
-       }
-
-       jtag_info = &arm7_9->jtag_info;
-
-       if (target->state != TARGET_HALTED)
-       {
-               command_print(cmd_ctx, "target must be stopped for \"%s\" command", cmd);
-               return ERROR_OK;
-       }
-
-       return armv4_5_mmu_handle_mw_phys_command(cmd_ctx, cmd, args, argc, target, &arm926ejs->armv4_5_mmu);
-}
-
 static int arm926ejs_virt2phys(struct target_s *target, uint32_t virtual, uint32_t *physical)
 {
        int retval;

Linking to existing account procedure

If you already have an account and want to add another login method you MUST first sign in with your existing account and then change URL to read https://review.openocd.org/login/?link to get to this page again but this time it'll work for linking. Thank you.

SSH host keys fingerprints

1024 SHA256:YKx8b7u5ZWdcbp7/4AeXNaqElP49m6QrwfXaqQGJAOk gerrit-code-review@openocd.zylin.com (DSA)
384 SHA256:jHIbSQa4REvwCFG4cq5LBlBLxmxSqelQPem/EXIrxjk gerrit-code-review@openocd.org (ECDSA)
521 SHA256:UAOPYkU9Fjtcao0Ul/Rrlnj/OsQvt+pgdYSZ4jOYdgs gerrit-code-review@openocd.org (ECDSA)
256 SHA256:A13M5QlnozFOvTllybRZH6vm7iSt0XLxbA48yfc2yfY gerrit-code-review@openocd.org (ECDSA)
256 SHA256:spYMBqEYoAOtK7yZBrcwE8ZpYt6b68Cfh9yEVetvbXg gerrit-code-review@openocd.org (ED25519)
+--[ED25519 256]--+
|=..              |
|+o..   .         |
|*.o   . .        |
|+B . . .         |
|Bo. = o S        |
|Oo.+ + =         |
|oB=.* = . o      |
| =+=.+   + E     |
|. .=o   . o      |
+----[SHA256]-----+
2048 SHA256:0Onrb7/PHjpo6iVZ7xQX2riKN83FJ3KGU0TvI0TaFG4 gerrit-code-review@openocd.zylin.com (RSA)