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jtag: cut down on usage of unintended modification of global end state
[openocd.git] / src / target / arm7_9_common.c
diff --git a/src/target/arm7_9_common.c b/src/target/arm7_9_common.c
index ca1d84f5de3449d596331752dfe0902da109ab46..c6a08cf1bfb87c1064cf6d2c19d08ff169e00487 100644 (file)
--- a/src/target/arm7_9_common.c
+++ b/src/target/arm7_9_common.c
@@ -1235,9 +1235,9 @@ int arm7_9_soft_reset_halt(struct target *target)
        armv4_5->cpsr->dirty = 1;
 
        /* start fetching from 0x0 */
-       buf_set_u32(armv4_5->core_cache->reg_list[15].value, 0, 32, 0x0);
-       armv4_5->core_cache->reg_list[15].dirty = 1;
-       armv4_5->core_cache->reg_list[15].valid = 1;
+       buf_set_u32(armv4_5->pc->value, 0, 32, 0x0);
+       armv4_5->pc->dirty = 1;
+       armv4_5->pc->valid = 1;
 
        /* reset registers */
        for (i = 0; i <= 14; i++)
@@ -1721,12 +1721,10 @@ int arm7_9_restore_context(struct target *target)
        }
 
        /* restore PC */
-       LOG_DEBUG("writing PC with value 0x%8.8" PRIx32 "", buf_get_u32(armv4_5->core_cache->reg_list[15].value, 0, 32));
-       arm7_9->write_pc(target, buf_get_u32(armv4_5->core_cache->reg_list[15].value, 0, 32));
-       armv4_5->core_cache->reg_list[15].dirty = 0;
-
-       if (arm7_9->post_restore_context)
-               arm7_9->post_restore_context(target);
+       LOG_DEBUG("writing PC with value 0x%8.8" PRIx32,
+                       buf_get_u32(armv4_5->pc->value, 0, 32));
+       arm7_9->write_pc(target, buf_get_u32(armv4_5->pc->value, 0, 32));
+       armv4_5->pc->dirty = 0;
 
        return ERROR_OK;
 }
@@ -1752,7 +1750,7 @@ int arm7_9_restart_core(struct target *target)
        }
        arm_jtag_set_instr(jtag_info, 0x4, NULL);
 
-       jtag_add_runtest(1, jtag_set_end_state(TAP_IDLE));
+       jtag_add_runtest(1, TAP_IDLE);
        return jtag_execute_queue();
 }
 
@@ -1815,15 +1813,17 @@ int arm7_9_resume(struct target *target, int current, uint32_t address, int hand
 
        /* current = 1: continue on current pc, otherwise continue at <address> */
        if (!current)
-               buf_set_u32(armv4_5->core_cache->reg_list[15].value, 0, 32, address);
+               buf_set_u32(armv4_5->pc->value, 0, 32, address);
 
        uint32_t current_pc;
-       current_pc = buf_get_u32(armv4_5->core_cache->reg_list[15].value, 0, 32);
+       current_pc = buf_get_u32(armv4_5->pc->value, 0, 32);
 
        /* the front-end may request us not to handle breakpoints */
        if (handle_breakpoints)
        {
-               if ((breakpoint = breakpoint_find(target, buf_get_u32(armv4_5->core_cache->reg_list[15].value, 0, 32))))
+               breakpoint = breakpoint_find(target,
+                               buf_get_u32(armv4_5->pc->value, 0, 32));
+               if (breakpoint != NULL)
                {
                        LOG_DEBUG("unset breakpoint at 0x%8.8" PRIx32 " (id: %d)", breakpoint->address, breakpoint->unique_id );
                        if ((retval = arm7_9_unset_breakpoint(target, breakpoint)) != ERROR_OK)
@@ -1881,7 +1881,8 @@ int arm7_9_resume(struct target *target, int current, uint32_t address, int hand
                        }
 
                        arm7_9_debug_entry(target);
-                       LOG_DEBUG("new PC after step: 0x%8.8" PRIx32 "", buf_get_u32(armv4_5->core_cache->reg_list[15].value, 0, 32));
+                       LOG_DEBUG("new PC after step: 0x%8.8" PRIx32,
+                                       buf_get_u32(armv4_5->pc->value, 0, 32));
 
                        LOG_DEBUG("set breakpoint at 0x%8.8" PRIx32 "", breakpoint->address);
                        if ((retval = arm7_9_set_breakpoint(target, breakpoint)) != ERROR_OK)
@@ -1957,7 +1958,7 @@ void arm7_9_enable_eice_step(struct target *target, uint32_t next_pc)
        struct arm7_9_common *arm7_9 = target_to_arm7_9(target);
        struct arm *armv4_5 = &arm7_9->armv4_5_common;
        uint32_t current_pc;
-       current_pc = buf_get_u32(armv4_5->core_cache->reg_list[15].value, 0, 32);
+       current_pc = buf_get_u32(armv4_5->pc->value, 0, 32);
 
        if (next_pc != current_pc)
        {
@@ -2019,18 +2020,18 @@ int arm7_9_step(struct target *target, int current, uint32_t address, int handle
 
        /* current = 1: continue on current pc, otherwise continue at <address> */
        if (!current)
-               buf_set_u32(armv4_5->core_cache->reg_list[15].value, 0, 32, address);
+               buf_set_u32(armv4_5->pc->value, 0, 32, address);
 
-       uint32_t current_pc;
-       current_pc = buf_get_u32(armv4_5->core_cache->reg_list[15].value, 0, 32);
+       uint32_t current_pc = buf_get_u32(armv4_5->pc->value, 0, 32);
 
        /* the front-end may request us not to handle breakpoints */
        if (handle_breakpoints)
-               if ((breakpoint = breakpoint_find(target, buf_get_u32(armv4_5->core_cache->reg_list[15].value, 0, 32))))
-                       if ((retval = arm7_9_unset_breakpoint(target, breakpoint)) != ERROR_OK)
-                       {
-                               return retval;
-                       }
+               breakpoint = breakpoint_find(target, current_pc);
+       if (breakpoint != NULL) {
+               retval = arm7_9_unset_breakpoint(target, breakpoint);
+               if (retval != ERROR_OK)
+                       return retval;
+       }
 
        target->debug_reason = DBG_REASON_SINGLESTEP;
 
@@ -2760,6 +2761,16 @@ int arm7_9_check_reset(struct target *target)
                LOG_WARNING("NOTE! DCC downloads have not been enabled, defaulting to slow memory writes. Type 'help dcc'.");
        }
 
+       if (get_target_reset_nag() && (target->working_area_size == 0))
+       {
+               LOG_WARNING("NOTE! Severe performance degradation without working memory enabled.");
+       }
+
+       if (get_target_reset_nag() && !arm7_9->fast_memory_access)
+       {
+               LOG_WARNING("NOTE! Severe performance degradation without fast memory access enabled. Type 'help fast'.");
+       }
+
        return ERROR_OK;
 }
 
@@ -2820,54 +2831,32 @@ COMMAND_HANDLER(handle_arm7_9_dcc_downloads_command)
        return ERROR_OK;
 }
 
-COMMAND_HANDLER(handle_arm7_9_semihosting_command)
+int arm7_9_setup_semihosting(struct target *target, int enable)
 {
-       struct target *target = get_current_target(CMD_CTX);
        struct arm7_9_common *arm7_9 = target_to_arm7_9(target);
 
        if (!is_arm7_9(arm7_9))
        {
-               command_print(CMD_CTX, "current target isn't an ARM7/ARM9 target");
+               LOG_USER("current target isn't an ARM7/ARM9 target");
                return ERROR_TARGET_INVALID;
        }
 
-       if (CMD_ARGC > 0)
-       {
-               int semihosting;
-
-               COMMAND_PARSE_ENABLE(CMD_ARGV[0], semihosting);
-
-               if (!target_was_examined(target))
-               {
-                       LOG_ERROR("Target not examined yet");
-                       return ERROR_FAIL;
-               }
-
-               if (arm7_9->has_vector_catch) {
-                       struct reg *vector_catch = &arm7_9->eice_cache
-                                       ->reg_list[EICE_VEC_CATCH];
-
-                       if (!vector_catch->valid)
-                               embeddedice_read_reg(vector_catch);
-                       buf_set_u32(vector_catch->value, 2, 1, semihosting);
-                       embeddedice_store_reg(vector_catch);
-               } else {
-                       /* TODO: allow optional high vectors and/or BKPT_HARD */
-                       if (semihosting)
-                               breakpoint_add(target, 8, 4, BKPT_SOFT);
-                       else
-                               breakpoint_remove(target, 8); 
-               }
-
-               /* FIXME never let that "catch" be dropped! */
-               arm7_9->armv4_5_common.is_semihosting = semihosting;
+       if (arm7_9->has_vector_catch) {
+               struct reg *vector_catch = &arm7_9->eice_cache
+                               ->reg_list[EICE_VEC_CATCH];
 
+               if (!vector_catch->valid)
+                       embeddedice_read_reg(vector_catch);
+               buf_set_u32(vector_catch->value, 2, 1, enable);
+               embeddedice_store_reg(vector_catch);
+       } else {
+               /* TODO: allow optional high vectors and/or BKPT_HARD */
+               if (enable)
+                       breakpoint_add(target, 8, 4, BKPT_SOFT);
+               else
+                       breakpoint_remove(target, 8);
        }
 
-       command_print(CMD_CTX, "semihosting is %s",
-                       arm7_9->armv4_5_common.is_semihosting
-                       ? "enabled" : "disabled");
-
        return ERROR_OK;
 }
 
@@ -2892,6 +2881,7 @@ int arm7_9_init_arch_info(struct target *target, struct arm7_9_common *arm7_9)
        armv4_5->read_core_reg = arm7_9_read_core_reg;
        armv4_5->write_core_reg = arm7_9_write_core_reg;
        armv4_5->full_context = arm7_9_full_context;
+       armv4_5->setup_semihosting = arm7_9_setup_semihosting;
 
        retval = arm_init_arch_info(target, armv4_5);
        if (retval != ERROR_OK)
@@ -2925,13 +2915,6 @@ static const struct command_registration arm7_9_any_command_handlers[] = {
                .usage = "['enable'|'disable']",
                .help = "use DCC downloads for larger memory writes",
        },
-       {
-               "semihosting",
-               .handler = handle_arm7_9_semihosting_command,
-               .mode = COMMAND_EXEC,
-               .usage = "['enable'|'disable']",
-               .help = "activate support for semihosting operations",
-       },
        COMMAND_REGISTRATION_DONE
 };
 const struct command_registration arm7_9_command_handlers[] = {
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