fixed gaffe: disable interrupts reset init script
[openocd.git] / src / target / arm7_9_common.c
index c08f6aa20c4b33d248d3d22325c00f21aebafb95..786f9a9ed77e4b538aba40a5ac680ac0d1b4d2dd 100644 (file)
@@ -2,9 +2,12 @@
  *   Copyright (C) 2005 by Dominic Rath                                    *
  *   Dominic.Rath@gmx.de                                                   *
  *                                                                         *
- *   Copyright (C) 2007,2008 Øyvind Harboe                                      *
+ *   Copyright (C) 2007,2008 Øyvind Harboe                                 *
  *   oyvind.harboe@zylin.com                                               *
  *                                                                         *
+ *   Copyright (C) 2008 by Spencer Oliver                                  *
+ *   spen@spen-soft.co.uk                                                  *
+ *                                                                         *
  *   This program is free software; you can redistribute it and/or modify  *
  *   it under the terms of the GNU General Public License as published by  *
  *   the Free Software Foundation; either version 2 of the License, or     *
@@ -35,6 +38,7 @@
 #include "log.h"
 #include "arm7_9_common.h"
 #include "breakpoints.h"
+#include "time_support.h"
 
 #include <stdlib.h>
 #include <string.h>
@@ -511,7 +515,6 @@ int arm7_9_remove_watchpoint(struct target_s *target, watchpoint_t *watchpoint)
 
 int arm7_9_execute_sys_speed(struct target_s *target)
 {
-       int timeout;
        int retval;
 
        armv4_5_common_t *armv4_5 = target->arch_info;
@@ -527,7 +530,9 @@ int arm7_9_execute_sys_speed(struct target_s *target)
        }
        arm_jtag_set_instr(jtag_info, 0x4, NULL);
 
-       for (timeout=0; timeout<50; timeout++)
+       long long then=timeval_ms();
+       int timeout;
+       while (!(timeout=((timeval_ms()-then)>1000)))
        {
                /* read debug status register */
                embeddedice_read_reg(dbg_stat);
@@ -536,9 +541,15 @@ int arm7_9_execute_sys_speed(struct target_s *target)
                if ((buf_get_u32(dbg_stat->value, EICE_DBG_STATUS_DBGACK, 1))
                                   && (buf_get_u32(dbg_stat->value, EICE_DBG_STATUS_SYSCOMP, 1)))
                        break;
-               alive_sleep(100);
+               if (debug_level>=3)
+               {
+                       alive_sleep(100);
+               } else
+               {
+                       keep_alive();
+               }
        }
-       if (timeout == 50)
+       if (timeout)
        {
                LOG_ERROR("timeout waiting for SYSCOMP & DBGACK, last DBG_STATUS: %x", buf_get_u32(dbg_stat->value, 0, dbg_stat->size));
                return ERROR_TARGET_TIMEOUT;
@@ -726,7 +737,8 @@ int arm7_9_assert_reset(target_t *target)
 {
        armv4_5_common_t *armv4_5 = target->arch_info;
        arm7_9_common_t *arm7_9 = armv4_5->arch_info;
-       LOG_DEBUG("target->state: %s", target_state_strings[target->state]);
+       LOG_DEBUG("target->state: %s", 
+                 Jim_Nvp_value2name_simple( nvp_target_state,target->state)->name);
 
        if (!(jtag_reset_config & RESET_HAS_SRST))
        {
@@ -787,7 +799,9 @@ int arm7_9_assert_reset(target_t *target)
 int arm7_9_deassert_reset(target_t *target)
 {
        int retval=ERROR_OK;
-       LOG_DEBUG("target->state: %s", target_state_strings[target->state]);
+       LOG_DEBUG("target->state: %s", 
+                 Jim_Nvp_value2name_simple( nvp_target_state,target->state)->name);
+
 
        /* deassert reset lines */
        jtag_add_reset(0, 0);
@@ -873,18 +887,24 @@ int arm7_9_soft_reset_halt(struct target_s *target)
        if ((retval=target_halt(target))!=ERROR_OK)
                return retval;
 
-       for (i=0; i<10; i++)
+       long long then=timeval_ms();
+       int timeout;
+       while (!(timeout=((timeval_ms()-then)>1000)))
        {
                if (buf_get_u32(dbg_stat->value, EICE_DBG_STATUS_DBGACK, 1) != 0)
                        break;
                embeddedice_read_reg(dbg_stat);
                if ((retval=jtag_execute_queue())!=ERROR_OK)
                        return retval;
-               /* do not eat all CPU, time out after 1 se*/
-               usleep(100*1000);
-
+               if (debug_level>=3)
+               {
+                       alive_sleep(100);
+               } else
+               {
+                       keep_alive();
+               }
        }
-       if (i==10)
+       if (timeout)
        {
                LOG_ERROR("Failed to halt CPU after 1 sec");
                return ERROR_TARGET_TIMEOUT;
@@ -955,7 +975,8 @@ int arm7_9_halt(target_t *target)
        arm7_9_common_t *arm7_9 = armv4_5->arch_info;
        reg_t *dbg_ctrl = &arm7_9->eice_cache->reg_list[EICE_DBG_CTRL];
 
-       LOG_DEBUG("target->state: %s", target_state_strings[target->state]);
+       LOG_DEBUG("target->state: %s", 
+                 Jim_Nvp_value2name_simple( nvp_target_state,target->state)->name);
 
        if (target->state == TARGET_HALTED)
        {
@@ -2162,14 +2183,22 @@ int arm7_9_bulk_write_memory(target_t *target, u32 address, u32 count, u8 *buffe
 
        target_halt(target);
 
-       for (i=0; i<100; i++)
+       long long then=timeval_ms();
+       int timeout;
+       while (!(timeout=((timeval_ms()-then)>100)))
        {
                target_poll(target);
                if (target->state == TARGET_HALTED)
                        break;
-               usleep(1000); /* sleep 1ms */
+               if (debug_level>=3)
+               {
+                       alive_sleep(100);
+               } else
+               {
+                       keep_alive();
+               }
        }
-       if (i == 100)
+       if (timeout)
        {
                LOG_ERROR("bulk write timed out, target not halted");
                return ERROR_TARGET_TIMEOUT;

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