Alexei Babich <a.babich@rez.ru> cleanup

[openocd.git] / src / target / arm7_9_common.c

diff --git a/src/target/arm7_9_common.c b/src/target/arm7_9_common.c
index dfe045d5b6580418162e2037f7cce35e8ad6b041..6f76c07cf9517bf19ce82674a977fd262ffef8dc 100644 (file)
--- a/src/target/arm7_9_common.c
+++ b/src/target/arm7_9_common.c
@@ -61,6 +61,7 @@ static int arm7_9_clear_watchpoints(arm7_9_common_t *arm7_9)
        LOG_DEBUG("-");
        embeddedice_write_reg(&arm7_9->eice_cache->reg_list[EICE_W0_CONTROL_VALUE], 0x0);
        embeddedice_write_reg(&arm7_9->eice_cache->reg_list[EICE_W1_CONTROL_VALUE], 0x0);
+       arm7_9->sw_breakpoint_count = 0;
        arm7_9->sw_breakpoints_added = 0;
        arm7_9->wp0_used = 0;
        arm7_9->wp1_used = arm7_9->wp1_used_default;
@@ -227,9 +228,10 @@ int arm7_9_set_breakpoint(struct target_s *target, breakpoint_t *breakpoint)
        arm7_9_common_t *arm7_9 = armv4_5->arch_info;
        int retval = ERROR_OK;
 
-       LOG_DEBUG("BPID: %d, Address: 0x%08" PRIx32,
+       LOG_DEBUG("BPID: %d, Address: 0x%08" PRIx32 ", Type: %d" ,
                          breakpoint->unique_id,
-                         breakpoint->address );
+                         breakpoint->address,
+                         breakpoint->type);
 
        if (target->state != TARGET_HALTED)
        {
@@ -274,9 +276,6 @@ int arm7_9_set_breakpoint(struct target_s *target, breakpoint_t *breakpoint)
        }
        else if (breakpoint->type == BKPT_SOFT)
        {
-               if ((retval = arm7_9_set_software_breakpoints(arm7_9)) != ERROR_OK)
-                       return retval;
-
                /* did we already set this breakpoint? */
                if (breakpoint->set)
                        return ERROR_OK;
@@ -329,6 +328,12 @@ int arm7_9_set_breakpoint(struct target_s *target, breakpoint_t *breakpoint)
                                return ERROR_OK;
                        }
                }
+
+               if ((retval = arm7_9_set_software_breakpoints(arm7_9)) != ERROR_OK)
+                       return retval;
+
+               arm7_9->sw_breakpoint_count++;
+
                breakpoint->set = 1;
        }
 
@@ -415,6 +420,20 @@ int arm7_9_unset_breakpoint(struct target_s *target, breakpoint_t *breakpoint)
                                        return retval;
                                }
                }
+
+               if (--arm7_9->sw_breakpoint_count==0)
+               {
+                       /* We have removed the last sw breakpoint, clear the hw breakpoint we used to implement it */
+                       if (arm7_9->sw_breakpoints_added == 1)
+                       {
+                               embeddedice_set_reg(&arm7_9->eice_cache->reg_list[EICE_W0_CONTROL_VALUE], 0);
+                       }
+                       else if (arm7_9->sw_breakpoints_added == 2)
+                       {
+                               embeddedice_set_reg(&arm7_9->eice_cache->reg_list[EICE_W1_CONTROL_VALUE], 0);
+                       }
+               }
+
                breakpoint->set = 0;
        }
 
@@ -1015,6 +1034,9 @@ int arm7_9_assert_reset(target_t *target)
                {
                        /* program vector catch register to catch reset vector */
                        embeddedice_write_reg(&arm7_9->eice_cache->reg_list[EICE_VEC_CATCH], 0x1);
+
+                       /* extra runtest added as issues were found with certain ARM9 cores (maybe more) - AT91SAM9260 and STR9 */
+                       jtag_add_runtest(1, jtag_get_end_state());
                }
                else
                {
@@ -1166,6 +1188,13 @@ int arm7_9_soft_reset_halt(struct target_s *target)
        int i;
        int retval;
 
+       /* FIX!!! replace some of this code with tcl commands
+        *
+        * halt # the halt command is synchronous
+        * armv4_5 core_state arm
+        *
+        */
+
        if ((retval = target_halt(target)) != ERROR_OK)
                return retval;
 
@@ -1830,7 +1859,7 @@ int arm7_9_resume(struct target_s *target, int current, uint32_t address, int ha
                        {
                                uint32_t current_opcode;
                                target_read_u32(target, current_pc, &current_opcode);
-                               LOG_ERROR("BUG: couldn't calculate PC of next instruction, current opcode was 0x%8.8" PRIx32 "", current_opcode);
+                               LOG_ERROR("Couldn't calculate PC of next instruction, current opcode was 0x%8.8" PRIx32 "", current_opcode);
                                return retval;
                        }
 
@@ -2035,7 +2064,7 @@ int arm7_9_step(struct target_s *target, int current, uint32_t address, int hand
        {
                uint32_t current_opcode;
                target_read_u32(target, current_pc, &current_opcode);
-               LOG_ERROR("BUG: couldn't calculate PC of next instruction, current opcode was 0x%8.8" PRIx32 "", current_opcode);
+               LOG_ERROR("Couldn't calculate PC of next instruction, current opcode was 0x%8.8" PRIx32 "", current_opcode);
                return retval;
        }
 
@@ -3106,6 +3135,7 @@ int arm7_9_init_arch_info(target_t *target, arm7_9_common_t *arm7_9)
        arm7_9->wp_available = 0; /* this is set up in arm7_9_clear_watchpoints() */
        arm7_9->wp_available_max = 2;
        arm7_9->sw_breakpoints_added = 0;
+       arm7_9->sw_breakpoint_count = 0;
        arm7_9->breakpoint_count = 0;
        arm7_9->wp0_used = 0;
        arm7_9->wp1_used = 0;