Updates for "reset_config":

[openocd.git] / src / target / arm720t.c

diff --git a/src/target/arm720t.c b/src/target/arm720t.c
index f160c9d55da331e6663de9da9e445e9057cc1fa7..a5916aae54aec172746cfb40aa6bc8e34c2b7b5b 100644 (file)
--- a/src/target/arm720t.c
+++ b/src/target/arm720t.c
@@ -97,11 +97,11 @@ int arm720t_scan_cp15(target_t *target, uint32_t out, uint32_t *in, int instruct
        buf_set_u32(out_buf, 0, 32, flip_u32(out, 32));
 
        jtag_set_end_state(TAP_DRPAUSE);
-       if((retval = arm_jtag_scann(jtag_info, 0xf)) != ERROR_OK)
+       if ((retval = arm_jtag_scann(jtag_info, 0xf)) != ERROR_OK)
        {
                return retval;
        }
-       if((retval = arm_jtag_set_instr(jtag_info, jtag_info->intest_instr, NULL)) != ERROR_OK)
+       if ((retval = arm_jtag_set_instr(jtag_info, jtag_info->intest_instr, NULL)) != ERROR_OK)
        {
                return retval;
        }
@@ -130,7 +130,7 @@ int arm720t_scan_cp15(target_t *target, uint32_t out, uint32_t *in, int instruct
                jtag_add_runtest(0, jtag_get_end_state());
 
 #ifdef _DEBUG_INSTRUCTION_EXECUTION_
-       if((retval = jtag_execute_queue()) != ERROR_OK)
+       if ((retval = jtag_execute_queue()) != ERROR_OK)
        {
                return retval;
        }
@@ -140,7 +140,7 @@ int arm720t_scan_cp15(target_t *target, uint32_t out, uint32_t *in, int instruct
        else
                LOG_DEBUG("out: %8.8x, instruction: %i, clock: %i", out, instruction, clock);
 #else
-               LOG_DEBUG("out: %8.8x, instruction: %i, clock: %i", out, instruction, clock);
+               LOG_DEBUG("out: %8.8" PRIx32 ", instruction: %i, clock: %i", out, instruction, clock);
 #endif
 
        return ERROR_OK;
@@ -235,7 +235,7 @@ void arm720t_post_debug_entry(target_t *target)
        /* examine cp15 control reg */
        arm720t_read_cp15(target, 0xee110f10, &arm720t->cp15_control_reg);
        jtag_execute_queue();
-       LOG_DEBUG("cp15_control_reg: %8.8x", arm720t->cp15_control_reg);
+       LOG_DEBUG("cp15_control_reg: %8.8" PRIx32 "", arm720t->cp15_control_reg);
 
        arm720t->armv4_5_mmu.mmu_enabled = (arm720t->cp15_control_reg & 0x1U) ? 1 : 0;
        arm720t->armv4_5_mmu.armv4_5_cache.d_u_cache_enabled = (arm720t->cp15_control_reg & 0x4U) ? 1 : 0;
@@ -316,10 +316,10 @@ int arm720t_arch_state(struct target_s *target)
        }
 
        LOG_USER("target halted in %s state due to %s, current mode: %s\n"
-                       "cpsr: 0x%8.8x pc: 0x%8.8x\n"
+                       "cpsr: 0x%8.8" PRIx32 " pc: 0x%8.8" PRIx32 "\n"
                        "MMU: %s, Cache: %s",
                         armv4_5_state_strings[armv4_5->core_state],
-                        Jim_Nvp_value2name_simple( nvp_target_debug_reason, target->debug_reason )->name ,
+                        Jim_Nvp_value2name_simple(nvp_target_debug_reason, target->debug_reason)->name ,
                         armv4_5_mode_strings[armv4_5_mode_to_number(armv4_5->core_mode)],
                         buf_get_u32(armv4_5->core_cache->reg_list[ARMV4_5_CPSR].value, 0, 32),
                         buf_get_u32(armv4_5->core_cache->reg_list[15].value, 0, 32),
@@ -373,9 +373,9 @@ int arm720t_soft_reset_halt(struct target_s *target)
                return retval;
        }
 
-       long long then=timeval_ms();
+       long long then = timeval_ms();
        int timeout;
-       while (!(timeout=((timeval_ms()-then)>1000)))
+       while (!(timeout = ((timeval_ms()-then) > 1000)))
        {
                if (buf_get_u32(dbg_stat->value, EICE_DBG_STATUS_DBGACK, 1) == 0)
                {
@@ -388,7 +388,7 @@ int arm720t_soft_reset_halt(struct target_s *target)
                {
                        break;
                }
-               if (debug_level>=3)
+               if (debug_level >= 3)
                {
                        alive_sleep(100);
                } else
@@ -534,7 +534,7 @@ int arm720t_handle_cp15_command(struct command_context_s *cmd_ctx, char *cmd, ch
                        uint32_t value;
                        if ((retval = arm720t_read_cp15(target, opcode, &value)) != ERROR_OK)
                        {
-                               command_print(cmd_ctx, "couldn't access cp15 with opcode 0x%8.8x", opcode);
+                               command_print(cmd_ctx, "couldn't access cp15 with opcode 0x%8.8" PRIx32 "", opcode);
                                return ERROR_OK;
                        }
 
@@ -543,17 +543,17 @@ int arm720t_handle_cp15_command(struct command_context_s *cmd_ctx, char *cmd, ch
                                return retval;
                        }
 
-                       command_print(cmd_ctx, "0x%8.8x: 0x%8.8x", opcode, value);
+                       command_print(cmd_ctx, "0x%8.8" PRIx32 ": 0x%8.8" PRIx32 "", opcode, value);
                }
                else if (argc == 2)
                {
                        uint32_t value = strtoul(args[1], NULL, 0);
                        if ((retval = arm720t_write_cp15(target, opcode, value)) != ERROR_OK)
                        {
-                               command_print(cmd_ctx, "couldn't access cp15 with opcode 0x%8.8x", opcode);
+                               command_print(cmd_ctx, "couldn't access cp15 with opcode 0x%8.8" PRIx32 "", opcode);
                                return ERROR_OK;
                        }
-                       command_print(cmd_ctx, "0x%8.8x: 0x%8.8x", opcode, value);
+                       command_print(cmd_ctx, "0x%8.8" PRIx32 ": 0x%8.8" PRIx32 "", opcode, value);
                }
        }