Add target breakpoint and watchpoint wrapper:

[openocd.git] / src / target / arm11.c

diff --git a/src/target/arm11.c b/src/target/arm11.c
index 77a57c9d855bef2ee0d426cdf39df1432c6e34d1..15557327055962cd2d7bef4d739ca4d1f0432bb7 100644 (file)
--- a/src/target/arm11.c
+++ b/src/target/arm11.c
@@ -1,5 +1,6 @@
 /***************************************************************************
  *   Copyright (C) 2008 digenius technology GmbH.                          *
+ *   Michael Bruck                                                         *
  *                                                                         *
  *   Copyright (C) 2008 Oyvind Harboe oyvind.harboe@zylin.com              *
  *                                                                         *
@@ -26,11 +27,7 @@
 #endif
 
 #include "arm11.h"
-#include "jtag.h"
-#include "log.h"
 
-#include <stdlib.h>
-#include <string.h>
 
 #if 0
 #define _DEBUG_INSTRUCTION_EXECUTION_
@@ -340,7 +337,9 @@ int arm11_check_init(arm11_common_t * arm11, u32 * dscr)
                if (*dscr & ARM11_DSCR_CORE_HALTED)
                {
                        /** \todo TODO: this needs further scrutiny because
-                         * arm11_on_enter_debug_state() never gets properly called
+                         * arm11_on_enter_debug_state() never gets properly called.
+                         * As a result we don't read the actual register states from
+                         * the target.
                          */
 
                        arm11->target->state    = TARGET_HALTED;
@@ -373,12 +372,11 @@ static int arm11_on_enter_debug_state(arm11_common_t * arm11)
 {
        FNC_INFO;
 
-       {size_t i;
-       for(i = 0; i < asizeof(arm11->reg_values); i++)
+       for (size_t i = 0; i < asizeof(arm11->reg_values); i++)
        {
                arm11->reg_list[i].valid        = 1;
                arm11->reg_list[i].dirty        = 0;
-       }}
+       }
 
        /* Save DSCR */
        CHECK_RETVAL(arm11_read_DSCR(arm11, &R(DSCR)));
@@ -394,8 +392,8 @@ static int arm11_on_enter_debug_state(arm11_common_t * arm11)
                scan_field_t    chain5_fields[3];
 
                arm11_setup_field(arm11, 32, NULL, &R(WDTR),    chain5_fields + 0);
-               arm11_setup_field(arm11,  1, NULL, NULL,        chain5_fields + 1);
-               arm11_setup_field(arm11,  1, NULL, NULL,        chain5_fields + 2);
+               arm11_setup_field(arm11,  1, NULL, NULL,                chain5_fields + 1);
+               arm11_setup_field(arm11,  1, NULL, NULL,                chain5_fields + 2);
 
                arm11_add_dr_scan_vc(asizeof(chain5_fields), chain5_fields, TAP_DRPAUSE);
        }
@@ -454,12 +452,11 @@ static int arm11_on_enter_debug_state(arm11_common_t * arm11)
 
        /** \todo TODO: handle other mode registers */
 
-       {size_t i;
-       for (i = 0; i < 15; i++)
+       for (size_t i = 0; i < 15; i++)
        {
                /* MCR p14,0,R?,c0,c5,0 */
                arm11_run_instr_data_from_core(arm11, 0xEE000E15 | (i << 12), &R(RX + i), 1);
-       }}
+       }
 
        /* save rDTR */
 
@@ -528,8 +525,7 @@ void arm11_dump_reg_changes(arm11_common_t * arm11)
                return;
        }
 
-       {size_t i;
-       for(i = 0; i < ARM11_REGCACHE_COUNT; i++)
+       for (size_t i = 0; i < ARM11_REGCACHE_COUNT; i++)
        {
                if (!arm11->reg_list[i].valid)
                {
@@ -548,7 +544,7 @@ void arm11_dump_reg_changes(arm11_common_t * arm11)
                                LOG_DEBUG("%8s %08x (INVALID)", arm11_reg_defs[i].name, arm11->reg_values[i]);
                        }
                }
-       }}
+       }
 }
 
 /** Restore processor state
@@ -565,8 +561,8 @@ int arm11_leave_debug_state(arm11_common_t * arm11)
        /** \todo TODO: handle other mode registers */
 
        /* restore R1 - R14 */
-       {size_t i;
-       for (i = 1; i < 15; i++)
+
+       for (size_t i = 1; i < 15; i++)
        {
                if (!arm11->reg_list[ARM11_RC_RX + i].dirty)
                        continue;
@@ -575,7 +571,7 @@ int arm11_leave_debug_state(arm11_common_t * arm11)
                arm11_run_instr_data_to_core1(arm11, 0xee100e15 | (i << 12), R(RX + i));
 
                //      LOG_DEBUG("RESTORE R" ZU " %08x", i, R(RX + i));
-       }}
+       }
 
        arm11_run_instr_data_finish(arm11);
 
@@ -650,15 +646,14 @@ int arm11_leave_debug_state(arm11_common_t * arm11)
 
 void arm11_record_register_history(arm11_common_t * arm11)
 {
-       {size_t i;
-       for(i = 0; i < ARM11_REGCACHE_COUNT; i++)
+       for (size_t i = 0; i < ARM11_REGCACHE_COUNT; i++)
        {
                arm11->reg_history[i].value     = arm11->reg_values[i];
                arm11->reg_history[i].valid     = arm11->reg_list[i].valid;
 
                arm11->reg_list[i].valid        = 0;
                arm11->reg_list[i].dirty        = 0;
-       }}
+       }
 }
 
 
@@ -687,7 +682,7 @@ int arm11_poll(struct target_s *target)
                        enum target_state old_state = target->state;
 
                        LOG_DEBUG("enter TARGET_HALTED");
-                       target->state           = TARGET_HALTED;
+                       target->state                   = TARGET_HALTED;
                        target->debug_reason    = arm11_get_DSCR_debug_reason(dscr);
                        arm11_on_enter_debug_state(arm11);
 
@@ -700,7 +695,7 @@ int arm11_poll(struct target_s *target)
                if (target->state != TARGET_RUNNING && target->state != TARGET_DEBUG_RUNNING)
                {
                        LOG_DEBUG("enter TARGET_RUNNING");
-                       target->state           = TARGET_RUNNING;
+                       target->state                   = TARGET_RUNNING;
                        target->debug_reason    = DBG_REASON_NOTHALTED;
                }
        }
@@ -1072,22 +1067,20 @@ int arm11_get_gdb_reg_list(struct target_s *target, struct reg_s **reg_list[], i
        *reg_list_size  = ARM11_GDB_REGISTER_COUNT;
        *reg_list               = malloc(sizeof(reg_t*) * ARM11_GDB_REGISTER_COUNT);
 
-       {size_t i;
-       for (i = 16; i < 24; i++)
+       for (size_t i = 16; i < 24; i++)
        {
                (*reg_list)[i] = &arm11_gdb_dummy_fp_reg;
-       }}
+       }
 
        (*reg_list)[24] = &arm11_gdb_dummy_fps_reg;
 
-       {size_t i;
-       for (i = 0; i < ARM11_REGCACHE_COUNT; i++)
+       for (size_t i = 0; i < ARM11_REGCACHE_COUNT; i++)
        {
                if (arm11_reg_defs[i].gdb_num == -1)
                        continue;
 
                (*reg_list)[arm11_reg_defs[i].gdb_num] = arm11->reg_list + i;
-       }}
+       }
 
        return ERROR_OK;
 }
@@ -1123,8 +1116,7 @@ int arm11_read_memory(struct target_s *target, u32 address, u32 size, u32 count,
                /** \todo TODO: check if dirty is the right choice to force a rewrite on arm11_resume() */
                arm11->reg_list[ARM11_RC_R1].dirty = 1;
 
-               {size_t i;
-               for (i = 0; i < count; i++)
+               for (size_t i = 0; i < count; i++)
                {
                        /* ldrb    r1, [r0], #1 */
                        /* ldrb    r1, [r0] */
@@ -1136,7 +1128,7 @@ int arm11_read_memory(struct target_s *target, u32 address, u32 size, u32 count,
                        arm11_run_instr_data_from_core(arm11, 0xEE001E15, &res, 1);
 
                        *buffer++ = res;
-               }}
+               }
 
                break;
 
@@ -1205,8 +1197,7 @@ int arm11_write_memory(struct target_s *target, u32 address, u32 size, u32 count
                {
                        arm11->reg_list[ARM11_RC_R1].dirty = 1;
 
-                       {size_t i;
-                       for (i = 0; i < count; i++)
+                       for (size_t i = 0; i < count; i++)
                        {
                                /* MRC p14,0,r1,c0,c5,0 */
                                arm11_run_instr_data_to_core1(arm11, 0xee101e15, *buffer++);
@@ -1215,7 +1206,7 @@ int arm11_write_memory(struct target_s *target, u32 address, u32 size, u32 count
                                /* strb    r1, [r0] */
                                arm11_run_instr_no_data1(arm11,
                                        !arm11_config_memrw_no_increment ? 0xe4c01001 : 0xe5c01000);
-                       }}
+                       }
 
                        break;
                }
@@ -1381,21 +1372,14 @@ int arm11_run_algorithm(struct target_s *target, int num_mem_params, mem_param_t
                        int timeout_ms, void *arch_info)
 {
                arm11_common_t *arm11 = target->arch_info;
-       armv4_5_algorithm_t *arm11_algorithm_info = arch_info;
 //     enum armv4_5_state core_state = arm11->core_state;
 //     enum armv4_5_mode core_mode = arm11->core_mode;
        u32 context[16];
        u32 cpsr;
        int exit_breakpoint_size = 0;
-       int i;
        int retval = ERROR_OK;
                LOG_DEBUG("Running algorithm");
 
-       if (arm11_algorithm_info->common_magic != ARMV4_5_COMMON_MAGIC)
-       {
-               LOG_ERROR("current target isn't an ARMV4/5 target");
-               return ERROR_TARGET_INVALID;
-       }
 
        if (target->state != TARGET_HALTED)
        {
@@ -1408,22 +1392,22 @@ int arm11_run_algorithm(struct target_s *target, int num_mem_params, mem_param_t
 //             return ERROR_FAIL;
 
        // Save regs
-       for (i = 0; i < 16; i++)
+       for (size_t i = 0; i < 16; i++)
        {
                context[i] = buf_get_u32((u8*)(&arm11->reg_values[i]),0,32);
-               LOG_DEBUG("Save %i: 0x%x",i,context[i]);
+               LOG_DEBUG("Save %zi: 0x%x",i,context[i]);
        }
 
        cpsr = buf_get_u32((u8*)(arm11->reg_values+ARM11_RC_CPSR),0,32);
        LOG_DEBUG("Save CPSR: 0x%x", cpsr);
 
-       for (i = 0; i < num_mem_params; i++)
+       for (int i = 0; i < num_mem_params; i++)
        {
                target_write_buffer(target, mem_params[i].address, mem_params[i].size, mem_params[i].value);
        }
 
        // Set register parameters
-       for (i = 0; i < num_reg_params; i++)
+       for (int i = 0; i < num_reg_params; i++)
        {
                reg_t *reg = register_get_by_name(arm11->core_cache, reg_params[i].reg_name, 0);
                if (!reg)
@@ -1454,6 +1438,12 @@ int arm11_run_algorithm(struct target_s *target, int num_mem_params, mem_param_t
                exit(-1);
        }
 */
+
+
+/* arm11 at this point only supports ARM not THUMB mode
+   however if this test needs to be reactivated the current state can be read back
+   from CPSR */
+#if 0
        if (arm11_algorithm_info->core_mode != ARMV4_5_MODE_ANY)
        {
                LOG_DEBUG("setting core_mode: 0x%2.2x", arm11_algorithm_info->core_mode);
@@ -1461,6 +1451,7 @@ int arm11_run_algorithm(struct target_s *target, int num_mem_params, mem_param_t
                arm11->reg_list[ARM11_RC_CPSR].dirty = 1;
                arm11->reg_list[ARM11_RC_CPSR].valid = 1;
        }
+#endif
 
        if ((retval = breakpoint_add(target, exit_point, exit_breakpoint_size, BKPT_HARD)) != ERROR_OK)
        {
@@ -1493,13 +1484,13 @@ int arm11_run_algorithm(struct target_s *target, int num_mem_params, mem_param_t
                goto del_breakpoint;
        }
 
-       for (i = 0; i < num_mem_params; i++)
+       for (int i = 0; i < num_mem_params; i++)
        {
                if (mem_params[i].direction != PARAM_OUT)
                        target_read_buffer(target, mem_params[i].address, mem_params[i].size, mem_params[i].value);
        }
 
-       for (i = 0; i < num_reg_params; i++)
+       for (int i = 0; i < num_reg_params; i++)
        {
                if (reg_params[i].direction != PARAM_OUT)
                {
@@ -1525,7 +1516,7 @@ del_breakpoint:
 
 restore:
        // Restore context
-       for (i = 0; i < 16; i++)
+       for (size_t i = 0; i < 16; i++)
        {
                LOG_DEBUG("restoring register %s with value 0x%8.8x",
                         arm11->reg_list[i].name, context[i]);
@@ -1548,12 +1539,6 @@ int arm11_target_create(struct target_s *target, Jim_Interp *interp)
 
        arm11->target = target;
 
-       /* prepare JTAG information for the new target */
-       arm11->jtag_info.tap    = target->tap;
-       arm11->jtag_info.scann_size     = 5;
-
-       CHECK_RETVAL(arm_jtag_setup_connection(&arm11->jtag_info));
-
        if (target->tap==NULL)
                return ERROR_FAIL;
 
@@ -1646,7 +1631,7 @@ int arm11_examine(struct target_s *target)
 
        arm11_check_init(arm11, NULL);
 
-       target->type->examined = 1;
+       target_set_examined(target);
 
        return ERROR_OK;
 }
@@ -1862,7 +1847,7 @@ arm11_common_t * arm11_find_target(const char * arg)
                        continue;
 
                /* if (t->type == arm11_target) */
-               if (0 == strcmp(t->type->name, "arm11"))
+               if (0 == strcmp(target_get_name(t), "arm11"))
                        return t->arch_info;
        }
 
@@ -1895,8 +1880,7 @@ int arm11_handle_mrc_mcr(struct command_context_s *cmd_ctx, char *cmd, char **ar
 
        u32     values[6];
 
-       {size_t i;
-       for (i = 0; i < (read ? 5 : 6); i++)
+       for (size_t i = 0; i < (read ? 5 : 6); i++)
        {
                values[i] = strtoul(args[i + 1], NULL, 0);
 
@@ -1907,7 +1891,7 @@ int arm11_handle_mrc_mcr(struct command_context_s *cmd_ctx, char *cmd, char **ar
                                read ? arm11_mrc_syntax : arm11_mcr_syntax);
                        return -1;
                }
-       }}
+       }
 
        u32 instr = 0xEE000010  |
                (values[0] <<  8) |
@@ -1970,7 +1954,7 @@ int arm11_register_commands(struct command_context_s *cmd_ctx)
 
                RC_FINAL_BOOL(  "error_fatal",                  "Terminate program if transfer error was found (default: enabled)",
                                                memwrite_error_fatal)
-       )
+       ) /* memwrite */
 
        RC_FINAL_BOOL(          "no_increment",                 "Don't increment address on multi-read/-write (default: disabled)",
                                                memrw_no_increment)
@@ -1986,7 +1970,7 @@ int arm11_register_commands(struct command_context_s *cmd_ctx)
 
        RC_FINAL(                       "mcr",                                  "Write Coprocessor register",
                                                arm11_handle_mcr)
-       )
+       ) /* arm11 */
 
        return ERROR_OK;
 }