target/adiv5: Large Physical Address Extension

[openocd.git] / src / target / aarch64.c

diff --git a/src/target/aarch64.c b/src/target/aarch64.c
index ef00fd1311428fbdd357e70f72dadbd08149da26..d43ade1ff4610a08f0571d2b5ade2d85e7067efe 100644 (file)
--- a/src/target/aarch64.c
+++ b/src/target/aarch64.c
@@ -252,7 +252,7 @@ static int aarch64_init_debug_access(struct target *target)
 
 /* Write to memory mapped registers directly with no cache or mmu handling */
 static int aarch64_dap_write_memap_register_u32(struct target *target,
-       uint32_t address,
+       target_addr_t address,
        uint32_t value)
 {
        int retval;
@@ -1433,7 +1433,7 @@ static int aarch64_set_hybrid_breakpoint(struct target *target, struct breakpoin
        }
 
        breakpoint->set = brp_1 + 1;
-       breakpoint->linked_BRP = brp_2;
+       breakpoint->linked_brp = brp_2;
        control_CTX = ((CTX_machmode & 0x7) << 20)
                | (brp_2 << 16)
                | (0 << 14)
@@ -1495,7 +1495,7 @@ static int aarch64_unset_breakpoint(struct target *target, struct breakpoint *br
        if (breakpoint->type == BKPT_HARD) {
                if ((breakpoint->address != 0) && (breakpoint->asid != 0)) {
                        int brp_i = breakpoint->set - 1;
-                       int brp_j = breakpoint->linked_BRP;
+                       int brp_j = breakpoint->linked_brp;
                        if ((brp_i < 0) || (brp_i >= aarch64->brp_num)) {
                                LOG_DEBUG("Invalid BRP number in breakpoint");
                                return ERROR_OK;
@@ -1545,7 +1545,7 @@ static int aarch64_unset_breakpoint(struct target *target, struct breakpoint *br
                        if (retval != ERROR_OK)
                                return retval;
 
-                       breakpoint->linked_BRP = 0;
+                       breakpoint->linked_brp = 0;
                        breakpoint->set = 0;
                        return ERROR_OK;
 
@@ -2571,7 +2571,7 @@ static int aarch64_examine_first(struct target *target)
        armv8->debug_ap->memaccess_tck = 10;
 
        if (!target->dbgbase_set) {
-               uint32_t dbgbase;
+               target_addr_t dbgbase;
                /* Get ROM Table base */
                uint32_t apid;
                int32_t coreidx = target->coreid;
@@ -2583,7 +2583,7 @@ static int aarch64_examine_first(struct target *target)
                                &armv8->debug_base, &coreidx);
                if (retval != ERROR_OK)
                        return retval;
-               LOG_DEBUG("Detected core %" PRId32 " dbgbase: %08" PRIx32
+               LOG_DEBUG("Detected core %" PRId32 " dbgbase: " TARGET_ADDR_FMT
                                " apid: %08" PRIx32, coreidx, armv8->debug_base, apid);
        } else
                armv8->debug_base = target->dbgbase;