jtagspi/pld: add support from lattice certus driver
[openocd.git] / src / pld / certus.c
index 1309c1b27dfce00ffb7dcb13eb2aead2a5a11d81..8bfdff4952c4ce55e2169e70700d99184364ebbe 100644 (file)
@@ -231,3 +231,76 @@ int lattice_certus_load(struct lattice_pld_device *lattice_device, struct lattic
 
        return lattice_certus_exit_programming_mode(tap);
 }
+
+int lattice_certus_connect_spi_to_jtag(struct lattice_pld_device *pld_device_info)
+{
+       if (!pld_device_info)
+               return ERROR_FAIL;
+
+       struct jtag_tap *tap = pld_device_info->tap;
+       if (!tap)
+               return ERROR_FAIL;
+
+       if (buf_get_u32(tap->cur_instr, 0, tap->ir_length) == PROGRAM_SPI)
+               return ERROR_OK;
+
+       // erase configuration
+       int retval = lattice_preload(pld_device_info);
+       if (retval != ERROR_OK)
+               return retval;
+
+       retval = lattice_certus_enable_programming(tap);
+       if (retval != ERROR_OK)
+               return retval;
+
+       retval = lattice_certus_erase_device(pld_device_info);
+       if (retval != ERROR_OK) {
+               LOG_ERROR("erasing device failed");
+               return retval;
+       }
+
+       retval = lattice_certus_exit_programming_mode(tap);
+       if (retval != ERROR_OK)
+               return retval;
+
+       // connect jtag to spi pins
+       retval = lattice_set_instr(tap, PROGRAM_SPI, TAP_IDLE);
+       if (retval != ERROR_OK)
+               return retval;
+
+       struct scan_field field;
+       uint8_t buffer[2] = {0xfe, 0x68};
+       field.num_bits = 16;
+       field.out_value = buffer;
+       field.in_value = NULL;
+       jtag_add_dr_scan(tap, 1, &field, TAP_IDLE);
+
+       return jtag_execute_queue();
+}
+
+int lattice_certus_disconnect_spi_from_jtag(struct lattice_pld_device *pld_device_info)
+{
+       if (!pld_device_info)
+               return ERROR_FAIL;
+
+       struct jtag_tap *tap = pld_device_info->tap;
+       if (!tap)
+               return ERROR_FAIL;
+
+       /* Connecting it again takes way too long to do it multiple times for writing
+          a bitstream (ca. 0.4s each access).
+          We just leave it connected since SCS will not be active when not in shift_dr state.
+          So there is no need to change instruction, just make sure we are not in shift dr state. */
+       jtag_add_runtest(2, TAP_IDLE);
+       return jtag_execute_queue();
+}
+
+int lattice_certus_get_facing_read_bits(struct lattice_pld_device *pld_device_info, unsigned int *facing_read_bits)
+{
+       if (!pld_device_info)
+               return ERROR_FAIL;
+
+       *facing_read_bits = 0;
+
+       return ERROR_OK;
+}

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