* GNU General Public License for more details. *
* *
* You should have received a copy of the GNU General Public License *
- * along with this program; if not, write to the *
- * Free Software Foundation, Inc., *
- * 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. *
+ * along with this program. If not, see <http://www.gnu.org/licenses/>. *
***************************************************************************/
+
#ifdef HAVE_CONFIG_H
#include "config.h"
#endif
#include <sys/mman.h>
-static uint8_t output_value = 0x0;
+static uint8_t output_value;
static int dev_mem_fd;
static void *gpio_controller;
static volatile uint8_t *gpio_data_register;
static void ep93xx_write(int tck, int tms, int tdi);
static void ep93xx_reset(int trst, int srst);
-static int ep93xx_speed(int speed);
-static int ep93xx_register_commands(struct command_context *cmd_ctx);
static int ep93xx_init(void);
static int ep93xx_quit(void);
struct timespec ep93xx_zzzz;
-struct jtag_interface ep93xx_interface =
-{
+struct jtag_interface ep93xx_interface = {
.name = "ep93xx",
.supported = DEBUG_CAP_TMS_SEQ,
.execute_queue = bitbang_execute_queue,
- .speed = ep93xx_speed,
- .register_commands = ep93xx_register_commands,
.init = ep93xx_init,
.quit = ep93xx_quit,
};
-static struct bitbang_interface ep93xx_bitbang =
-{
+static struct bitbang_interface ep93xx_bitbang = {
.read = ep93xx_read,
.write = ep93xx_write,
.reset = ep93xx_reset,
nanosleep(&ep93xx_zzzz, NULL);
}
-static int ep93xx_speed(int speed)
-{
-
- return ERROR_OK;
-}
-
-static int ep93xx_register_commands(struct command_context *cmd_ctx)
-{
-
- return ERROR_OK;
-}
-
static int set_gonk_mode(void)
{
void *syscon;
gpio_data_register = gpio_controller + 0x08;
gpio_data_direction_register = gpio_controller + 0x18;
- LOG_INFO("gpio_data_register = %p\n", gpio_data_register);
- LOG_INFO("gpio_data_direction_reg = %p\n", gpio_data_direction_register);
+ LOG_INFO("gpio_data_register = %p", gpio_data_register);
+ LOG_INFO("gpio_data_direction_reg = %p", gpio_data_direction_register);
/*
* Configure bit 0 (TDO) as an input, and bits 1-5 (TDI, TCK
* TMS, TRST, SRST) as outputs. Drive TDI and TCK low, and