Jonas Horberg [jhorberg@sauer-danfoss.com]

[openocd.git] / src / jtag / bitbang.c

diff --git a/src/jtag/bitbang.c b/src/jtag/bitbang.c
index 8fbe83deeb68aca2571fe5802ea50eddb832deea..96b4daf346767e2c87c53ad044cc9b2a1bc84a0b 100644 (file)
--- a/src/jtag/bitbang.c
+++ b/src/jtag/bitbang.c
@@ -2,7 +2,7 @@
  *   Copyright (C) 2005 by Dominic Rath                                    *
  *   Dominic.Rath@gmx.de                                                   *
  *                                                                         *
- *   Copyright (C) 2007,2008 Øyvind Harboe                                 *
+ *   Copyright (C) 2007,2008 Øyvind Harboe                                 *
  *   oyvind.harboe@zylin.com                                               *
  *                                                                         *
  *   This program is free software; you can redistribute it and/or modify  *
@@ -46,12 +46,12 @@ bitbang_interface_t *bitbang_interface;
  * Set this to 1 and str912 reset halt will fail.
  *
  * If someone can submit a patch with an explanation it will be greatly
- * appreciated, but as far as I can tell (ØH) DCLK is generated upon
+ * appreciated, but as far as I can tell (ØH) DCLK is generated upon
  * clk = 0 in TAP_IDLE. Good luck deducing that from the ARM documentation!
  * The ARM documentation uses the term "DCLK is asserted while in the TAP_IDLE
  * state". With hardware there is no such thing as *while* in a state. There
  * are only edges. So clk => 0 is in fact a very subtle state transition that
- * happens *while* in the TAP_IDLE state. "#&¤"#¤&"#&"#&
+ * happens *while* in the TAP_IDLE state. "#&¤"#¤&"#&"#&
  *
  * For "reset halt" the last thing that happens before srst is asserted
  * is that the breakpoint is set up. If DCLK is not wiggled one last
@@ -266,7 +266,7 @@ int bitbang_execute_queue(void)
                                break;
                        case JTAG_RUNTEST:
 #ifdef _DEBUG_JTAG_IO_
-                               LOG_DEBUG("runtest %i cycles, end in %s", cmd->cmd.runtest->num_cycles, tap_state_name(cmd->cmd.runtest->end_state) );
+                               LOG_DEBUG("runtest %i cycles, end in %s", cmd->cmd.runtest->num_cycles, tap_state_name(cmd->cmd.runtest->end_state));
 #endif
                                bitbang_end_state(cmd->cmd.runtest->end_state);
                                bitbang_runtest(cmd->cmd.runtest->num_cycles);
@@ -295,7 +295,7 @@ int bitbang_execute_queue(void)
                                break;
                        case JTAG_SCAN:
 #ifdef _DEBUG_JTAG_IO_
-                               LOG_DEBUG("%s scan end in %s",  (cmd->cmd.scan->ir_scan) ? "IR" : "DR", tap_state_name(cmd->cmd.scan->end_state) );
+                               LOG_DEBUG("%s scan end in %s",  (cmd->cmd.scan->ir_scan) ? "IR" : "DR", tap_state_name(cmd->cmd.scan->end_state));
 #endif
                                bitbang_end_state(cmd->cmd.scan->end_state);
                                scan_size = jtag_build_buffer(cmd->cmd.scan, &buffer);
@@ -308,7 +308,7 @@ int bitbang_execute_queue(void)
                                break;
                        case JTAG_SLEEP:
 #ifdef _DEBUG_JTAG_IO_
-                               LOG_DEBUG("sleep %i", cmd->cmd.sleep->us);
+                               LOG_DEBUG("sleep %" PRIi32, cmd->cmd.sleep->us);
 #endif
                                jtag_sleep(cmd->cmd.sleep->us);
                                break;