typedef struct s3c24xx_nand_controller_s
{
struct target_s *target;
-
+
/* register addresses */
- u32 cmd;
- u32 addr;
- u32 data;
- u32 nfstat;
+ uint32_t cmd;
+ uint32_t addr;
+ uint32_t data;
+ uint32_t nfstat;
} s3c24xx_nand_controller_t;
/* Default to using the un-translated NAND register based address */
extern int s3c24xx_register_commands(struct command_context_s *cmd_ctx);
extern int s3c24xx_reset(struct nand_device_s *device);
-extern int s3c24xx_command(struct nand_device_s *device, u8 command);
-extern int s3c24xx_address(struct nand_device_s *device, u8 address);
-extern int s3c24xx_write_data(struct nand_device_s *device, u16 data);
+extern int s3c24xx_command(struct nand_device_s *device, uint8_t command);
+extern int s3c24xx_address(struct nand_device_s *device, uint8_t address);
+extern int s3c24xx_write_data(struct nand_device_s *device, uint16_t data);
extern int s3c24xx_read_data(struct nand_device_s *device, void *data);
extern int s3c24xx_controller_ready(struct nand_device_s *device, int tout);
extern int s3c2440_nand_ready(struct nand_device_s *device, int timeout);
-extern int s3c2440_read_block_data(struct nand_device_s *, u8 *data, int data_size);
-extern int s3c2440_write_block_data(struct nand_device_s *, u8 *data, int data_size);
+extern int s3c2440_read_block_data(struct nand_device_s *, uint8_t *data, int data_size);
+extern int s3c2440_write_block_data(struct nand_device_s *, uint8_t *data, int data_size);