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The following patches was applied:
[openocd.git] / src / flash / pic32mx.c
diff --git a/src/flash/pic32mx.c b/src/flash/pic32mx.c
index c2593ce258be4923aa74d726464ec7537e8b04fd..3fa79e5287f318d18e7c23592d50f4bb2d144a1e 100644 (file)
--- a/src/flash/pic32mx.c
+++ b/src/flash/pic32mx.c
@@ -66,24 +66,26 @@ struct pic32mx_devs_s {
        { 0x00, NULL, 0 }
 };
 
-int pic32mx_register_commands(struct command_context_s *cmd_ctx);
-int pic32mx_flash_bank_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc, struct flash_bank_s *bank);
-int pic32mx_erase(struct flash_bank_s *bank, int first, int last);
-int pic32mx_protect(struct flash_bank_s *bank, int set, int first, int last);
-int pic32mx_write(struct flash_bank_s *bank, u8 *buffer, u32 offset, u32 count);
-int pic32mx_probe(struct flash_bank_s *bank);
-int pic32mx_auto_probe(struct flash_bank_s *bank);
-int pic32mx_handle_part_id_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc);
-int pic32mx_protect_check(struct flash_bank_s *bank);
-int pic32mx_info(struct flash_bank_s *bank, char *buf, int buf_size);
+static int pic32mx_register_commands(struct command_context_s *cmd_ctx);
+static int pic32mx_flash_bank_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc, struct flash_bank_s *bank);
+static int pic32mx_erase(struct flash_bank_s *bank, int first, int last);
+static int pic32mx_protect(struct flash_bank_s *bank, int set, int first, int last);
+static int pic32mx_write(struct flash_bank_s *bank, u8 *buffer, u32 offset, u32 count);
+static int pic32mx_write_row(struct flash_bank_s *bank, u32 address, u32 srcaddr);
+static int pic32mx_write_word(struct flash_bank_s *bank, u32 address, u32 word);
+static int pic32mx_probe(struct flash_bank_s *bank);
+static int pic32mx_auto_probe(struct flash_bank_s *bank);
+//static int pic32mx_handle_part_id_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc);
+static int pic32mx_protect_check(struct flash_bank_s *bank);
+static int pic32mx_info(struct flash_bank_s *bank, char *buf, int buf_size);
 
 #if 0
 int pic32mx_handle_lock_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc);
 int pic32mx_handle_unlock_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc);
 #endif
-int pic32mx_handle_chip_erase_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc);
-int pic32mx_handle_pgm_word_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc);
-int pic32mx_chip_erase(struct flash_bank_s *bank);
+static int pic32mx_handle_chip_erase_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc);
+static int pic32mx_handle_pgm_word_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc);
+//static int pic32mx_chip_erase(struct flash_bank_s *bank);
 
 flash_driver_t pic32mx_flash =
 {
@@ -100,7 +102,7 @@ flash_driver_t pic32mx_flash =
        .info = pic32mx_info
 };
 
-int pic32mx_register_commands(struct command_context_s *cmd_ctx)
+static int pic32mx_register_commands(struct command_context_s *cmd_ctx)
 {
        command_t *pic32mx_cmd = register_command(cmd_ctx, NULL, "pic32mx", NULL, COMMAND_ANY, "pic32mx flash specific commands");
 
@@ -119,7 +121,7 @@ int pic32mx_register_commands(struct command_context_s *cmd_ctx)
 
 /* flash bank pic32mx <base> <size> 0 0 <target#>
  */
-int pic32mx_flash_bank_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc, struct flash_bank_s *bank)
+static int pic32mx_flash_bank_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc, struct flash_bank_s *bank)
 {
        pic32mx_flash_bank_t *pic32mx_info;
 
@@ -138,7 +140,7 @@ int pic32mx_flash_bank_command(struct command_context_s *cmd_ctx, char *cmd, cha
        return ERROR_OK;
 }
 
-u32 pic32mx_get_flash_status(flash_bank_t *bank)
+static u32 pic32mx_get_flash_status(flash_bank_t *bank)
 {
        target_t *target = bank->target;
        u32 status;
@@ -148,7 +150,7 @@ u32 pic32mx_get_flash_status(flash_bank_t *bank)
        return status;
 }
 
-u32 pic32mx_wait_status_busy(flash_bank_t *bank, int timeout)
+static u32 pic32mx_wait_status_busy(flash_bank_t *bank, int timeout)
 {
        u32 status;
 
@@ -164,7 +166,7 @@ u32 pic32mx_wait_status_busy(flash_bank_t *bank, int timeout)
        return status;
 }
 
-int pic32mx_nvm_exec(struct flash_bank_s *bank, u32 op, u32 timeout)
+static int pic32mx_nvm_exec(struct flash_bank_s *bank, u32 op, u32 timeout)
 {
        target_t *target = bank->target;
        u32 status;
@@ -186,10 +188,9 @@ int pic32mx_nvm_exec(struct flash_bank_s *bank, u32 op, u32 timeout)
        return status;
 }
 
-int pic32mx_protect_check(struct flash_bank_s *bank)
+static int pic32mx_protect_check(struct flash_bank_s *bank)
 {
        target_t *target = bank->target;
-       pic32mx_flash_bank_t *pic32mx_info = bank->driver_priv;
 
        u32 devcfg0;
        int s;
@@ -221,7 +222,7 @@ int pic32mx_protect_check(struct flash_bank_s *bank)
        return ERROR_OK;
 }
 
-int pic32mx_erase(struct flash_bank_s *bank, int first, int last)
+static int pic32mx_erase(struct flash_bank_s *bank, int first, int last)
 {
        target_t *target = bank->target;
        int i;
@@ -233,9 +234,9 @@ int pic32mx_erase(struct flash_bank_s *bank, int first, int last)
                return ERROR_TARGET_NOT_HALTED;
        }
 
-#if 0
        if ((first == 0) && (last == (bank->num_sectors - 1)) && (bank->base == PIC32MX_KSEG0_PGM_FLASH || bank->base == PIC32MX_KSEG1_PGM_FLASH))
        {
+               LOG_DEBUG("Erasing entire program flash");
                status = pic32mx_nvm_exec(bank, NVMCON_OP_PFM_ERASE, 50);
                if( status & NVMCON_NVMERR )
                        return ERROR_FLASH_OPERATION_FAILED;
@@ -243,11 +244,13 @@ int pic32mx_erase(struct flash_bank_s *bank, int first, int last)
                        return ERROR_FLASH_OPERATION_FAILED;
                return ERROR_OK;
        }
-#endif
 
        for (i = first; i <= last; i++)
        {
-               target_write_u32(target, PIC32MX_NVMADDR, bank->base + bank->sectors[i].offset);
+               if(bank->base >= PIC32MX_KSEG1_PGM_FLASH)
+                       target_write_u32(target, PIC32MX_NVMADDR, KS1Virt2Phys(bank->base + bank->sectors[i].offset));
+               else
+                       target_write_u32(target, PIC32MX_NVMADDR, KS0Virt2Phys(bank->base + bank->sectors[i].offset));
 
                status = pic32mx_nvm_exec(bank, NVMCON_OP_PAGE_ERASE, 10);
 
@@ -261,14 +264,16 @@ int pic32mx_erase(struct flash_bank_s *bank, int first, int last)
        return ERROR_OK;
 }
 
-int pic32mx_protect(struct flash_bank_s *bank, int set, int first, int last)
+static int pic32mx_protect(struct flash_bank_s *bank, int set, int first, int last)
 {
        pic32mx_flash_bank_t *pic32mx_info = NULL;
        target_t *target = bank->target;
+#if 0
        u16 prot_reg[4] = {0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF};
        int i, reg, bit;
        int status;
        u32 protection;
+#endif
 
        pic32mx_info = bank->driver_priv;
 
@@ -352,17 +357,16 @@ int pic32mx_protect(struct flash_bank_s *bank, int set, int first, int last)
 #endif
 }
 
-int pic32mx_write_block(struct flash_bank_s *bank, u8 *buffer, u32 offset, u32 count)
+static int pic32mx_write_block(struct flash_bank_s *bank, u8 *buffer, u32 offset, u32 count)
 {
-       pic32mx_flash_bank_t *pic32mx_info = bank->driver_priv;
        target_t *target = bank->target;
-       u32 buffer_size = 8192;
+       u32 buffer_size = 512;
        working_area_t *source;
        u32 address = bank->base + offset;
-       reg_param_t reg_params[4];
+       int retval = ERROR_OK;
 #if 0
+       pic32mx_flash_bank_t *pic32mx_info = bank->driver_priv;
        armv7m_algorithm_t armv7m_info;
-       int retval = ERROR_OK;
 
        u8 pic32mx_flash_write_code[] = {
                                                                        /* write: */
@@ -395,40 +399,34 @@ int pic32mx_write_block(struct flash_bank_s *bank, u8 *buffer, u32 offset, u32 c
 
        if ((retval=target_write_buffer(target, pic32mx_info->write_algorithm->address, sizeof(pic32mx_flash_write_code), pic32mx_flash_write_code))!=ERROR_OK)
                return retval;
+#endif
 
        /* memory buffer */
-       while (target_alloc_working_area(target, buffer_size, &source) != ERROR_OK)
+       if (target_alloc_working_area(target, buffer_size, &source) != ERROR_OK)
        {
-               buffer_size /= 2;
-               if (buffer_size <= 256)
-               {
-                       /* if we already allocated the writing code, but failed to get a buffer, free the algorithm */
-                       if (pic32mx_info->write_algorithm)
-                               target_free_working_area(target, pic32mx_info->write_algorithm);
-
-                       LOG_WARNING("no large enough working area available, can't do block memory writes");
-                       return ERROR_TARGET_RESOURCE_NOT_AVAILABLE;
-               }
-       };
-
-       armv7m_info.common_magic = ARMV7M_COMMON_MAGIC;
-       armv7m_info.core_mode = ARMV7M_MODE_ANY;
+#if 0
+               /* if we already allocated the writing code, but failed to get a buffer, free the algorithm */
+               if (pic32mx_info->write_algorithm)
+                       target_free_working_area(target, pic32mx_info->write_algorithm);
+#endif
 
-       init_reg_param(&reg_params[0], "r0", 32, PARAM_OUT);
-       init_reg_param(&reg_params[1], "r1", 32, PARAM_OUT);
-       init_reg_param(&reg_params[2], "r2", 32, PARAM_OUT);
-       init_reg_param(&reg_params[3], "r3", 32, PARAM_IN);
+               LOG_WARNING("no large enough working area available, can't do block memory writes");
+               return ERROR_TARGET_RESOURCE_NOT_AVAILABLE;
+       }
 
-       while (count > 0)
+       while (count >= buffer_size/4)
        {
-               u32 thisrun_count = (count > (buffer_size / 2)) ? (buffer_size / 2) : count;
+               u32 status;
 
-               if ((retval = target_write_buffer(target, source->address, thisrun_count * 2, buffer))!=ERROR_OK)
+               if ((retval = target_write_buffer(target, source->address, buffer_size, buffer))!=ERROR_OK) {
+                       LOG_ERROR("Failed to write row buffer (%d words) to RAM", buffer_size/4);
                        break;
+               }
 
+#if 0
                buf_set_u32(reg_params[0].value, 0, 32, source->address);
                buf_set_u32(reg_params[1].value, 0, 32, address);
-               buf_set_u32(reg_params[2].value, 0, 32, thisrun_count);
+               buf_set_u32(reg_params[2].value, 0, 32, buffer_size/4);
 
                if ((retval = target->type->run_algorithm(target, 0, NULL, 4, reg_params, pic32mx_info->write_algorithm->address, \
                                pic32mx_info->write_algorithm->address + (sizeof(pic32mx_flash_write_code) - 10), 10000, &armv7m_info)) != ERROR_OK)
@@ -443,39 +441,86 @@ int pic32mx_write_block(struct flash_bank_s *bank, u8 *buffer, u32 offset, u32 c
                        retval = ERROR_FLASH_OPERATION_FAILED;
                        break;
                }
+#endif
+               status = pic32mx_write_row(bank, address, source->address);
+               if( status & NVMCON_NVMERR ) {
+                       LOG_ERROR("Flash write error NVMERR (status=0x%08x)", status);
+                       retval = ERROR_FLASH_OPERATION_FAILED;
+                       break;
+               }
+               if( status & NVMCON_LVDERR ) {
+                       LOG_ERROR("Flash write error LVDERR (status=0x%08x)", status);
+                       retval = ERROR_FLASH_OPERATION_FAILED;
+                       break;
+               }
 
-               buffer += thisrun_count * 2;
-               address += thisrun_count * 2;
-               count -= thisrun_count;
+               buffer  += buffer_size;
+               address += buffer_size;
+               count   -= buffer_size/4;
        }
 
        target_free_working_area(target, source);
-       target_free_working_area(target, pic32mx_info->write_algorithm);
 
-       destroy_reg_param(&reg_params[0]);
-       destroy_reg_param(&reg_params[1]);
-       destroy_reg_param(&reg_params[2]);
-       destroy_reg_param(&reg_params[3]);
+       while(count > 0)
+       {
+               u32 status;
+
+               status = pic32mx_write_word(bank, address, *(u32*)buffer);
+               if( status & NVMCON_NVMERR ) {
+                       LOG_ERROR("Flash write error NVMERR (status=0x%08x)", status);
+                       retval = ERROR_FLASH_OPERATION_FAILED;
+                       break;
+               }
+               if( status & NVMCON_LVDERR ) {
+                       LOG_ERROR("Flash write error LVDERR (status=0x%08x)", status);
+                       retval = ERROR_FLASH_OPERATION_FAILED;
+                       break;
+               }
+
+               buffer  += 4;
+               address += 4;
+               count--;
+       }
 
        return retval;
-#else
-       return ERROR_TARGET_RESOURCE_NOT_AVAILABLE;
-#endif
 }
 
-int pic32mx_write_word(struct flash_bank_s *bank, u32 address, u32 word)
+static int pic32mx_write_word(struct flash_bank_s *bank, u32 address, u32 word)
 {
        target_t *target = bank->target;
 
-       target_write_u32(target, PIC32MX_NVMADDR, address);
+       if(bank->base >= PIC32MX_KSEG1_PGM_FLASH)
+               target_write_u32(target, PIC32MX_NVMADDR, KS1Virt2Phys(address));
+       else
+               target_write_u32(target, PIC32MX_NVMADDR, KS0Virt2Phys(address));
        target_write_u32(target, PIC32MX_NVMDATA, word);
 
        return pic32mx_nvm_exec(bank, NVMCON_OP_WORD_PROG, 5);
 }
 
-int pic32mx_write(struct flash_bank_s *bank, u8 *buffer, u32 offset, u32 count)
+/*
+ * Write a 128 word (512 byte) row to flash address from RAM srcaddr.
+ */
+static int pic32mx_write_row(struct flash_bank_s *bank, u32 address, u32 srcaddr)
 {
        target_t *target = bank->target;
+
+       LOG_DEBUG("addr: 0x%08x srcaddr: 0x%08x", address, srcaddr);
+
+       if(address >= PIC32MX_KSEG1_PGM_FLASH)
+               target_write_u32(target, PIC32MX_NVMADDR,    KS1Virt2Phys(address));
+       else
+               target_write_u32(target, PIC32MX_NVMADDR,    KS0Virt2Phys(address));
+       if(srcaddr >= PIC32MX_KSEG1_RAM)
+               target_write_u32(target, PIC32MX_NVMSRCADDR, KS1Virt2Phys(srcaddr));
+       else
+               target_write_u32(target, PIC32MX_NVMSRCADDR, KS0Virt2Phys(srcaddr));
+
+       return pic32mx_nvm_exec(bank, NVMCON_OP_ROW_PROG, 100);
+}
+
+static int pic32mx_write(struct flash_bank_s *bank, u8 *buffer, u32 offset, u32 count)
+{
        u32 words_remaining = (count / 4);
        u32 bytes_remaining = (count & 0x00000003);
        u32 address = bank->base + offset;
@@ -559,7 +604,7 @@ int pic32mx_write(struct flash_bank_s *bank, u8 *buffer, u32 offset, u32 count)
        return ERROR_OK;
 }
 
-int pic32mx_probe(struct flash_bank_s *bank)
+static int pic32mx_probe(struct flash_bank_s *bank)
 {
        target_t *target = bank->target;
        pic32mx_flash_bank_t *pic32mx_info = bank->driver_priv;
@@ -638,7 +683,7 @@ int pic32mx_probe(struct flash_bank_s *bank)
        return ERROR_OK;
 }
 
-int pic32mx_auto_probe(struct flash_bank_s *bank)
+static int pic32mx_auto_probe(struct flash_bank_s *bank)
 {
        pic32mx_flash_bank_t *pic32mx_info = bank->driver_priv;
        if (pic32mx_info->probed)
@@ -646,12 +691,14 @@ int pic32mx_auto_probe(struct flash_bank_s *bank)
        return pic32mx_probe(bank);
 }
 
-int pic32mx_handle_part_id_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc)
+#if 0
+static int pic32mx_handle_part_id_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc)
 {
        return ERROR_OK;
 }
+#endif
 
-int pic32mx_info(struct flash_bank_s *bank, char *buf, int buf_size)
+static int pic32mx_info(struct flash_bank_s *bank, char *buf, int buf_size)
 {
        target_t *target = bank->target;
        mips32_common_t *mips32 = target->arch_info;
@@ -778,10 +825,13 @@ int pic32mx_handle_unlock_command(struct command_context_s *cmd_ctx, char *cmd,
 }
 #endif
 
-int pic32mx_chip_erase(struct flash_bank_s *bank)
+#if 0
+static int pic32mx_chip_erase(struct flash_bank_s *bank)
 {
        target_t *target = bank->target;
+#if 0
        u32 status;
+#endif
 
        if (target->state != TARGET_HALTED)
        {
@@ -819,13 +869,14 @@ int pic32mx_chip_erase(struct flash_bank_s *bank)
 
        return ERROR_OK;
 }
+#endif
 
-int pic32mx_handle_chip_erase_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc)
+static int pic32mx_handle_chip_erase_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc)
 {
+#if 0
        flash_bank_t *bank;
        int i;
 
-#if 0
        if (argc != 0)
        {
                command_print(cmd_ctx, "pic32mx chip_erase");
@@ -858,11 +909,10 @@ int pic32mx_handle_chip_erase_command(struct command_context_s *cmd_ctx, char *c
        return ERROR_OK;
 }
 
-int pic32mx_handle_pgm_word_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc)
+static int pic32mx_handle_pgm_word_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc)
 {
        flash_bank_t *bank;
        u32 address, value;
-       int i;
        int status, res;
 
        if (argc != 3)
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Linking to existing account procedure

If you already have an account and want to add another login method you MUST first sign in with your existing account and then change URL to read https://review.openocd.org/login/?link to get to this page again but this time it'll work for linking. Thank you.

SSH host keys fingerprints

1024 SHA256:YKx8b7u5ZWdcbp7/4AeXNaqElP49m6QrwfXaqQGJAOk gerrit-code-review@openocd.zylin.com (DSA)
384 SHA256:jHIbSQa4REvwCFG4cq5LBlBLxmxSqelQPem/EXIrxjk gerrit-code-review@openocd.org (ECDSA)
521 SHA256:UAOPYkU9Fjtcao0Ul/Rrlnj/OsQvt+pgdYSZ4jOYdgs gerrit-code-review@openocd.org (ECDSA)
256 SHA256:A13M5QlnozFOvTllybRZH6vm7iSt0XLxbA48yfc2yfY gerrit-code-review@openocd.org (ECDSA)
256 SHA256:spYMBqEYoAOtK7yZBrcwE8ZpYt6b68Cfh9yEVetvbXg gerrit-code-review@openocd.org (ED25519)
+--[ED25519 256]--+
|=..              |
|+o..   .         |
|*.o   . .        |
|+B . . .         |
|Bo. = o S        |
|Oo.+ + =         |
|oB=.* = . o      |
| =+=.+   + E     |
|. .=o   . o      |
+----[SHA256]-----+
2048 SHA256:0Onrb7/PHjpo6iVZ7xQX2riKN83FJ3KGU0TvI0TaFG4 gerrit-code-review@openocd.zylin.com (RSA)