static int str9xpec_set_address(struct flash_bank *bank, uint8_t sector);
static int str9xpec_write_options(struct flash_bank *bank);
-int str9xpec_set_instr(struct jtag_tap *tap, uint32_t new_instr, tap_state_t end_state)
+static int str9xpec_set_instr(struct jtag_tap *tap, uint32_t new_instr, tap_state_t end_state)
{
if (tap == NULL) {
return ERROR_TARGET_INVALID;
{
struct scan_field field;
- field.tap = tap;
field.num_bits = tap->ir_length;
- field.out_value = calloc(DIV_ROUND_UP(field.num_bits, 8), 1);
- buf_set_u32(field.out_value, 0, field.num_bits, new_instr);
+ void * t = calloc(DIV_ROUND_UP(field.num_bits, 8), 1);
+ field.out_value = t;
+ buf_set_u32(t, 0, field.num_bits, new_instr);
field.in_value = NULL;
- jtag_add_ir_scan(1, &field, end_state);
+ jtag_add_ir_scan(tap, &field, end_state);
- free(field.out_value);
+ free(t);
}
return ERROR_OK;
if (str9xpec_set_instr(tap, ISC_NOOP, TAP_IRPAUSE) != ERROR_OK)
return ISC_STATUS_ERROR;
- field.tap = tap;
field.num_bits = 8;
field.out_value = NULL;
field.in_value = &status;
- jtag_add_dr_scan(1, &field, jtag_set_end_state(TAP_IDLE));
+ jtag_add_dr_scan(tap, 1, &field, TAP_IDLE);
jtag_execute_queue();
LOG_DEBUG("status: 0x%2.2x", status);
/* execute ISC_CONFIGURATION command */
str9xpec_set_instr(tap, ISC_CONFIGURATION, TAP_IRPAUSE);
- field.tap = tap;
field.num_bits = 64;
field.out_value = NULL;
field.in_value = str9xpec_info->options;
- jtag_add_dr_scan(1, &field, jtag_set_end_state(TAP_IDLE));
+ jtag_add_dr_scan(tap, 1, &field, TAP_IDLE);
jtag_execute_queue();
status = str9xpec_isc_status(tap);
/* execute ISC_BLANK_CHECK command */
str9xpec_set_instr(tap, ISC_BLANK_CHECK, TAP_IRPAUSE);
- field.tap = tap;
field.num_bits = 64;
field.out_value = buffer;
field.in_value = NULL;
- jtag_add_dr_scan(1, &field, jtag_set_end_state(TAP_IDLE));
+ jtag_add_dr_scan(tap, 1, &field, TAP_IDLE);
jtag_add_sleep(40000);
/* read blank check result */
- field.tap = tap;
field.num_bits = 64;
field.out_value = NULL;
field.in_value = buffer;
- jtag_add_dr_scan(1, &field, TAP_IRPAUSE);
+ jtag_add_dr_scan(tap, 1, &field, TAP_IRPAUSE);
jtag_execute_queue();
status = str9xpec_isc_status(tap);
/* execute ISC_ERASE command */
str9xpec_set_instr(tap, ISC_ERASE, TAP_IRPAUSE);
- field.tap = tap;
field.num_bits = 64;
field.out_value = buffer;
field.in_value = NULL;
- jtag_add_dr_scan(1, &field, jtag_set_end_state(TAP_IDLE));
+ jtag_add_dr_scan(tap, 1, &field, TAP_IDLE);
jtag_execute_queue();
jtag_add_sleep(10);
str9xpec_set_instr(tap, ISC_NOOP, TAP_IRPAUSE);
do {
- field.tap = tap;
field.num_bits = 8;
field.out_value = NULL;
field.in_value = &status;
- jtag_add_dr_scan(1, &field, jtag_get_end_state());
+ jtag_add_dr_scan(tap, 1, &field, TAP_IDLE);
jtag_execute_queue();
} while (!(status & ISC_STATUS_BUSY));
/* set flash controller address */
str9xpec_set_instr(tap, ISC_ADDRESS_SHIFT, TAP_IRPAUSE);
- field.tap = tap;
field.num_bits = 8;
field.out_value = §or;
field.in_value = NULL;
- jtag_add_dr_scan(1, &field, jtag_get_end_state());
+ jtag_add_dr_scan(tap, 1, &field, TAP_IRPAUSE);
return ERROR_OK;
}
-static int str9xpec_write(struct flash_bank *bank, uint8_t *buffer, uint32_t offset, uint32_t count)
+static int str9xpec_write(struct flash_bank *bank, uint8_t *buffer,
+ uint32_t offset, uint32_t count)
{
struct str9xpec_flash_controller *str9xpec_info = bank->driver_priv;
uint32_t dwords_remaining = (count / 8);
{
str9xpec_set_address(bank, str9xpec_info->sector_bits[i]);
- dwords_remaining = dwords_remaining < (bank->sectors[i].size/8) ? dwords_remaining : (bank->sectors[i].size/8);
+ dwords_remaining = dwords_remaining < (bank->sectors[i].size/8)
+ ? dwords_remaining : (bank->sectors[i].size/8);
while (dwords_remaining > 0)
{
str9xpec_set_instr(tap, ISC_PROGRAM, TAP_IRPAUSE);
- field.tap = tap;
field.num_bits = 64;
field.out_value = (buffer + bytes_written);
field.in_value = NULL;
- jtag_add_dr_scan(1, &field, jtag_set_end_state(TAP_IDLE));
+ jtag_add_dr_scan(tap, 1, &field, TAP_IDLE);
/* small delay before polling */
jtag_add_sleep(50);
str9xpec_set_instr(tap, ISC_NOOP, TAP_IRPAUSE);
do {
- field.tap = tap;
field.num_bits = 8;
field.out_value = NULL;
field.in_value = scanbuf;
- jtag_add_dr_scan(1, &field, jtag_get_end_state());
+ jtag_add_dr_scan(tap, 1, &field, TAP_IRPAUSE);
jtag_execute_queue();
status = buf_get_u32(scanbuf, 0, 8);
str9xpec_set_instr(tap, ISC_PROGRAM, TAP_IRPAUSE);
- field.tap = tap;
field.num_bits = 64;
field.out_value = last_dword;
field.in_value = NULL;
- jtag_add_dr_scan(1, &field, jtag_set_end_state(TAP_IDLE));
+ jtag_add_dr_scan(tap, 1, &field, TAP_IDLE);
/* small delay before polling */
jtag_add_sleep(50);
str9xpec_set_instr(tap, ISC_NOOP, TAP_IRPAUSE);
do {
- field.tap = tap;
field.num_bits = 8;
field.out_value = NULL;
field.in_value = scanbuf;
- jtag_add_dr_scan(1, &field, jtag_get_end_state());
+ jtag_add_dr_scan(tap, 1, &field, TAP_IRPAUSE);
jtag_execute_queue();
status = buf_get_u32(scanbuf, 0, 8);
str9xpec_set_instr(tap, ISC_IDCODE, TAP_IRPAUSE);
- field.tap = tap;
field.num_bits = 32;
field.out_value = NULL;
field.in_value = buffer;
- jtag_add_dr_scan(1, &field, jtag_set_end_state(TAP_IDLE));
+ jtag_add_dr_scan(tap, 1, &field, TAP_IDLE);
jtag_execute_queue();
idcode = buf_get_u32(buffer, 0, 32);
/* execute ISC_PROGRAM command */
str9xpec_set_instr(tap, ISC_PROGRAM, TAP_IRPAUSE);
- field.tap = tap;
field.num_bits = 64;
field.out_value = str9xpec_info->options;
field.in_value = NULL;
- jtag_add_dr_scan(1, &field, jtag_set_end_state(TAP_IDLE));
+ jtag_add_dr_scan(tap, 1, &field, TAP_IDLE);
/* small delay before polling */
jtag_add_sleep(50);
str9xpec_set_instr(tap, ISC_NOOP, TAP_IRPAUSE);
do {
- field.tap = tap;
field.num_bits = 8;
field.out_value = NULL;
field.in_value = &status;
- jtag_add_dr_scan(1, &field, jtag_get_end_state());
+ jtag_add_dr_scan(tap, 1, &field, TAP_IRPAUSE);
jtag_execute_queue();
} while (!(status & ISC_STATUS_BUSY));
if ((status & ISC_STATUS_ERROR) != STR9XPEC_ISC_SUCCESS)
return ERROR_FLASH_OPERATION_FAILED;
+ command_print(CMD_CTX, "str9xpec write options complete.\n"
+ "INFO: a reset or power cycle is required "
+ "for the new settings to take effect.");
+
return ERROR_OK;
}
if ((status & ISC_STATUS_ERROR) != STR9XPEC_ISC_SUCCESS)
return ERROR_FLASH_OPERATION_FAILED;
+ command_print(CMD_CTX, "str9xpec unlocked.\n"
+ "INFO: a reset or power cycle is required "
+ "for the new settings to take effect.");
+
return ERROR_OK;
}
},
COMMAND_REGISTRATION_DONE
};
+
static const struct command_registration str9xpec_command_handlers[] = {
{
.name = "str9xpec",
};
struct flash_driver str9xpec_flash = {
- .name = "str9xpec",
- .commands = str9xpec_command_handlers,
- .flash_bank_command = &str9xpec_flash_bank_command,
- .erase = &str9xpec_erase,
- .protect = &str9xpec_protect,
- .write = &str9xpec_write,
- .probe = &str9xpec_probe,
- .auto_probe = &str9xpec_probe,
- .erase_check = &str9xpec_erase_check,
- .protect_check = &str9xpec_protect_check,
- .info = &str9xpec_info,
- };
+ .name = "str9xpec",
+ .commands = str9xpec_command_handlers,
+ .flash_bank_command = str9xpec_flash_bank_command,
+ .erase = str9xpec_erase,
+ .protect = str9xpec_protect,
+ .write = str9xpec_write,
+ .read = default_flash_read,
+ .probe = str9xpec_probe,
+ .auto_probe = str9xpec_probe,
+ .erase_check = str9xpec_erase_check,
+ .protect_check = str9xpec_protect_check,
+ .info = str9xpec_info,
+};