+// SPDX-License-Identifier: GPL-2.0-or-later
+
/*
* PSoC 5LP flash driver
*
* Copyright (c) 2016 Andreas Färber
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program. If not, see <http://www.gnu.org/licenses/>.
*/
#ifdef HAVE_CONFIG_H
#define PM_ACT_CFG0_EN_CLK_SPC (1 << 3)
-#define PHUB_CHx_BASIC_CFG_EN (1 << 0)
-#define PHUB_CHx_BASIC_CFG_WORK_SEP (1 << 5)
+#define PHUB_CHX_BASIC_CFG_EN (1 << 0)
+#define PHUB_CHX_BASIC_CFG_WORK_SEP (1 << 5)
-#define PHUB_CHx_ACTION_CPU_REQ (1 << 0)
+#define PHUB_CHX_ACTION_CPU_REQ (1 << 0)
-#define PHUB_CFGMEMx_CFG0 (1 << 7)
+#define PHUB_CFGMEMX_CFG0 (1 << 7)
-#define PHUB_TDMEMx_ORIG_TD0_NEXT_TD_PTR_LAST (0xff << 16)
-#define PHUB_TDMEMx_ORIG_TD0_INC_SRC_ADDR (1 << 24)
+#define PHUB_TDMEMX_ORIG_TD0_NEXT_TD_PTR_LAST (0xff << 16)
+#define PHUB_TDMEMX_ORIG_TD0_INC_SRC_ADDR (1 << 24)
#define NVL_3_ECCEN (1 << 3)
}
static int psoc5lp_nvl_get_info_command(struct flash_bank *bank,
- char *buf, int buf_size)
+ struct command_invocation *cmd)
{
struct psoc5lp_nvl_flash_bank *psoc_nvl_bank = bank->driver_priv;
char part_number[PART_NUMBER_LEN];
psoc5lp_get_part_number(psoc_nvl_bank->device, part_number);
- snprintf(buf, buf_size, "%s", part_number);
+ command_print_sameline(cmd, "%s", part_number);
return ERROR_OK;
}
return ERROR_OK;
}
-static const struct command_registration psoc5lp_nvl_exec_command_handlers[] = {
- COMMAND_REGISTRATION_DONE
-};
-
-static const struct command_registration psoc5lp_nvl_command_handlers[] = {
- {
- .name = "psoc5lp_nvl",
- .mode = COMMAND_ANY,
- .help = "PSoC 5LP NV Latch command group",
- .usage = "",
- .chain = psoc5lp_nvl_exec_command_handlers,
- },
- COMMAND_REGISTRATION_DONE
-};
-
const struct flash_driver psoc5lp_nvl_flash = {
.name = "psoc5lp_nvl",
- .commands = psoc5lp_nvl_command_handlers,
.flash_bank_command = psoc5lp_nvl_flash_bank_command,
.info = psoc5lp_nvl_get_info_command,
.probe = psoc5lp_nvl_probe,
memset(buf + byte_count, bank->default_padded_value,
EEPROM_ROW_SIZE - byte_count);
- LOG_DEBUG("Padding %d bytes", EEPROM_ROW_SIZE - byte_count);
+ LOG_DEBUG("Padding %" PRIu32 " bytes", EEPROM_ROW_SIZE - byte_count);
retval = psoc5lp_spc_load_row(target, SPC_ARRAY_EEPROM,
buf, EEPROM_ROW_SIZE);
if (retval != ERROR_OK)
return ERROR_OK;
}
-static int psoc5lp_eeprom_get_info_command(struct flash_bank *bank, char *buf, int buf_size)
+static int psoc5lp_eeprom_get_info_command(struct flash_bank *bank, struct command_invocation *cmd)
{
struct psoc5lp_eeprom_flash_bank *psoc_eeprom_bank = bank->driver_priv;
char part_number[PART_NUMBER_LEN];
psoc5lp_get_part_number(psoc_eeprom_bank->device, part_number);
- snprintf(buf, buf_size, "%s", part_number);
+ command_print_sameline(cmd, "%s", part_number);
return ERROR_OK;
}
return ERROR_OK;
}
-static const struct command_registration psoc5lp_eeprom_exec_command_handlers[] = {
- COMMAND_REGISTRATION_DONE
-};
-
-static const struct command_registration psoc5lp_eeprom_command_handlers[] = {
- {
- .name = "psoc5lp_eeprom",
- .mode = COMMAND_ANY,
- .help = "PSoC 5LP EEPROM command group",
- .usage = "",
- .chain = psoc5lp_eeprom_exec_command_handlers,
- },
- COMMAND_REGISTRATION_DONE
-};
-
const struct flash_driver psoc5lp_eeprom_flash = {
.name = "psoc5lp_eeprom",
- .commands = psoc5lp_eeprom_command_handlers,
.flash_bank_command = psoc5lp_eeprom_flash_bank_command,
.info = psoc5lp_eeprom_get_info_command,
.probe = psoc5lp_eeprom_probe,
struct target_memory_check_block *block_array;
block_array = malloc(num_sectors * sizeof(struct target_memory_check_block));
- if (block_array == NULL)
+ if (!block_array)
return ERROR_FAIL;
for (unsigned int i = 0; i < num_sectors; i++) {
retval = target_write_u32(target,
even_row ? PHUB_CH0_BASIC_CFG : PHUB_CH1_BASIC_CFG,
- PHUB_CHx_BASIC_CFG_WORK_SEP | PHUB_CHx_BASIC_CFG_EN);
+ PHUB_CHX_BASIC_CFG_WORK_SEP | PHUB_CHX_BASIC_CFG_EN);
if (retval != ERROR_OK)
goto err_dma;
retval = target_write_u32(target,
even_row ? PHUB_CFGMEM0_CFG0 : PHUB_CFGMEM1_CFG0,
- PHUB_CFGMEMx_CFG0);
+ PHUB_CFGMEMX_CFG0);
if (retval != ERROR_OK)
goto err_dma;
retval = target_write_u32(target,
even_row ? PHUB_TDMEM0_ORIG_TD0 : PHUB_TDMEM1_ORIG_TD0,
- PHUB_TDMEMx_ORIG_TD0_INC_SRC_ADDR |
- PHUB_TDMEMx_ORIG_TD0_NEXT_TD_PTR_LAST |
+ PHUB_TDMEMX_ORIG_TD0_INC_SRC_ADDR |
+ PHUB_TDMEMX_ORIG_TD0_NEXT_TD_PTR_LAST |
((SPC_OPCODE_LEN + 1 + row_size + 3 + SPC_OPCODE_LEN + 5) & 0xfff));
if (retval != ERROR_OK)
goto err_dma;
retval = target_write_u32(target,
even_row ? PHUB_CH0_ACTION : PHUB_CH1_ACTION,
- PHUB_CHx_ACTION_CPU_REQ);
+ PHUB_CHX_ACTION_CPU_REQ);
if (retval != ERROR_OK)
goto err_dma_action;
}
return ERROR_OK;
}
-static int psoc5lp_get_info_command(struct flash_bank *bank, char *buf, int buf_size)
+static int psoc5lp_get_info_command(struct flash_bank *bank, struct command_invocation *cmd)
{
struct psoc5lp_flash_bank *psoc_bank = bank->driver_priv;
char part_number[PART_NUMBER_LEN];
psoc5lp_get_part_number(psoc_bank->device, part_number);
ecc = psoc_bank->ecc_enabled ? "ECC enabled" : "ECC disabled";
- snprintf(buf, buf_size, "%s %s", part_number, ecc);
+ command_print_sameline(cmd, "%s %s", part_number, ecc);
return ERROR_OK;
}
Code Review / openocd.git / blobdiff