static uint32_t in_sram_address;
unsigned char sign_of_sequental_byte_read;
-static int test_iomux_settings (target_t * target, uint32_t value,
+static int test_iomux_settings (struct target * target, uint32_t value,
uint32_t mask, const char *text);
-static int initialize_nf_controller (struct nand_device_s *nand);
-static int get_next_byte_from_sram_buffer (target_t * target, uint8_t * value);
-static int get_next_halfword_from_sram_buffer (target_t * target,
+static int initialize_nf_controller (struct nand_device *nand);
+static int get_next_byte_from_sram_buffer (struct target * target, uint8_t * value);
+static int get_next_halfword_from_sram_buffer (struct target * target,
uint16_t * value);
-static int poll_for_complete_op (target_t * target, const char *text);
-static int validate_target_state (struct nand_device_s *nand);
-static int do_data_output (struct nand_device_s *nand);
+static int poll_for_complete_op (struct target * target, const char *text);
+static int validate_target_state (struct nand_device *nand);
+static int do_data_output (struct nand_device *nand);
-static int imx31_command (struct nand_device_s *nand, uint8_t command);
-static int imx31_address (struct nand_device_s *nand, uint8_t address);
-static int imx31_controller_ready (struct nand_device_s *nand, int tout);
+static int imx31_command (struct nand_device *nand, uint8_t command);
+static int imx31_address (struct nand_device *nand, uint8_t address);
+static int imx31_controller_ready (struct nand_device *nand, int tout);
NAND_DEVICE_COMMAND_HANDLER(imx31_nand_device_command)
{
nand->controller_priv = mx3_nf_info;
- mx3_nf_info->target = get_target (args[1]);
+ mx3_nf_info->target = get_target (CMD_ARGV[1]);
if (mx3_nf_info->target == NULL)
{
- LOG_ERROR ("target '%s' not defined", args[1]);
+ LOG_ERROR ("target '%s' not defined", CMD_ARGV[1]);
return ERROR_FAIL;
}
- if (argc < 3)
+ if (CMD_ARGC < 3)
{
LOG_ERROR ("use \"nand device imx31 target noecc|hwecc\"");
return ERROR_FAIL;
*/
{
int hwecc_needed;
- hwecc_needed = strcmp (args[2], "hwecc");
+ hwecc_needed = strcmp (CMD_ARGV[2], "hwecc");
if (hwecc_needed == 0)
{
mx3_nf_info->flags.hw_ecc_enabled = 1;
return ERROR_OK;
}
-static int imx31_init (struct nand_device_s *nand)
+static int imx31_init (struct nand_device *nand)
{
struct mx3_nf_controller *mx3_nf_info = nand->controller_priv;
- target_t *target = mx3_nf_info->target;
+ struct target *target = mx3_nf_info->target;
{
/*
return ERROR_OK;
}
-static int imx31_read_data (struct nand_device_s *nand, void *data)
+static int imx31_read_data (struct nand_device *nand, void *data)
{
struct mx3_nf_controller *mx3_nf_info = nand->controller_priv;
- target_t *target = mx3_nf_info->target;
+ struct target *target = mx3_nf_info->target;
{
/*
* validate target state
return ERROR_OK;
}
-static int imx31_write_data (struct nand_device_s *nand, uint16_t data)
+static int imx31_write_data (struct nand_device *nand, uint16_t data)
{
LOG_ERROR ("write_data() not implemented");
return ERROR_NAND_OPERATION_FAILED;
}
-static int imx31_nand_ready (struct nand_device_s *nand, int timeout)
+static int imx31_nand_ready (struct nand_device *nand, int timeout)
{
return imx31_controller_ready (nand, timeout);
}
-static int imx31_register_commands (struct command_context_s *cmd_ctx)
-{
- return ERROR_OK;
-}
-
-static int imx31_reset (struct nand_device_s *nand)
+static int imx31_reset (struct nand_device *nand)
{
/*
* validate target state
return ERROR_OK;
}
-static int imx31_command (struct nand_device_s *nand, uint8_t command)
+static int imx31_command (struct nand_device *nand, uint8_t command)
{
struct mx3_nf_controller *mx3_nf_info = nand->controller_priv;
- target_t *target = mx3_nf_info->target;
+ struct target *target = mx3_nf_info->target;
{
/*
* validate target state
return ERROR_OK;
}
-static int imx31_address (struct nand_device_s *nand, uint8_t address)
+static int imx31_address (struct nand_device *nand, uint8_t address)
{
struct mx3_nf_controller *mx3_nf_info = nand->controller_priv;
- target_t *target = mx3_nf_info->target;
+ struct target *target = mx3_nf_info->target;
{
/*
* validate target state
return ERROR_OK;
}
-static int imx31_controller_ready (struct nand_device_s *nand, int tout)
+static int imx31_controller_ready (struct nand_device *nand, int tout)
{
uint16_t poll_complete_status;
struct mx3_nf_controller *mx3_nf_info = nand->controller_priv;
- target_t *target = mx3_nf_info->target;
+ struct target *target = mx3_nf_info->target;
{
/*
return tout;
}
-static int imx31_write_page (struct nand_device_s *nand, uint32_t page,
+static int imx31_write_page (struct nand_device *nand, uint32_t page,
uint8_t * data, uint32_t data_size, uint8_t * oob,
uint32_t oob_size)
{
struct mx3_nf_controller *mx3_nf_info = nand->controller_priv;
- target_t *target = mx3_nf_info->target;
+ struct target *target = mx3_nf_info->target;
if (data_size % 2)
{
return ERROR_OK;
}
-static int imx31_read_page (struct nand_device_s *nand, uint32_t page,
+static int imx31_read_page (struct nand_device *nand, uint32_t page,
uint8_t * data, uint32_t data_size, uint8_t * oob,
uint32_t oob_size)
{
struct mx3_nf_controller *mx3_nf_info = nand->controller_priv;
- target_t *target = mx3_nf_info->target;
+ struct target *target = mx3_nf_info->target;
if (data_size % 2)
{
return ERROR_OK;
}
-static int test_iomux_settings (target_t * target, uint32_t address,
+static int test_iomux_settings (struct target * target, uint32_t address,
uint32_t mask, const char *text)
{
uint32_t register_content;
return ERROR_OK;
}
-static int initialize_nf_controller (struct nand_device_s *nand)
+static int initialize_nf_controller (struct nand_device *nand)
{
struct mx3_nf_controller *mx3_nf_info = nand->controller_priv;
- target_t *target = mx3_nf_info->target;
+ struct target *target = mx3_nf_info->target;
/*
* resets NAND flash controller in zero time ? I dont know.
*/
return ERROR_OK;
}
-static int get_next_byte_from_sram_buffer (target_t * target, uint8_t * value)
+static int get_next_byte_from_sram_buffer (struct target * target, uint8_t * value)
{
static uint8_t even_byte = 0;
/*
return ERROR_OK;
}
-static int get_next_halfword_from_sram_buffer (target_t * target,
+static int get_next_halfword_from_sram_buffer (struct target * target,
uint16_t * value)
{
if (in_sram_address > MX3_NF_LAST_BUFFER_ADDR)
return ERROR_OK;
}
-static int poll_for_complete_op (target_t * target, const char *text)
+static int poll_for_complete_op (struct target * target, const char *text)
{
uint16_t poll_complete_status;
for (int poll_cycle_count = 0; poll_cycle_count < 100; poll_cycle_count++)
return ERROR_OK;
}
-static int validate_target_state (struct nand_device_s *nand)
+static int validate_target_state (struct nand_device *nand)
{
struct mx3_nf_controller *mx3_nf_info = nand->controller_priv;
- target_t *target = mx3_nf_info->target;
+ struct target *target = mx3_nf_info->target;
if (target->state != TARGET_HALTED)
{
return ERROR_OK;
}
-static int do_data_output (struct nand_device_s *nand)
+static int do_data_output (struct nand_device *nand)
{
struct mx3_nf_controller *mx3_nf_info = nand->controller_priv;
- target_t *target = mx3_nf_info->target;
+ struct target *target = mx3_nf_info->target;
switch (mx3_nf_info->fin)
{
case MX3_NF_FIN_DATAOUT:
return ERROR_OK;
}
-nand_flash_controller_t imx31_nand_flash_controller = {
+struct nand_flash_controller imx31_nand_flash_controller = {
.name = "imx31",
.nand_device_command = &imx31_nand_device_command,
- .register_commands = &imx31_register_commands,
.init = &imx31_init,
.reset = &imx31_reset,
.command = &imx31_command,