alive_sleep(1);
timeout--;
target_read_u32(target, F_STAT, &status);
- }while (((status & FS_DONE) == 0) && timeout);
+ } while (((status & FS_DONE) == 0) && timeout);
- if(timeout == 0)
+ if (timeout == 0)
{
LOG_DEBUG("Timedout!");
return ERROR_FLASH_OPERATION_FAILED;
if (cidr != 0x0102100A)
{
- LOG_WARNING("Cannot identify target as an LPC288X (%08X)",cidr);
+ LOG_WARNING("Cannot identify target as an LPC288X (%08" PRIx32 ")",cidr);
return ERROR_FLASH_OPERATION_FAILED;
}
/* part wasn't probed for info yet */
lpc288x_info->cidr = 0;
- lpc288x_info->cclk = strtoul(args[6], NULL, 0);
+ COMMAND_PARSE_NUMBER(u32, args[6], lpc288x_info->cclk);
return ERROR_OK;
}
-/* The frequency is the AHB clock frequency divided by (CLK_DIV ×3) + 1.
- * This must be programmed such that the Flash Programming clock frequency is 66 kHz ± 20%.
+/* The frequency is the AHB clock frequency divided by (CLK_DIV ×3) + 1.
+ * This must be programmed such that the Flash Programming clock frequency is 66 kHz ± 20%.
* AHB = 12 MHz ?
* 12000000/66000 = 182
* CLK_DIV = 60 ? */
/* all writes must start on a sector boundary... */
if (offset % bank->sectors[i].size)
{
- LOG_INFO("offset 0x%x breaks required alignment 0x%x", offset, bank->sectors[i].size);
+ LOG_INFO("offset 0x%" PRIx32 " breaks required alignment 0x%" PRIx32 "", offset, bank->sectors[i].size);
return ERROR_FLASH_DST_BREAKS_ALIGNMENT;
}
}
/* Range check... */
if (first_sector == 0xffffffff || last_sector == 0xffffffff)
{
- LOG_INFO("Range check failed %x %x", offset, count);
+ LOG_INFO("Range check failed %" PRIx32 " %" PRIx32 "", offset, count);
return ERROR_FLASH_DST_OUT_OF_BANK;
}
#if 1
if (target_write_memory(target, offset + dest_offset, 4, 128, page_buffer) != ERROR_OK)
{
- LOG_ERROR("Write failed s %x p %x", sector, page);
+ LOG_ERROR("Write failed s %" PRIx32 " p %" PRIx32 "", sector, page);
return ERROR_FLASH_OPERATION_FAILED;
}
#else