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Piotr Ziecik <kosmo@semihalf.com> Due to errors in chipselect management in davinci_n...
[openocd.git] / src / flash / at91sam7.c
diff --git a/src/flash/at91sam7.c b/src/flash/at91sam7.c
index 55afb6bf4d92888e0cba52e764bff76ef4d10bef..04790617fafb2252177b3dabcd74ad1662aed375 100644 (file)
--- a/src/flash/at91sam7.c
+++ b/src/flash/at91sam7.c
@@ -57,7 +57,7 @@ static int at91sam7_info(struct flash_bank_s *bank, char *buf, int buf_size);
 static uint32_t at91sam7_get_flash_status(target_t *target, int bank_number);
 static void at91sam7_set_flash_mode(flash_bank_t *bank, int mode);
 static uint32_t at91sam7_wait_status_busy(flash_bank_t *bank, uint32_t waitbits, int timeout);
-static int at91sam7_flash_command(struct flash_bank_s *bank, uint8_t cmd, uint16_t pagen); 
+static int at91sam7_flash_command(struct flash_bank_s *bank, uint8_t cmd, uint16_t pagen);
 static int at91sam7_handle_gpnvm_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc);
 
 flash_driver_t at91sam7_flash =
@@ -85,8 +85,8 @@ static char * EPROC[8]= {"Unknown","ARM946-E","ARM7TDMI","Unknown","ARM920T","AR
 static long SRAMSIZ[16] = {
        -1,
        0x0400,         /*  1K */
-       0x0800,         /*  2K */ 
-       -1, 
+       0x0800,         /*  2K */
+       -1,
        0x1c000,        /* 112K */
        0x1000,         /*   4K */
        0x14000,        /*  80K */
@@ -107,7 +107,7 @@ static int at91sam7_register_commands(struct command_context_s *cmd_ctx)
        command_t *at91sam7_cmd = register_command(cmd_ctx, NULL, "at91sam7", NULL, COMMAND_ANY, NULL);
 
        register_command(cmd_ctx, at91sam7_cmd, "gpnvm", at91sam7_handle_gpnvm_command, COMMAND_EXEC,
-                                       "at91sam7 gpnvm <bit> set|clear, set or clear one gpnvm bit");
+                                       "at91sam7 gpnvm <bit> set | clear, set or clear one gpnvm bit");
        return ERROR_OK;
 }
 
@@ -135,10 +135,10 @@ static void at91sam7_read_clock_info(flash_bank_t *bank)
        target_read_u32(target, PMC_MCKR, &mckr);
        /* Read Clock Generator PLL Register  */
        target_read_u32(target, CKGR_PLLR, &pllr);
-       
+
        at91sam7_info->mck_valid = 0;
        at91sam7_info->mck_freq = 0;
-       switch (mckr & PMC_MCKR_CSS) 
+       switch (mckr & PMC_MCKR_CSS)
        {
                case 0:                 /* Slow Clock */
                        at91sam7_info->mck_valid = 1;
@@ -146,7 +146,7 @@ static void at91sam7_read_clock_info(flash_bank_t *bank)
                        break;
 
                case 1:                 /* Main Clock */
-                       if ((mcfr & CKGR_MCFR_MAINRDY) && 
+                       if ((mcfr & CKGR_MCFR_MAINRDY) &&
                                (at91sam7_info->ext_freq == 0))
                        {
                                at91sam7_info->mck_valid = 1;
@@ -163,8 +163,8 @@ static void at91sam7_read_clock_info(flash_bank_t *bank)
                        break;
 
                case 3:                 /* PLL Clock */
-                       if ((mcfr & CKGR_MCFR_MAINRDY) && 
-                               (at91sam7_info->ext_freq == 0)) 
+                       if ((mcfr & CKGR_MCFR_MAINRDY) &&
+                               (at91sam7_info->ext_freq == 0))
                        {
                                target_read_u32(target, CKGR_PLLR, &pllr);
                                if (!(pllr & CKGR_PLLR_DIV))
@@ -187,7 +187,7 @@ static void at91sam7_read_clock_info(flash_bank_t *bank)
        }
 
        /* Prescaler adjust */
-       if ( (((mckr & PMC_MCKR_PRES) >> 2) == 7) || (tmp == 0) )
+       if ((((mckr & PMC_MCKR_PRES) >> 2) == 7) || (tmp == 0))
        {
                at91sam7_info->mck_valid = 0;
                at91sam7_info->mck_freq = 0;
@@ -213,29 +213,29 @@ static void at91sam7_set_flash_mode(flash_bank_t *bank, int mode)
                        if (at91sam7_info->cidr_arch == 0x60)
                        {
                                /* AT91SAM7A3 uses master clocks in 100 ns */
-                               fmcn = (at91sam7_info->mck_freq/10000000ul)+1;
+                               fmcn = (at91sam7_info->mck_freq/10000000ul) + 1;
                        }
                        else
                        {
                                /* master clocks in 1uS for ARCH 0x7 types */
-                               fmcn = (at91sam7_info->mck_freq/1000000ul)+1;
+                               fmcn = (at91sam7_info->mck_freq/1000000ul) + 1;
                        }
                }
                else if (mode == FMR_TIMING_FLASH)
                {
                        /* main clocks in 1.5uS */
                        fmcn = (at91sam7_info->mck_freq/1000000ul)+
-                               (at91sam7_info->mck_freq/2000000ul)+1;
+                               (at91sam7_info->mck_freq/2000000ul) + 1;
                }
 
                /* hard overclocking */
                if (fmcn > 0xFF)
                        fmcn = 0xFF;
 
-               /* Only allow fmcn=0 if clock period is > 30 us = 33kHz. */
+               /* Only allow fmcn = 0 if clock period is > 30 us = 33kHz. */
                if (at91sam7_info->mck_freq <= 33333ul)
                        fmcn = 0;
-               /* Only allow fws=0 if clock frequency is < 30 MHz. */
+               /* Only allow fws = 0 if clock frequency is < 30 MHz. */
                if (at91sam7_info->mck_freq > 30000000ul)
                        fws = 1;
 
@@ -280,11 +280,11 @@ static int at91sam7_flash_command(struct flash_bank_s *bank, uint8_t cmd, uint16
        at91sam7_flash_bank_t *at91sam7_info = bank->driver_priv;
        target_t *target = bank->target;
 
-       fcr = (0x5A<<24) | ((pagen&0x3FF)<<8) | cmd; 
+       fcr = (0x5A << 24) | ((pagen&0x3FF) << 8) | cmd;
        target_write_u32(target, MC_FCR[bank->bank_number], fcr);
-       LOG_DEBUG("Flash command: 0x%" PRIx32 ", flash bank: %i, page number: %u", fcr, bank->bank_number+1, pagen);
+       LOG_DEBUG("Flash command: 0x%" PRIx32 ", flash bank: %i, page number: %u", fcr, bank->bank_number + 1, pagen);
 
-       if ((at91sam7_info->cidr_arch == 0x60) && ((cmd==SLB)|(cmd==CLB)))
+       if ((at91sam7_info->cidr_arch == 0x60) && ((cmd == SLB) | (cmd == CLB)))
        {
                /* Lock bit manipulation on AT91SAM7A3 waits for FC_FSR bit 1, EOL */
                if (at91sam7_wait_status_busy(bank, MC_FSR_EOL, 10)&0x0C)
@@ -294,7 +294,7 @@ static int at91sam7_flash_command(struct flash_bank_s *bank, uint8_t cmd, uint16
                return ERROR_OK;
        }
 
-       if (at91sam7_wait_status_busy(bank, MC_FSR_FRDY, 10)&0x0C) 
+       if (at91sam7_wait_status_busy(bank, MC_FSR_FRDY, 10)&0x0C)
        {
                return ERROR_FLASH_OPERATION_FAILED;
        }
@@ -550,7 +550,7 @@ static int at91sam7_read_part_info(struct flash_bank_s *bank)
        /* calculate bank size  */
        bank_size = sectors_num * pages_per_sector * page_size;
 
-       for (bnk=0; bnk<banks_num; bnk++)
+       for (bnk = 0; bnk < banks_num; bnk++)
        {
                if (bnk > 0)
                {
@@ -575,7 +575,7 @@ static int at91sam7_read_part_info(struct flash_bank_s *bank)
 
                /* allocate sectors */
                t_bank->sectors = malloc(sectors_num * sizeof(flash_sector_t));
-               for (sec=0; sec<sectors_num; sec++)
+               for (sec = 0; sec < sectors_num; sec++)
                {
                        t_bank->sectors[sec].offset = sec * pages_per_sector * page_size;
                        t_bank->sectors[sec].size = pages_per_sector * page_size;
@@ -613,7 +613,7 @@ static int at91sam7_read_part_info(struct flash_bank_s *bank)
                at91sam7_protect_check(t_bank);
        }
 
-       LOG_DEBUG("nvptyp: 0x%3.3x, arch: 0x%4.4x", at91sam7_info->cidr_nvptyp, at91sam7_info->cidr_arch );
+       LOG_DEBUG("nvptyp: 0x%3.3x, arch: 0x%4.4x", at91sam7_info->cidr_nvptyp, at91sam7_info->cidr_arch);
 
        return ERROR_OK;
 }
@@ -635,13 +635,13 @@ static int at91sam7_erase_check(struct flash_bank_s *bank)
        }
 
        /* Configure the flash controller timing */
-       at91sam7_read_clock_info(bank); 
+       at91sam7_read_clock_info(bank);
        at91sam7_set_flash_mode(bank, FMR_TIMING_FLASH);
 
        fast_check = 1;
-       for (nSector=0; nSector<bank->num_sectors; nSector++)
+       for (nSector = 0; nSector < bank->num_sectors; nSector++)
        {
-               retval = target_blank_check_memory(target, bank->base+bank->sectors[nSector].offset,
+               retval = target_blank_check_memory(target, bank->base + bank->sectors[nSector].offset,
                        bank->sectors[nSector].size, &blank);
                if (retval != ERROR_OK)
                {
@@ -662,15 +662,15 @@ static int at91sam7_erase_check(struct flash_bank_s *bank)
        LOG_USER("Running slow fallback erase check - add working memory");
 
        buffer = malloc(bank->sectors[0].size);
-       for (nSector=0; nSector<bank->num_sectors; nSector++)
+       for (nSector = 0; nSector < bank->num_sectors; nSector++)
        {
                bank->sectors[nSector].is_erased = 1;
-               retval = target_read_memory(target, bank->base+bank->sectors[nSector].offset, 4,
+               retval = target_read_memory(target, bank->base + bank->sectors[nSector].offset, 4,
                        bank->sectors[nSector].size/4, buffer);
                if (retval != ERROR_OK)
                        return retval;
 
-               for (nByte=0; nByte<bank->sectors[nSector].size; nByte++)
+               for (nByte = 0; nByte < bank->sectors[nSector].size; nByte++)
                {
                        if (buffer[nByte] != 0xFF)
                        {
@@ -705,9 +705,9 @@ static int at91sam7_protect_check(struct flash_bank_s *bank)
        at91sam7_info->lockbits = (status >> 16);
 
        at91sam7_info->num_lockbits_on = 0;
-       for (lock_pos=0; lock_pos<bank->num_sectors; lock_pos++)
+       for (lock_pos = 0; lock_pos < bank->num_sectors; lock_pos++)
        {
-               if ( ((status >> (16+lock_pos))&(0x0001)) == 1)
+               if (((status >> (16 + lock_pos))&(0x0001)) == 1)
                {
                        at91sam7_info->num_lockbits_on++;
                        bank->sectors[lock_pos].is_protected = 1;
@@ -723,9 +723,9 @@ static int at91sam7_protect_check(struct flash_bank_s *bank)
        at91sam7_info->nvmbits = (status >> 8)&0xFF;
 
        at91sam7_info->num_nvmbits_on = 0;
-       for (gpnvm_pos=0; gpnvm_pos<at91sam7_info->num_nvmbits; gpnvm_pos++)
+       for (gpnvm_pos = 0; gpnvm_pos < at91sam7_info->num_nvmbits; gpnvm_pos++)
        {
-               if ( ((status >> (8+gpnvm_pos))&(0x01)) == 1)
+               if (((status >> (8 + gpnvm_pos))&(0x01)) == 1)
                {
                        at91sam7_info->num_nvmbits_on++;
                }
@@ -803,13 +803,13 @@ static int at91sam7_flash_bank_command(struct command_context_s *cmd_ctx, char *
        page_size = atoi(args[11]);
        num_nvmbits = atoi(args[12]);
 
-       target_name = calloc(strlen(args[7])+1, sizeof(char));
+       target_name = calloc(strlen(args[7]) + 1, sizeof(char));
        strcpy(target_name, args[7]);
 
        /* calculate bank size  */
        bank_size = num_sectors * pages_per_sector * page_size;
 
-       for (bnk=0; bnk<banks_num; bnk++)
+       for (bnk = 0; bnk < banks_num; bnk++)
        {
                if (bnk > 0)
                {
@@ -834,7 +834,7 @@ static int at91sam7_flash_bank_command(struct command_context_s *cmd_ctx, char *
 
                /* allocate sectors */
                t_bank->sectors = malloc(num_sectors * sizeof(flash_sector_t));
-               for (sec=0; sec<num_sectors; sec++)
+               for (sec = 0; sec < num_sectors; sec++)
                {
                        t_bank->sectors[sec].offset = sec * pages_per_sector * page_size;
                        t_bank->sectors[sec].size = pages_per_sector * page_size;
@@ -892,7 +892,7 @@ static int at91sam7_erase(struct flash_bank_s *bank, int first, int last)
 
        if (erase_all)
        {
-               if (at91sam7_flash_command(bank, EA, 0) != ERROR_OK) 
+               if (at91sam7_flash_command(bank, EA, 0) != ERROR_OK)
                {
                        return ERROR_FLASH_OPERATION_FAILED;
                }
@@ -902,12 +902,12 @@ static int at91sam7_erase(struct flash_bank_s *bank, int first, int last)
                /* allocate and clean buffer  */
                nbytes = (last - first + 1) * bank->sectors[first].size;
                buffer = malloc(nbytes * sizeof(uint8_t));
-               for (pos=0; pos<nbytes; pos++)
+               for (pos = 0; pos < nbytes; pos++)
                {
                        buffer[pos] = 0xFF;
                }
 
-               if ( at91sam7_write(bank, buffer, bank->sectors[first].offset, nbytes) != ERROR_OK)
+               if (at91sam7_write(bank, buffer, bank->sectors[first].offset, nbytes) != ERROR_OK)
                {
                        return ERROR_FLASH_OPERATION_FAILED;
                }
@@ -916,7 +916,7 @@ static int at91sam7_erase(struct flash_bank_s *bank, int first, int last)
        }
 
        /* mark erased sectors */
-       for (sec=first; sec <= last; sec++)
+       for (sec = first; sec <= last; sec++)
        {
                bank->sectors[sec].is_erased = 1;
        }
@@ -952,7 +952,7 @@ static int at91sam7_protect(struct flash_bank_s *bank, int set, int first, int l
        at91sam7_read_clock_info(bank);
        at91sam7_set_flash_mode(bank, FMR_TIMING_NVBITS);
 
-       for (sector=first; sector <= last; sector++)
+       for (sector = first; sector <= last; sector++)
        {
                if (set)
                        cmd = SLB;
@@ -1016,9 +1016,9 @@ static int at91sam7_write(struct flash_bank_s *bank, uint8_t *buffer, uint32_t o
        at91sam7_read_clock_info(bank);
        at91sam7_set_flash_mode(bank, FMR_TIMING_FLASH);
 
-       for (pagen=first_page; pagen<last_page; pagen++)
+       for (pagen = first_page; pagen < last_page; pagen++)
        {
-               if (bytes_remaining<dst_min_alignment)
+               if (bytes_remaining < dst_min_alignment)
                        count = bytes_remaining;
                else
                        count = dst_min_alignment;
@@ -1027,7 +1027,7 @@ static int at91sam7_write(struct flash_bank_s *bank, uint8_t *buffer, uint32_t o
                /* Write one block to the PageWriteBuffer */
                buffer_pos = (pagen-first_page)*dst_min_alignment;
                wcount = CEIL(count,4);
-               if ((retval = target_write_memory(target, bank->base+pagen*dst_min_alignment, 4, wcount, buffer+buffer_pos)) != ERROR_OK)
+               if ((retval = target_write_memory(target, bank->base + pagen*dst_min_alignment, 4, wcount, buffer + buffer_pos)) != ERROR_OK)
                {
                        return retval;
                }
@@ -1079,13 +1079,13 @@ static int at91sam7_info(struct flash_bank_s *bank, char *buf, int buf_size)
        buf += printed;
        buf_size -= printed;
 
-       printed = snprintf(buf, 
+       printed = snprintf(buf,
                           buf_size,
                           " Cidr: 0x%8.8" PRIx32 " | Arch: 0x%4.4x | Eproc: %s | Version: 0x%3.3x | Flashsize: 0x%8.8" PRIx32 "\n",
-                          at91sam7_info->cidr, 
-                          at91sam7_info->cidr_arch, 
+                          at91sam7_info->cidr,
+                          at91sam7_info->cidr_arch,
                           EPROC[at91sam7_info->cidr_eproc],
-                          at91sam7_info->cidr_version, 
+                          at91sam7_info->cidr_version,
                           bank->size);
 
        buf += printed;
@@ -1117,10 +1117,10 @@ static int at91sam7_info(struct flash_bank_s *bank, char *buf, int buf_size)
        return ERROR_OK;
 }
 
-/* 
-* On AT91SAM7S: When the gpnvm bits are set with 
+/*
+* On AT91SAM7S: When the gpnvm bits are set with
 * > at91sam7 gpnvm bitnr set
-* the changes are not visible in the flash controller status register MC_FSR 
+* the changes are not visible in the flash controller status register MC_FSR
 * until the processor has been reset.
 * On the Olimex board this requires a power cycle.
 * Note that the AT91SAM7S has the following errata (doc6175.pdf sec 14.1.3):
@@ -1138,7 +1138,7 @@ static int at91sam7_handle_gpnvm_command(struct command_context_s *cmd_ctx, char
 
        if (argc != 2)
        {
-               command_print(cmd_ctx, "at91sam7 gpnvm <bit> <set|clear>");
+               command_print(cmd_ctx, "at91sam7 gpnvm <bit> <set | clear>");
                return ERROR_OK;
        }
 
@@ -1191,7 +1191,7 @@ static int at91sam7_handle_gpnvm_command(struct command_context_s *cmd_ctx, char
        /* Configure the flash controller timing */
        at91sam7_read_clock_info(bank);
        at91sam7_set_flash_mode(bank, FMR_TIMING_NVBITS);
-       
+
        if (at91sam7_flash_command(bank, flashcmd, bit) != ERROR_OK)
        {
                return ERROR_FLASH_OPERATION_FAILED;
@@ -1203,6 +1203,6 @@ static int at91sam7_handle_gpnvm_command(struct command_context_s *cmd_ctx, char
 
        /* check protect state */
        at91sam7_protect_check(bank);
-       
+
        return ERROR_OK;
 }
Open On-Chip Debugger

Linking to existing account procedure

If you already have an account and want to add another login method you MUST first sign in with your existing account and then change URL to read https://review.openocd.org/login/?link to get to this page again but this time it'll work for linking. Thank you.

SSH host keys fingerprints

1024 SHA256:YKx8b7u5ZWdcbp7/4AeXNaqElP49m6QrwfXaqQGJAOk gerrit-code-review@openocd.zylin.com (DSA)
384 SHA256:jHIbSQa4REvwCFG4cq5LBlBLxmxSqelQPem/EXIrxjk gerrit-code-review@openocd.org (ECDSA)
521 SHA256:UAOPYkU9Fjtcao0Ul/Rrlnj/OsQvt+pgdYSZ4jOYdgs gerrit-code-review@openocd.org (ECDSA)
256 SHA256:A13M5QlnozFOvTllybRZH6vm7iSt0XLxbA48yfc2yfY gerrit-code-review@openocd.org (ECDSA)
256 SHA256:spYMBqEYoAOtK7yZBrcwE8ZpYt6b68Cfh9yEVetvbXg gerrit-code-review@openocd.org (ED25519)
+--[ED25519 256]--+
|=..              |
|+o..   .         |
|*.o   . .        |
|+B . . .         |
|Bo. = o S        |
|Oo.+ + =         |
|oB=.* = . o      |
| =+=.+   + E     |
|. .=o   . o      |
+----[SHA256]-----+
2048 SHA256:0Onrb7/PHjpo6iVZ7xQX2riKN83FJ3KGU0TvI0TaFG4 gerrit-code-review@openocd.zylin.com (RSA)