David Brownell <david-b@pacbell.net>:

[openocd.git] / doc / openocd.texi

diff --git a/doc/openocd.texi b/doc/openocd.texi
index e4220d3a84c1251d8f161ec2441170d6cca470f0..8cea8b0c3dbfcfb4e6db606c269b0b8ca324967b 100644 (file)
--- a/doc/openocd.texi
+++ b/doc/openocd.texi
@@ -53,7 +53,7 @@ This manual documents edition @value{EDITION} of the Open On-Chip Debugger
 @menu
 * About::                            About OpenOCD
 * Developers::                       OpenOCD Developers
-* Building::                         Building OpenOCD
+* Building OpenOCD::                 Building OpenOCD From SVN
 * JTAG Hardware Dongles::            JTAG Hardware Dongles
 * Running::                          Running OpenOCD
 * Simple Configuration Files::       Simple Configuration Files
@@ -140,9 +140,9 @@ or expand the OpenOCD source code.
 
 @section OpenOCD Subversion Repository
 
-The ``Building From Source'' section (@xref{Building}) provides
-instructions to retrieve and and build the latest version of the OpenOCD
-source code.
+The ``Building From Source'' section provides instructions to retrieve
+and and build the latest version of the OpenOCD source code.
+@xref{Building OpenOCD}.
 
 Developers that want to contribute patches to the OpenOCD system are
 @b{strongly} encouraged to base their work off of the most recent trunk
@@ -174,7 +174,7 @@ SVN commits to keep pace with the ongoing changes:
 
        @uref{https://lists.berlios.de/mailman/listinfo/openocd-svn}
 
-@node Building
+@node Building OpenOCD
 @chapter Building OpenOCD
 @cindex building
 
@@ -2804,6 +2804,23 @@ As noted above, the @command{nand device} command allows
 driver-specific options and behaviors.
 Some controllers also activate controller-specific commands.
 
+@deffn {NAND Driver} davinci
+This driver handles the NAND controllers found on DaVinci family
+chips from Texas Instruments.
+It takes three extra parameters:
+address of the NAND chip;
+hardware ECC mode to use (hwecc1, hwecc4, hwecc4_infix);
+address of the AEMIF controller on this processor.
+@example
+nand device davinci dm355.arm 0x02000000 hwecc4 0x01e10000
+@end example
+All DaVinci processors support the single-bit ECC hardware,
+and newer ones also support the four-bit ECC hardware.
+The @code{write_page} and @code{read_page} methods are used
+to implement those ECC modes, unless they are disabled using
+the @command{nand raw_access} command.
+@end deffn
+
 @deffn {NAND Driver} lpc3180
 These controllers require an extra @command{nand device}
 parameter:  the clock rate used by the controller.