+
+COMMAND_HANDLER(mips_m4k_handle_smp_gdb_command)
+{
+ struct target *target = get_current_target(CMD_CTX);
+ int retval = ERROR_OK;
+ struct target_list *head;
+ head = target->head;
+ if (head != (struct target_list *)NULL) {
+ if (CMD_ARGC == 1) {
+ int coreid = 0;
+ COMMAND_PARSE_NUMBER(int, CMD_ARGV[0], coreid);
+ if (ERROR_OK != retval)
+ return retval;
+ target->gdb_service->core[1] = coreid;
+
+ }
+ command_print(CMD_CTX, "gdb coreid %" PRId32 " -> %" PRId32, target->gdb_service->core[0]
+ , target->gdb_service->core[1]);
+ }
+ return ERROR_OK;
+}
+
+COMMAND_HANDLER(mips_m4k_handle_scan_delay_command)
+{
+ struct target *target = get_current_target(CMD_CTX);
+ struct mips_m4k_common *mips_m4k = target_to_m4k(target);
+ struct mips_ejtag *ejtag_info = &mips_m4k->mips32.ejtag_info;
+
+ if (CMD_ARGC == 1)
+ COMMAND_PARSE_NUMBER(uint, CMD_ARGV[0], ejtag_info->scan_delay);
+ else if (CMD_ARGC > 1)
+ return ERROR_COMMAND_SYNTAX_ERROR;
+
+ command_print(CMD_CTX, "scan delay: %d nsec", ejtag_info->scan_delay);
+ if (ejtag_info->scan_delay >= MIPS32_SCAN_DELAY_LEGACY_MODE) {
+ ejtag_info->mode = 0;
+ command_print(CMD_CTX, "running in legacy mode");
+ } else {
+ ejtag_info->mode = 1;
+ command_print(CMD_CTX, "running in fast queued mode");
+ }
+
+ return ERROR_OK;
+}
+
+static const struct command_registration mips_m4k_exec_command_handlers[] = {
+ {
+ .name = "cp0",
+ .handler = mips_m4k_handle_cp0_command,
+ .mode = COMMAND_EXEC,
+ .usage = "regnum [value]",
+ .help = "display/modify cp0 register",
+ },
+ {
+ .name = "smp_off",
+ .handler = mips_m4k_handle_smp_off_command,
+ .mode = COMMAND_EXEC,
+ .help = "Stop smp handling",
+ .usage = "",},
+
+ {
+ .name = "smp_on",
+ .handler = mips_m4k_handle_smp_on_command,
+ .mode = COMMAND_EXEC,
+ .help = "Restart smp handling",
+ .usage = "",
+ },
+ {
+ .name = "smp_gdb",
+ .handler = mips_m4k_handle_smp_gdb_command,
+ .mode = COMMAND_EXEC,
+ .help = "display/fix current core played to gdb",
+ .usage = "",
+ },
+ {
+ .name = "scan_delay",
+ .handler = mips_m4k_handle_scan_delay_command,
+ .mode = COMMAND_ANY,
+ .help = "display/set scan delay in nano seconds",
+ .usage = "[value]",
+ },
+ COMMAND_REGISTRATION_DONE
+};
+
+const struct command_registration mips_m4k_command_handlers[] = {
+ {
+ .chain = mips32_command_handlers,
+ },
+ {
+ .name = "mips_m4k",
+ .mode = COMMAND_ANY,
+ .help = "mips_m4k command group",
+ .usage = "",
+ .chain = mips_m4k_exec_command_handlers,
+ },
+ COMMAND_REGISTRATION_DONE
+};
+
+struct target_type mips_m4k_target = {
+ .name = "mips_m4k",
+
+ .poll = mips_m4k_poll,
+ .arch_state = mips32_arch_state,
+
+ .halt = mips_m4k_halt,
+ .resume = mips_m4k_resume,
+ .step = mips_m4k_step,
+
+ .assert_reset = mips_m4k_assert_reset,
+ .deassert_reset = mips_m4k_deassert_reset,
+
+ .get_gdb_reg_list = mips32_get_gdb_reg_list,
+
+ .read_memory = mips_m4k_read_memory,
+ .write_memory = mips_m4k_write_memory,
+ .checksum_memory = mips32_checksum_memory,
+ .blank_check_memory = mips32_blank_check_memory,
+
+ .run_algorithm = mips32_run_algorithm,
+
+ .add_breakpoint = mips_m4k_add_breakpoint,
+ .remove_breakpoint = mips_m4k_remove_breakpoint,
+ .add_watchpoint = mips_m4k_add_watchpoint,
+ .remove_watchpoint = mips_m4k_remove_watchpoint,
+
+ .commands = mips_m4k_command_handlers,
+ .target_create = mips_m4k_target_create,
+ .init_target = mips_m4k_init_target,
+ .examine = mips_m4k_examine,
+};