+ return ERROR_OK;
+}
+
+/** JTAG path for arm11_run_instr_data_to_core_noack
+ *
+ * The repeated TAP_IDLE's do not cause a repeated execution
+ * if passed without leaving the state.
+ *
+ * Since this is more than 7 bits (adjustable via adding more
+ * TAP_IDLE's) it produces an artificial delay in the lower
+ * layer (FT2232) that is long enough to finish execution on
+ * the core but still shorter than any manually inducible delays.
+ *
+ * To disable this code, try "memwrite burst false"
+ *
+ * FIX!!! should we use multiple TAP_IDLE here or not???
+ *
+ * https://lists.berlios.de/pipermail/openocd-development/2009-July/009698.html
+ * https://lists.berlios.de/pipermail/openocd-development/2009-August/009865.html
+ */
+static const tap_state_t arm11_MOVE_DRPAUSE_IDLE_DRPAUSE_with_delay[] =
+{
+ TAP_DREXIT2, TAP_DRUPDATE, TAP_IDLE, TAP_IDLE, TAP_IDLE, TAP_DRSELECT, TAP_DRCAPTURE, TAP_DRSHIFT
+};
+
+
+
+/** Execute one instruction via ITR repeatedly while
+ * passing data to the core via DTR on each execution.
+ *
+ * Caller guarantees that processor is in debug state, that DSCR_ITR_EN
+ * is set, the ITR Ready flag is set (as seen on the previous entry to
+ * TAP_DRCAPTURE), and the DSCR sticky abort flag is clear.
+ *
+ * No Ready check during transmission.
+ *
+ * The executed instruction \em must read data from DTR.
+ *
+ * \pre arm11_run_instr_data_prepare() / arm11_run_instr_data_finish() block
+ *
+ * \param arm11 Target state variable.
+ * \param opcode ARM opcode
+ * \param data Pointer to the data words to be passed to the core
+ * \param count Number of data words and instruction repetitions
+ *
+ */
+int arm11_run_instr_data_to_core_noack(struct arm11_common * arm11, uint32_t opcode, uint32_t * data, size_t count)
+{
+ arm11_add_IR(arm11, ARM11_ITRSEL, ARM11_TAP_DEFAULT);
+
+ arm11_add_debug_INST(arm11, opcode, NULL, TAP_DRPAUSE);
+
+ arm11_add_IR(arm11, ARM11_EXTEST, ARM11_TAP_DEFAULT);
+
+ struct scan_field chain5_fields[3];
+
+ arm11_setup_field(arm11, 32, NULL/*&Data*/, NULL, chain5_fields + 0);
+ arm11_setup_field(arm11, 1, NULL, NULL /*&Ready*/, chain5_fields + 1);
+ arm11_setup_field(arm11, 1, NULL, NULL, chain5_fields + 2);
+
+ uint8_t *Readies;
+ unsigned readiesNum = count + 1;
+ unsigned bytes = sizeof(*Readies)*readiesNum;
+
+ Readies = (uint8_t *) malloc(bytes);
+ if (Readies == NULL)
+ {
+ LOG_ERROR("Out of memory allocating %u bytes", bytes);
+ return ERROR_FAIL;
+ }
+
+ uint8_t * ReadyPos = Readies;
+
+ while (count--)
+ {
+ chain5_fields[0].out_value = (void *)(data++);
+ chain5_fields[1].in_value = ReadyPos++;
+
+ if (count)
+ {
+ jtag_add_dr_scan(ARRAY_SIZE(chain5_fields), chain5_fields, jtag_set_end_state(TAP_DRPAUSE));
+ jtag_add_pathmove(ARRAY_SIZE(arm11_MOVE_DRPAUSE_IDLE_DRPAUSE_with_delay),
+ arm11_MOVE_DRPAUSE_IDLE_DRPAUSE_with_delay);
+ }
+ else
+ {
+ jtag_add_dr_scan(ARRAY_SIZE(chain5_fields), chain5_fields, jtag_set_end_state(TAP_IDLE));
+ }
+ }
+
+ arm11_add_IR(arm11, ARM11_INTEST, ARM11_TAP_DEFAULT);