- int retval;
-
- /* set up invariant: INSTR_COMP is set after ever DPM operation */
- long long then = timeval_ms();
- for (;; ) {
- retval = mem_ap_read_atomic_u32(a8->armv8_common.debug_ap,
- a8->armv8_common.debug_base + CPUV8_DBG_DSCR,
- &dscr);
- if (retval != ERROR_OK)
- return retval;
- if ((dscr & DSCR_ITE) != 0)
- break;
- if (timeval_ms() > then + 1000) {
- LOG_ERROR("Timeout waiting for dpm prepare");
- return ERROR_FAIL;
- }
- }
-
- /* this "should never happen" ... */
- if (dscr & DSCR_DTR_RX_FULL) {
- LOG_ERROR("DSCR_DTR_RX_FULL, dscr 0x%08" PRIx32, dscr);
- /* Clear DCCRX */
- retval = aarch64_exec_opcode(
- a8->armv8_common.arm.target,
- 0xd5130400,
- &dscr);
- if (retval != ERROR_OK)
- return retval;
- }
-
- return retval;
-}
-
-static int aarch64_dpm_finish(struct arm_dpm *dpm)
-{
- /* REVISIT what could be done here? */
- return ERROR_OK;
-}
-
-static int aarch64_instr_execute(struct arm_dpm *dpm,
- uint32_t opcode)
-{
- struct aarch64_common *a8 = dpm_to_a8(dpm);
- uint32_t dscr = DSCR_ITE;
-
- return aarch64_exec_opcode(
- a8->armv8_common.arm.target,
- opcode,
- &dscr);
-}
-
-static int aarch64_instr_write_data_dcc(struct arm_dpm *dpm,
- uint32_t opcode, uint32_t data)
-{
- struct aarch64_common *a8 = dpm_to_a8(dpm);
- int retval;
- uint32_t dscr = DSCR_ITE;
-
- retval = aarch64_write_dcc(&a8->armv8_common, data);
- if (retval != ERROR_OK)
- return retval;
-
- return aarch64_exec_opcode(
- a8->armv8_common.arm.target,
- opcode,
- &dscr);
-}
-
-static int aarch64_instr_write_data_dcc_64(struct arm_dpm *dpm,
- uint32_t opcode, uint64_t data)
-{
- struct aarch64_common *a8 = dpm_to_a8(dpm);
- int retval;
- uint32_t dscr = DSCR_ITE;
-
- retval = aarch64_write_dcc_64(&a8->armv8_common, data);
- if (retval != ERROR_OK)
- return retval;
-
- return aarch64_exec_opcode(
- a8->armv8_common.arm.target,
- opcode,
- &dscr);
-}
-
-static int aarch64_instr_write_data_r0(struct arm_dpm *dpm,
- uint32_t opcode, uint32_t data)
-{
- struct aarch64_common *a8 = dpm_to_a8(dpm);
- uint32_t dscr = DSCR_ITE;
- int retval;
-
- retval = aarch64_write_dcc(&a8->armv8_common, data);
- if (retval != ERROR_OK)
- return retval;
-
- retval = aarch64_exec_opcode(
- a8->armv8_common.arm.target,
- 0xd5330500,
- &dscr);
- if (retval != ERROR_OK)
- return retval;
-
- /* then the opcode, taking data from R0 */
- retval = aarch64_exec_opcode(
- a8->armv8_common.arm.target,
- opcode,
- &dscr);
-
- return retval;
-}
-
-static int aarch64_instr_write_data_r0_64(struct arm_dpm *dpm,
- uint32_t opcode, uint64_t data)
-{
- struct aarch64_common *a8 = dpm_to_a8(dpm);
- uint32_t dscr = DSCR_ITE;
- int retval;
-
- retval = aarch64_write_dcc_64(&a8->armv8_common, data);
- if (retval != ERROR_OK)
- return retval;
-
- retval = aarch64_exec_opcode(
- a8->armv8_common.arm.target,
- 0xd5330400,
- &dscr);
- if (retval != ERROR_OK)
- return retval;
-
- /* then the opcode, taking data from R0 */
- retval = aarch64_exec_opcode(
- a8->armv8_common.arm.target,
- opcode,
- &dscr);
-
- return retval;
-}
-
-static int aarch64_instr_cpsr_sync(struct arm_dpm *dpm)
-{
- struct target *target = dpm->arm->target;
- uint32_t dscr = DSCR_ITE;
-
- /* "Prefetch flush" after modifying execution status in CPSR */
- return aarch64_exec_opcode(target,
- ARMV4_5_MCR(15, 0, 0, 7, 5, 4),
- &dscr);
-}
-
-static int aarch64_instr_read_data_dcc(struct arm_dpm *dpm,
- uint32_t opcode, uint32_t *data)
-{
- struct aarch64_common *a8 = dpm_to_a8(dpm);
- int retval;
- uint32_t dscr = DSCR_ITE;
-
- /* the opcode, writing data to DCC */
- retval = aarch64_exec_opcode(
- a8->armv8_common.arm.target,
- opcode,
- &dscr);
- if (retval != ERROR_OK)
- return retval;
-
- return aarch64_read_dcc(&a8->armv8_common, data, &dscr);
-}
-
-static int aarch64_instr_read_data_dcc_64(struct arm_dpm *dpm,
- uint32_t opcode, uint64_t *data)
-{
- struct aarch64_common *a8 = dpm_to_a8(dpm);
- int retval;
- uint32_t dscr = DSCR_ITE;
-
- /* the opcode, writing data to DCC */
- retval = aarch64_exec_opcode(
- a8->armv8_common.arm.target,
- opcode,
- &dscr);
- if (retval != ERROR_OK)
- return retval;
-
- return aarch64_read_dcc_64(&a8->armv8_common, data, &dscr);
-}