2 if { [info exists CHIPNAME] } {
3 set _CHIPNAME $CHIPNAME
8 if { [info exists ENDIAN] } {
14 if { [info exists CPUTAPID ] } {
15 set _CPUTAPID $CPUTAPID
17 # force an error till we get a good number
18 set _CPUTAPID 0x30938053
24 #use combined on interfaces or targets that can't set TRST/SRST separately
25 reset_config srst_only
28 #format L IRC IRCM IDCODE (Length, IR Capture, IR Capture Mask, IDCODE)
29 jtag newtap $_CHIPNAME cpu -irlen 5 -ircapture 0x1 -irmask 0x1f -expected-id $_CPUTAPID
31 set _TARGETNAME $_CHIPNAME.cpu
32 target create $_TARGETNAME mips_m4k -endian $_ENDIAN -chain-position $_TARGETNAME
34 $_TARGETNAME configure -work-area-phys 0xa0000800 -work-area-size 16384 -work-area-backup 0
36 $_TARGETNAME configure -event reset-init {
38 # from reset the pic32 cannot execute code in ram - enable ram execution
39 # minimum offset from start of ram is 2k
43 mww 0xbf882000 0x001f0040
44 # BMXDKPBA: 0xa0000800
45 mww 0xbf882010 0x00000800
47 mww 0xbf882020 0x00004000
49 mww 0xbf882030 0x00004000
52 set _FLASHNAME $_CHIPNAME.flash
53 flash bank $_FLASHNAME pic32mx 0xbd000000 0 0 0 $_TARGETNAME
54 set _FLASHNAME $_CHIPNAME.flash
55 flash bank $_FLASHNAME pic32mx 0xbfc00000 0 0 0 $_TARGETNAME
57 # For more information about the configuration files, take a look at:
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