tcl/target/ti_k3: Add AM273 SoC
[openocd.git] / tcl / cpld / xilinx-xc7v.cfg
1 # SPDX-License-Identifier: GPL-2.0-or-later
2
3 # xilinx series 7 (artix, kintex, virtex)
4 # http://www.xilinx.com/support/documentation/user_guides/ug470_7Series_Config.pdf
5 # https://bsdl.info/view.htm?sid=08e275a0cd3ac38988ca59b002289d77
6 # https://bsdl.info/view.htm?sid=44dae65d3cf9593188ca59b002289d77
7 #
8 # this config file is for XC7VX1140T and XC7V2000T only.
9 # for other virtex-7 devices use xilinx-xc7vh580t.cfg or xilinx-xc7vh870t.cfg or xilinx-xc7.cfg
10
11 if { [info exists CHIPNAME] } {
12 set _CHIPNAME $CHIPNAME
13 } else {
14 set _CHIPNAME xc7v
15 }
16
17 #0x036D5093: XC7VX1140T
18 #0x036By093: XC7V2000T
19 #y = xx11 = 3, 7, B or F
20
21 jtag newtap $_CHIPNAME tap -irlen 24 -ignore-version \
22 -expected-id 0x036B3093 -expected-id 0x036B7093 \
23 -expected-id 0x036BB093 -expected-id 0x036BF093 \
24 -expected-id 0x036D5093
25
26 #CFG_OUT_SLR0 0x124924
27 #CFG_IN_SLR0 0x164924
28 #CFG_OUT_SLR1 0x904924
29 #CFG_IN_SLR1 0x905924
30 #CFG_OUT_SLR2 0x924124
31 #CFG_IN_SLR2 0x924164
32 #CFG_OUT_SLR3 0x924904
33 #CFG_IN_SLR3 0x924905
34
35 pld create $_CHIPNAME.pld virtex2 -chain-position $_CHIPNAME.tap -no_jstart
36 # cfg_out cfg_in jprogb jstart jshutdown
37 virtex2 set_instr_codes $_CHIPNAME.pld 0x3FFFFF 0x3FFFFF 0x2CB2CB 0x30C30C 0x34D34D

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