1 # SPDX-License-Identifier: GPL-2.0-or-later
2 # Cadence virtual debug interface
3 # Arm Cortex A53x2 through DAP
5 source [find interface/vdebug.cfg]
9 set _MEMSTART 0x00000000
10 set _MEMSIZE 0x1000000
12 # vdebug select transport
13 transport select dapdirect_swd
15 # JTAG reset config, frequency and reset delay
19 # BFM hierarchical path and input clk period
20 vdebug bfm_path tbench.u_vd_swdp_bfm 10ns
22 # DMA Memories to access backdoor (up to 4)
23 vdebug mem_path tbench.u_memory.mem_array $_MEMSTART $_MEMSIZE
25 source [find target/swj-dp.tcl]
27 swj_newdap $_CHIPNAME cpu -irlen 4 -ircapture 0x1 -irmask 0xf
29 source [find target/vd_aarch64.cfg]
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