1 /***************************************************************************
2 * Copyright (C) 2009 by David Brownell *
4 * This program is free software; you can redistribute it and/or modify *
5 * it under the terms of the GNU General Public License as published by *
6 * the Free Software Foundation; either version 2 of the License, or *
7 * (at your option) any later version. *
9 * This program is distributed in the hope that it will be useful, *
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of *
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
12 * GNU General Public License for more details. *
14 * You should have received a copy of the GNU General Public License *
15 * along with this program; if not, write to the *
16 * Free Software Foundation, Inc., *
17 * 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. *
18 ***************************************************************************/
23 #include "replacements.h"
26 #include "arm_disassembler.h"
29 #include "binarybuffer.h"
37 static void armv7a_show_fault_registers(struct target
*target
)
39 uint32_t dfsr
, ifsr
, dfar
, ifar
;
40 struct armv7a_common
*armv7a
= target_to_armv7a(target
);
42 armv7a
->read_cp15(target
, 0, 0, 5, 0, &dfsr
);
43 armv7a
->read_cp15(target
, 0, 1, 5, 0, &ifsr
);
44 armv7a
->read_cp15(target
, 0, 0, 6, 0, &dfar
);
45 armv7a
->read_cp15(target
, 0, 2, 6, 0, &ifar
);
47 LOG_USER("Data fault registers DFSR: %8.8" PRIx32
48 ", DFAR: %8.8" PRIx32
, dfsr
, dfar
);
49 LOG_USER("Instruction fault registers IFSR: %8.8" PRIx32
50 ", IFAR: %8.8" PRIx32
, ifsr
, ifar
);
54 int armv7a_arch_state(struct target
*target
)
56 static const char *state
[] =
61 struct armv7a_common
*armv7a
= target_to_armv7a(target
);
62 struct arm
*armv4_5
= &armv7a
->armv4_5_common
;
64 if (armv7a
->common_magic
!= ARMV7_COMMON_MAGIC
)
66 LOG_ERROR("BUG: called for a non-ARMv7A target");
67 return ERROR_INVALID_ARGUMENTS
;
70 LOG_USER("target halted in %s state due to %s, current mode: %s\n"
71 "cpsr: 0x%8.8" PRIx32
" pc: 0x%8.8" PRIx32
"\n"
72 "MMU: %s, D-Cache: %s, I-Cache: %s",
73 armv4_5_state_strings
[armv4_5
->core_state
],
74 Jim_Nvp_value2name_simple(nvp_target_debug_reason
,
75 target
->debug_reason
)->name
,
76 arm_mode_name(armv4_5
->core_mode
),
77 buf_get_u32(armv4_5
->cpsr
->value
, 0, 32),
78 buf_get_u32(armv4_5
->core_cache
->reg_list
[15].value
, 0, 32),
79 state
[armv7a
->armv4_5_mmu
.mmu_enabled
],
80 state
[armv7a
->armv4_5_mmu
.armv4_5_cache
.d_u_cache_enabled
],
81 state
[armv7a
->armv4_5_mmu
.armv4_5_cache
.i_cache_enabled
]);
83 if (armv4_5
->core_mode
== ARMV4_5_MODE_ABT
)
84 armv7a_show_fault_registers(target
);
90 COMMAND_HANDLER(handle_dap_baseaddr_command
)
92 struct target
*target
= get_current_target(CMD_CTX
);
93 struct armv7a_common
*armv7a
= target_to_armv7a(target
);
94 struct swjdp_common
*swjdp
= &armv7a
->swjdp_info
;
96 return CALL_COMMAND_HANDLER(dap_baseaddr_command
, swjdp
);
99 COMMAND_HANDLER(handle_dap_memaccess_command
)
101 struct target
*target
= get_current_target(CMD_CTX
);
102 struct armv7a_common
*armv7a
= target_to_armv7a(target
);
103 struct swjdp_common
*swjdp
= &armv7a
->swjdp_info
;
105 return CALL_COMMAND_HANDLER(dap_memaccess_command
, swjdp
);
108 COMMAND_HANDLER(handle_dap_apsel_command
)
110 struct target
*target
= get_current_target(CMD_CTX
);
111 struct armv7a_common
*armv7a
= target_to_armv7a(target
);
112 struct swjdp_common
*swjdp
= &armv7a
->swjdp_info
;
114 return CALL_COMMAND_HANDLER(dap_apsel_command
, swjdp
);
117 COMMAND_HANDLER(handle_dap_apid_command
)
119 struct target
*target
= get_current_target(CMD_CTX
);
120 struct armv7a_common
*armv7a
= target_to_armv7a(target
);
121 struct swjdp_common
*swjdp
= &armv7a
->swjdp_info
;
123 return CALL_COMMAND_HANDLER(dap_apid_command
, swjdp
);
126 COMMAND_HANDLER(handle_dap_info_command
)
128 struct target
*target
= get_current_target(CMD_CTX
);
129 struct armv7a_common
*armv7a
= target_to_armv7a(target
);
130 struct swjdp_common
*swjdp
= &armv7a
->swjdp_info
;
135 apsel
= swjdp
->apsel
;
138 COMMAND_PARSE_NUMBER(u32
, CMD_ARGV
[0], apsel
);
141 return ERROR_COMMAND_SYNTAX_ERROR
;
144 return dap_info_command(CMD_CTX
, swjdp
, apsel
);
147 int armv7a_register_commands(struct command_context
*cmd_ctx
)
149 struct command
*arm_adi_v5_dap_cmd
;
151 arm_adi_v5_dap_cmd
= register_command(cmd_ctx
, NULL
, "dap",
153 "cortex dap specific commands");
155 register_command(cmd_ctx
, arm_adi_v5_dap_cmd
, "info",
156 handle_dap_info_command
, COMMAND_EXEC
,
157 "dap info for ap [num], "
158 "default currently selected AP");
159 register_command(cmd_ctx
, arm_adi_v5_dap_cmd
, "apsel",
160 handle_dap_apsel_command
, COMMAND_EXEC
,
161 "select a different AP [num] (default 0)");
162 register_command(cmd_ctx
, arm_adi_v5_dap_cmd
, "apid",
163 handle_dap_apid_command
, COMMAND_EXEC
,
164 "return id reg from AP [num], "
165 "default currently selected AP");
166 register_command(cmd_ctx
, arm_adi_v5_dap_cmd
, "baseaddr",
167 handle_dap_baseaddr_command
, COMMAND_EXEC
,
168 "return debug base address from AP [num], "
169 "default currently selected AP");
170 register_command(cmd_ctx
, arm_adi_v5_dap_cmd
, "memaccess",
171 handle_dap_memaccess_command
, COMMAND_EXEC
,
172 "set/get number of extra tck for mem-ap memory "
173 "bus access [0-255]");
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