1 /***************************************************************************
2 * Copyright (C) 2005 by Dominic Rath *
3 * Dominic.Rath@gmx.de *
5 * This program is free software; you can redistribute it and/or modify *
6 * it under the terms of the GNU General Public License as published by *
7 * the Free Software Foundation; either version 2 of the License, or *
8 * (at your option) any later version. *
10 * This program is distributed in the hope that it will be useful, *
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of *
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
13 * GNU General Public License for more details. *
15 * You should have received a copy of the GNU General Public License *
16 * along with this program; if not, write to the *
17 * Free Software Foundation, Inc., *
18 * 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. *
19 ***************************************************************************/
26 #include "arm7_9_common.h"
30 #include "embeddedice.h"
39 #define _DEBUG_INSTRUCTION_EXECUTION_
43 int arm966e_register_commands(struct command_context_s
*cmd_ctx
);
45 /* forward declarations */
46 int arm966e_target_command(struct command_context_s
*cmd_ctx
, char *cmd
, char **args
, int argc
, struct target_s
*target
);
47 int arm966e_init_target(struct command_context_s
*cmd_ctx
, struct target_s
*target
);
48 int arm966e_quit(void);
50 target_type_t arm966e_target
=
55 .arch_state
= armv4_5_arch_state
,
57 .target_request_data
= arm7_9_target_request_data
,
60 .resume
= arm7_9_resume
,
63 .assert_reset
= arm7_9_assert_reset
,
64 .deassert_reset
= arm7_9_deassert_reset
,
65 .soft_reset_halt
= arm7_9_soft_reset_halt
,
67 .get_gdb_reg_list
= armv4_5_get_gdb_reg_list
,
69 .read_memory
= arm7_9_read_memory
,
70 .write_memory
= arm7_9_write_memory
,
71 .bulk_write_memory
= arm7_9_bulk_write_memory
,
72 .checksum_memory
= arm7_9_checksum_memory
,
73 .blank_check_memory
= arm7_9_blank_check_memory
,
75 .run_algorithm
= armv4_5_run_algorithm
,
77 .add_breakpoint
= arm7_9_add_breakpoint
,
78 .remove_breakpoint
= arm7_9_remove_breakpoint
,
79 .add_watchpoint
= arm7_9_add_watchpoint
,
80 .remove_watchpoint
= arm7_9_remove_watchpoint
,
82 .register_commands
= arm966e_register_commands
,
83 .target_command
= arm966e_target_command
,
84 .init_target
= arm966e_init_target
,
85 .examine
= arm9tdmi_examine
,
89 int arm966e_init_target(struct command_context_s
*cmd_ctx
, struct target_s
*target
)
91 arm9tdmi_init_target(cmd_ctx
, target
);
96 int arm966e_quit(void)
102 int arm966e_init_arch_info(target_t
*target
, arm966e_common_t
*arm966e
, int chain_pos
, char *variant
)
104 arm9tdmi_common_t
*arm9tdmi
= &arm966e
->arm9tdmi_common
;
105 arm7_9_common_t
*arm7_9
= &arm9tdmi
->arm7_9_common
;
107 arm9tdmi_init_arch_info(target
, arm9tdmi
, chain_pos
, variant
);
109 arm9tdmi
->arch_info
= arm966e
;
110 arm966e
->common_magic
= ARM966E_COMMON_MAGIC
;
112 /* The ARM966E-S implements the ARMv5TE architecture which
113 * has the BKPT instruction, so we don't have to use a watchpoint comparator
115 arm7_9
->arm_bkpt
= ARMV5_BKPT(0x0);
116 arm7_9
->thumb_bkpt
= ARMV5_T_BKPT(0x0) & 0xffff;
118 arm7_9
->sw_bkpts_use_wp
= 0;
119 arm7_9
->sw_bkpts_enabled
= 1;
124 int arm966e_target_command(struct command_context_s
*cmd_ctx
, char *cmd
, char **args
, int argc
, struct target_s
*target
)
127 char *variant
= NULL
;
128 arm966e_common_t
*arm966e
= malloc(sizeof(arm966e_common_t
));
129 memset(arm966e
, 0, sizeof(*arm966e
));
133 LOG_ERROR("'target arm966e' requires at least one additional argument");
137 chain_pos
= strtoul(args
[3], NULL
, 0);
142 LOG_DEBUG("chain_pos: %i, variant: %s", chain_pos
, variant
);
144 arm966e_init_arch_info(target
, arm966e
, chain_pos
, variant
);
149 int arm966e_get_arch_pointers(target_t
*target
, armv4_5_common_t
**armv4_5_p
, arm7_9_common_t
**arm7_9_p
, arm9tdmi_common_t
**arm9tdmi_p
, arm966e_common_t
**arm966e_p
)
151 armv4_5_common_t
*armv4_5
= target
->arch_info
;
152 arm7_9_common_t
*arm7_9
;
153 arm9tdmi_common_t
*arm9tdmi
;
154 arm966e_common_t
*arm966e
;
156 if (armv4_5
->common_magic
!= ARMV4_5_COMMON_MAGIC
)
161 arm7_9
= armv4_5
->arch_info
;
162 if (arm7_9
->common_magic
!= ARM7_9_COMMON_MAGIC
)
167 arm9tdmi
= arm7_9
->arch_info
;
168 if (arm9tdmi
->common_magic
!= ARM9TDMI_COMMON_MAGIC
)
173 arm966e
= arm9tdmi
->arch_info
;
174 if (arm966e
->common_magic
!= ARM966E_COMMON_MAGIC
)
179 *armv4_5_p
= armv4_5
;
181 *arm9tdmi_p
= arm9tdmi
;
182 *arm966e_p
= arm966e
;
187 int arm966e_read_cp15(target_t
*target
, int reg_addr
, u32
*value
)
189 armv4_5_common_t
*armv4_5
= target
->arch_info
;
190 arm7_9_common_t
*arm7_9
= armv4_5
->arch_info
;
191 arm_jtag_t
*jtag_info
= &arm7_9
->jtag_info
;
192 scan_field_t fields
[3];
193 u8 reg_addr_buf
= reg_addr
& 0x3f;
196 jtag_add_end_state(TAP_RTI
);
197 arm_jtag_scann(jtag_info
, 0xf);
198 arm_jtag_set_instr(jtag_info
, jtag_info
->intest_instr
, NULL
);
200 fields
[0].device
= jtag_info
->chain_pos
;
201 fields
[0].num_bits
= 32;
202 fields
[0].out_value
= NULL
;
203 fields
[0].out_mask
= NULL
;
204 fields
[0].in_value
= NULL
;
205 fields
[0].in_check_value
= NULL
;
206 fields
[0].in_check_mask
= NULL
;
207 fields
[0].in_handler
= NULL
;
208 fields
[0].in_handler_priv
= NULL
;
210 fields
[1].device
= jtag_info
->chain_pos
;
211 fields
[1].num_bits
= 6;
212 fields
[1].out_value
= ®_addr_buf
;
213 fields
[1].out_mask
= NULL
;
214 fields
[1].in_value
= NULL
;
215 fields
[1].in_check_value
= NULL
;
216 fields
[1].in_check_mask
= NULL
;
217 fields
[1].in_handler
= NULL
;
218 fields
[1].in_handler_priv
= NULL
;
220 fields
[2].device
= jtag_info
->chain_pos
;
221 fields
[2].num_bits
= 1;
222 fields
[2].out_value
= &nr_w_buf
;
223 fields
[2].out_mask
= NULL
;
224 fields
[2].in_value
= NULL
;
225 fields
[2].in_check_value
= NULL
;
226 fields
[2].in_check_mask
= NULL
;
227 fields
[2].in_handler
= NULL
;
228 fields
[2].in_handler_priv
= NULL
;
230 jtag_add_dr_scan(3, fields
, -1);
232 fields
[0].in_handler_priv
= value
;
233 fields
[0].in_handler
= arm_jtag_buf_to_u32
;
235 jtag_add_dr_scan(3, fields
, -1);
237 #ifdef _DEBUG_INSTRUCTION_EXECUTION_
238 jtag_execute_queue();
239 LOG_DEBUG("addr: 0x%x value: %8.8x", reg_addr
, *value
);
245 int arm966e_write_cp15(target_t
*target
, int reg_addr
, u32 value
)
247 armv4_5_common_t
*armv4_5
= target
->arch_info
;
248 arm7_9_common_t
*arm7_9
= armv4_5
->arch_info
;
249 arm_jtag_t
*jtag_info
= &arm7_9
->jtag_info
;
250 scan_field_t fields
[3];
251 u8 reg_addr_buf
= reg_addr
& 0x3f;
255 buf_set_u32(value_buf
, 0, 32, value
);
257 jtag_add_end_state(TAP_RTI
);
258 arm_jtag_scann(jtag_info
, 0xf);
259 arm_jtag_set_instr(jtag_info
, jtag_info
->intest_instr
, NULL
);
261 fields
[0].device
= jtag_info
->chain_pos
;
262 fields
[0].num_bits
= 32;
263 fields
[0].out_value
= value_buf
;
264 fields
[0].out_mask
= NULL
;
265 fields
[0].in_value
= NULL
;
266 fields
[0].in_check_value
= NULL
;
267 fields
[0].in_check_mask
= NULL
;
268 fields
[0].in_handler
= NULL
;
269 fields
[0].in_handler_priv
= NULL
;
271 fields
[1].device
= jtag_info
->chain_pos
;
272 fields
[1].num_bits
= 6;
273 fields
[1].out_value
= ®_addr_buf
;
274 fields
[1].out_mask
= NULL
;
275 fields
[1].in_value
= NULL
;
276 fields
[1].in_check_value
= NULL
;
277 fields
[1].in_check_mask
= NULL
;
278 fields
[1].in_handler
= NULL
;
279 fields
[1].in_handler_priv
= NULL
;
281 fields
[2].device
= jtag_info
->chain_pos
;
282 fields
[2].num_bits
= 1;
283 fields
[2].out_value
= &nr_w_buf
;
284 fields
[2].out_mask
= NULL
;
285 fields
[2].in_value
= NULL
;
286 fields
[2].in_check_value
= NULL
;
287 fields
[2].in_check_mask
= NULL
;
288 fields
[2].in_handler
= NULL
;
289 fields
[2].in_handler_priv
= NULL
;
291 jtag_add_dr_scan(3, fields
, -1);
293 #ifdef _DEBUG_INSTRUCTION_EXECUTION_
294 LOG_DEBUG("addr: 0x%x value: %8.8x", reg_addr
, value
);
300 int arm966e_handle_cp15_command(struct command_context_s
*cmd_ctx
, char *cmd
, char **args
, int argc
)
303 target_t
*target
= get_current_target(cmd_ctx
);
304 armv4_5_common_t
*armv4_5
;
305 arm7_9_common_t
*arm7_9
;
306 arm9tdmi_common_t
*arm9tdmi
;
307 arm966e_common_t
*arm966e
;
308 arm_jtag_t
*jtag_info
;
310 if (arm966e_get_arch_pointers(target
, &armv4_5
, &arm7_9
, &arm9tdmi
, &arm966e
) != ERROR_OK
)
312 command_print(cmd_ctx
, "current target isn't an ARM966e target");
316 jtag_info
= &arm7_9
->jtag_info
;
318 if (target
->state
!= TARGET_HALTED
)
320 command_print(cmd_ctx
, "target must be stopped for \"%s\" command", cmd
);
324 /* one or more argument, access a single register (write if second argument is given */
327 int address
= strtoul(args
[0], NULL
, 0);
332 if ((retval
= arm966e_read_cp15(target
, address
, &value
)) != ERROR_OK
)
334 command_print(cmd_ctx
, "couldn't access reg %i", address
);
337 jtag_execute_queue();
339 command_print(cmd_ctx
, "%i: %8.8x", address
, value
);
343 u32 value
= strtoul(args
[1], NULL
, 0);
344 if ((retval
= arm966e_write_cp15(target
, address
, value
)) != ERROR_OK
)
346 command_print(cmd_ctx
, "couldn't access reg %i", address
);
349 command_print(cmd_ctx
, "%i: %8.8x", address
, value
);
356 int arm966e_register_commands(struct command_context_s
*cmd_ctx
)
359 command_t
*arm966e_cmd
;
361 retval
= arm9tdmi_register_commands(cmd_ctx
);
362 arm966e_cmd
= register_command(cmd_ctx
, NULL
, "arm966e", NULL
, COMMAND_ANY
, "arm966e specific commands");
363 register_command(cmd_ctx
, arm966e_cmd
, "cp15", arm966e_handle_cp15_command
, COMMAND_EXEC
, "display/modify cp15 register <num> [value]");
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