1 /***************************************************************************
3 * Copyright (C) 2010 by David Brownell
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License as published by
7 * the Free Software Foundation; either version 2 of the License, or
8 * (at your option) any later version.
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
15 * You should have received a copy of the GNU General Public License
16 * along with this program. If not, see <http://www.gnu.org/licenses/>.
17 ***************************************************************************/
21 * Utilities to support ARM "Serial Wire Debug" (SWD), a low pin-count debug
22 * link protocol used in cases where JTAG is not wanted. This is coupled to
23 * recent versions of ARM's "CoreSight" debug framework. This specific code
24 * is a transport level interface, with "target/arm_adi_v5.[hc]" code
25 * understanding operation semantics, shared with the JTAG transport.
27 * Single-DAP support only.
29 * for details, see "ARM IHI 0031A"
30 * ARM Debug Interface v5 Architecture Specification
31 * especially section 5.3 for SWD protocol
33 * On many chips (most current Cortex-M3 parts) SWD is a run-time alternative
34 * to JTAG. Boards may support one or both. There are also SWD-only chips,
35 * (using SW-DP not SWJ-DP).
37 * Even boards that also support JTAG can benefit from SWD support, because
38 * usually there's no way to access the SWO trace view mechanism in JTAG mode.
39 * That is, trace access may require SWD support.
48 #include "arm_adi_v5.h"
49 #include <helper/time_support.h>
51 #include <transport/transport.h>
52 #include <jtag/interface.h>
58 static void swd_finish_read(struct adiv5_dap
*dap
)
60 const struct swd_driver
*swd
= adiv5_dap_swd_driver(dap
);
61 if (dap
->last_read
!= NULL
) {
62 swd
->read_reg(swd_cmd(true, false, DP_RDBUFF
), dap
->last_read
, 0);
63 dap
->last_read
= NULL
;
67 static int swd_queue_dp_write(struct adiv5_dap
*dap
, unsigned reg
,
69 static int swd_queue_dp_read(struct adiv5_dap
*dap
, unsigned reg
,
72 static void swd_clear_sticky_errors(struct adiv5_dap
*dap
)
74 const struct swd_driver
*swd
= adiv5_dap_swd_driver(dap
);
77 swd
->write_reg(swd_cmd(false, false, DP_ABORT
),
78 STKCMPCLR
| STKERRCLR
| WDERRCLR
| ORUNERRCLR
, 0);
81 static int swd_run_inner(struct adiv5_dap
*dap
)
83 const struct swd_driver
*swd
= adiv5_dap_swd_driver(dap
);
88 if (retval
!= ERROR_OK
) {
90 dap
->do_reconnect
= true;
96 static int swd_connect(struct adiv5_dap
*dap
)
98 const struct swd_driver
*swd
= adiv5_dap_swd_driver(dap
);
102 /* FIXME validate transport config ... is the
103 * configured DAP present (check IDCODE)?
104 * Is *only* one DAP configured?
109 /* Check if we should reset srst already when connecting, but not if reconnecting. */
110 if (!dap
->do_reconnect
) {
111 enum reset_types jtag_reset_config
= jtag_get_reset_config();
113 if (jtag_reset_config
& RESET_CNCT_UNDER_SRST
) {
114 if (jtag_reset_config
& RESET_SRST_NO_GATING
)
117 LOG_WARNING("\'srst_nogate\' reset_config option is required");
121 /* Note, debugport_init() does setup too */
122 swd
->switch_seq(JTAG_TO_SWD
);
124 /* Clear link state, including the SELECT cache. */
125 dap
->do_reconnect
= false;
126 dap_invalidate_cache(dap
);
128 swd_queue_dp_read(dap
, DP_DPIDR
, &dpidr
);
130 /* force clear all sticky faults */
131 swd_clear_sticky_errors(dap
);
133 status
= swd_run_inner(dap
);
135 if (status
== ERROR_OK
) {
136 LOG_INFO("SWD DPIDR %#8.8" PRIx32
, dpidr
);
137 dap
->do_reconnect
= false;
138 status
= dap_dp_init(dap
);
140 dap
->do_reconnect
= true;
145 static inline int check_sync(struct adiv5_dap
*dap
)
147 return do_sync
? swd_run_inner(dap
) : ERROR_OK
;
150 static int swd_check_reconnect(struct adiv5_dap
*dap
)
152 if (dap
->do_reconnect
)
153 return swd_connect(dap
);
158 static int swd_queue_ap_abort(struct adiv5_dap
*dap
, uint8_t *ack
)
160 const struct swd_driver
*swd
= adiv5_dap_swd_driver(dap
);
163 swd
->write_reg(swd_cmd(false, false, DP_ABORT
),
164 DAPABORT
| STKCMPCLR
| STKERRCLR
| WDERRCLR
| ORUNERRCLR
, 0);
165 return check_sync(dap
);
168 /** Select the DP register bank matching bits 7:4 of reg. */
169 static void swd_queue_dp_bankselect(struct adiv5_dap
*dap
, unsigned reg
)
171 /* Only register address 4 is banked. */
172 if ((reg
& 0xf) != 4)
175 uint32_t select_dp_bank
= (reg
& 0x000000F0) >> 4;
176 uint32_t sel
= select_dp_bank
177 | (dap
->select
& (DP_SELECT_APSEL
| DP_SELECT_APBANK
));
179 if (sel
== dap
->select
)
184 swd_queue_dp_write(dap
, DP_SELECT
, sel
);
187 static int swd_queue_dp_read(struct adiv5_dap
*dap
, unsigned reg
,
190 const struct swd_driver
*swd
= adiv5_dap_swd_driver(dap
);
193 int retval
= swd_check_reconnect(dap
);
194 if (retval
!= ERROR_OK
)
197 swd_queue_dp_bankselect(dap
, reg
);
198 swd
->read_reg(swd_cmd(true, false, reg
), data
, 0);
200 return check_sync(dap
);
203 static int swd_queue_dp_write(struct adiv5_dap
*dap
, unsigned reg
,
206 const struct swd_driver
*swd
= adiv5_dap_swd_driver(dap
);
209 int retval
= swd_check_reconnect(dap
);
210 if (retval
!= ERROR_OK
)
213 swd_finish_read(dap
);
214 swd_queue_dp_bankselect(dap
, reg
);
215 swd
->write_reg(swd_cmd(false, false, reg
), data
, 0);
217 return check_sync(dap
);
220 /** Select the AP register bank matching bits 7:4 of reg. */
221 static void swd_queue_ap_bankselect(struct adiv5_ap
*ap
, unsigned reg
)
223 struct adiv5_dap
*dap
= ap
->dap
;
224 uint32_t sel
= ((uint32_t)ap
->ap_num
<< 24)
226 | (dap
->select
& DP_SELECT_DPBANK
);
228 if (sel
== dap
->select
)
233 swd_queue_dp_write(dap
, DP_SELECT
, sel
);
236 static int swd_queue_ap_read(struct adiv5_ap
*ap
, unsigned reg
,
239 struct adiv5_dap
*dap
= ap
->dap
;
240 const struct swd_driver
*swd
= adiv5_dap_swd_driver(dap
);
243 int retval
= swd_check_reconnect(dap
);
244 if (retval
!= ERROR_OK
)
247 swd_queue_ap_bankselect(ap
, reg
);
248 swd
->read_reg(swd_cmd(true, true, reg
), dap
->last_read
, ap
->memaccess_tck
);
249 dap
->last_read
= data
;
251 return check_sync(dap
);
254 static int swd_queue_ap_write(struct adiv5_ap
*ap
, unsigned reg
,
257 struct adiv5_dap
*dap
= ap
->dap
;
258 const struct swd_driver
*swd
= adiv5_dap_swd_driver(dap
);
261 int retval
= swd_check_reconnect(dap
);
262 if (retval
!= ERROR_OK
)
265 swd_finish_read(dap
);
266 swd_queue_ap_bankselect(ap
, reg
);
267 swd
->write_reg(swd_cmd(false, true, reg
), data
, ap
->memaccess_tck
);
269 return check_sync(dap
);
272 /** Executes all queued DAP operations. */
273 static int swd_run(struct adiv5_dap
*dap
)
275 swd_finish_read(dap
);
276 return swd_run_inner(dap
);
279 /** Put the SWJ-DP back to JTAG mode */
280 static void swd_quit(struct adiv5_dap
*dap
)
282 const struct swd_driver
*swd
= adiv5_dap_swd_driver(dap
);
284 swd
->switch_seq(SWD_TO_JTAG
);
285 /* flush the queue before exit */
289 const struct dap_ops swd_dap_ops
= {
290 .connect
= swd_connect
,
291 .queue_dp_read
= swd_queue_dp_read
,
292 .queue_dp_write
= swd_queue_dp_write
,
293 .queue_ap_read
= swd_queue_ap_read
,
294 .queue_ap_write
= swd_queue_ap_write
,
295 .queue_ap_abort
= swd_queue_ap_abort
,
300 static const struct command_registration swd_commands
[] = {
303 * Set up SWD and JTAG targets identically, unless/until
304 * infrastructure improves ... meanwhile, ignore all
305 * JTAG-specific stuff like IR length for SWD.
307 * REVISIT can we verify "just one SWD DAP" here/early?
310 .jim_handler
= jim_jtag_newtap
,
311 .mode
= COMMAND_CONFIG
,
312 .help
= "declare a new SWD DAP"
314 COMMAND_REGISTRATION_DONE
317 static const struct command_registration swd_handlers
[] = {
321 .help
= "SWD command group",
322 .chain
= swd_commands
,
324 COMMAND_REGISTRATION_DONE
327 static int swd_select(struct command_context
*ctx
)
329 /* FIXME: only place where global 'jtag_interface' is still needed */
330 extern struct jtag_interface
*jtag_interface
;
331 const struct swd_driver
*swd
= jtag_interface
->swd
;
334 retval
= register_commands(ctx
, NULL
, swd_handlers
);
335 if (retval
!= ERROR_OK
)
338 /* be sure driver is in SWD mode; start
339 * with hardware default TRN (1), it can be changed later
341 if (!swd
|| !swd
->read_reg
|| !swd
->write_reg
|| !swd
->init
) {
342 LOG_DEBUG("no SWD driver?");
346 retval
= swd
->init();
347 if (retval
!= ERROR_OK
) {
348 LOG_DEBUG("can't init SWD driver");
355 static int swd_init(struct command_context
*ctx
)
357 /* nothing done here, SWD is initialized
358 * together with the DAP */
362 static struct transport swd_transport
= {
364 .select
= swd_select
,
368 static void swd_constructor(void) __attribute__((constructor
));
369 static void swd_constructor(void)
371 transport_register(&swd_transport
);
374 /** Returns true if the current debug session
375 * is using SWD as its transport.
377 bool transport_is_swd(void)
379 return get_current_transport() == &swd_transport
;
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