1 /***************************************************************************
2 * Copyright (C) 2007-2010 by Øyvind Harboe *
4 * This program is free software; you can redistribute it and/or modify *
5 * it under the terms of the GNU General Public License as published by *
6 * the Free Software Foundation; either version 2 of the License, or *
7 * (at your option) any later version. *
9 * This program is distributed in the hope that it will be useful, *
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of *
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
12 * GNU General Public License for more details. *
14 * You should have received a copy of the GNU General Public License *
15 * along with this program; if not, write to the *
16 * Free Software Foundation, Inc., *
17 * 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. *
18 ***************************************************************************/
20 /* This file supports the zy1000 debugger: http://www.zylin.com/zy1000.html
22 * The zy1000 is a standalone debugger that has a web interface and
23 * requires no drivers on the developer host as all communication
24 * is via TCP/IP. The zy1000 gets it performance(~400-700kBytes/s
25 * DCC downloads @ 16MHz target) as it has an FPGA to hardware
26 * accelerate the JTAG commands, while offering *very* low latency
27 * between OpenOCD and the FPGA registers.
29 * The disadvantage of the zy1000 is that it has a feeble CPU compared to
30 * a PC(ca. 50-500 DMIPS depending on how one counts it), whereas a PC
31 * is on the order of 10000 DMIPS(i.e. at a factor of 20-200).
33 * The zy1000 revc hardware is using an Altera Nios CPU, whereas the
34 * revb is using ARM7 + Xilinx.
36 * See Zylin web pages or contact Zylin for more information.
38 * The reason this code is in OpenOCD rather than OpenOCD linked with the
39 * ZY1000 code is that OpenOCD is the long road towards getting
40 * libopenocd into place. libopenocd will support both low performance,
41 * low latency systems(embedded) and high performance high latency
48 #include <target/embeddedice.h>
49 #include <jtag/minidriver.h>
50 #include <jtag/interface.h>
52 #include <helper/time_support.h>
54 #include <netinet/tcp.h>
57 #include "zy1000_version.h"
59 #include <cyg/hal/hal_io.h> // low level i/o
60 #include <cyg/hal/hal_diag.h>
62 #ifdef CYGPKG_HAL_NIOS2
63 #include <cyg/hal/io.h>
64 #include <cyg/firmwareutil/firmwareutil.h>
67 #define ZYLIN_VERSION GIT_ZY1000_VERSION
68 #define ZYLIN_DATE __DATE__
69 #define ZYLIN_TIME __TIME__
70 #define ZYLIN_OPENOCD GIT_OPENOCD_VERSION
71 #define ZYLIN_OPENOCD_VERSION "ZY1000 " ZYLIN_VERSION " " ZYLIN_DATE
75 static int zy1000_khz(int khz
, int *jtag_speed
)
83 *jtag_speed
= 64000/khz
;
88 static int zy1000_speed_div(int speed
, int *khz
)
102 static bool readPowerDropout(void)
105 // sample and clear power dropout
106 ZY1000_POKE(ZY1000_JTAG_BASE
+ 0x10, 0x80);
107 ZY1000_PEEK(ZY1000_JTAG_BASE
+ 0x10, state
);
109 powerDropout
= (state
& 0x80) != 0;
114 static bool readSRST(void)
117 // sample and clear SRST sensing
118 ZY1000_POKE(ZY1000_JTAG_BASE
+ 0x10, 0x00000040);
119 ZY1000_PEEK(ZY1000_JTAG_BASE
+ 0x10, state
);
121 srstAsserted
= (state
& 0x40) != 0;
125 static int zy1000_srst_asserted(int *srst_asserted
)
127 *srst_asserted
= readSRST();
131 static int zy1000_power_dropout(int *dropout
)
133 *dropout
= readPowerDropout();
137 void zy1000_reset(int trst
, int srst
)
139 LOG_DEBUG("zy1000 trst=%d, srst=%d", trst
, srst
);
141 /* flush the JTAG FIFO. Not flushing the queue before messing with
142 * reset has such interesting bugs as causing hard to reproduce
143 * RCLK bugs as RCLK will stop responding when TRST is asserted
149 ZY1000_POKE(ZY1000_JTAG_BASE
+ 0x14, 0x00000001);
153 /* Danger!!! if clk != 0 when in
154 * idle in TAP_IDLE, reset halt on str912 will fail.
156 ZY1000_POKE(ZY1000_JTAG_BASE
+ 0x10, 0x00000001);
161 ZY1000_POKE(ZY1000_JTAG_BASE
+ 0x14, 0x00000002);
166 ZY1000_POKE(ZY1000_JTAG_BASE
+ 0x10, 0x00000002);
169 if (trst
||(srst
&& (jtag_get_reset_config() & RESET_SRST_PULLS_TRST
)))
171 /* we're now in the RESET state until trst is deasserted */
172 ZY1000_POKE(ZY1000_JTAG_BASE
+ 0x20, TAP_RESET
);
175 /* We'll get RCLK failure when we assert TRST, so clear any false positives here */
176 ZY1000_POKE(ZY1000_JTAG_BASE
+ 0x14, 0x400);
179 /* wait for srst to float back up */
180 if ((!srst
&& ((jtag_get_reset_config() & RESET_TRST_PULLS_SRST
) == 0))||
181 (!srst
&& !trst
&& (jtag_get_reset_config() & RESET_TRST_PULLS_SRST
)))
188 // We don't want to sense our own reset, so we clear here.
189 // There is of course a timing hole where we could loose
195 LOG_USER("SRST took %dms to deassert", (int)total
);
203 start
= timeval_ms();
206 total
= timeval_ms() - start
;
212 LOG_ERROR("SRST took too long to deassert: %dms", (int)total
);
220 int zy1000_speed(int speed
)
222 /* flush JTAG master FIFO before setting speed */
229 ZY1000_POKE(ZY1000_JTAG_BASE
+ 0x10, 0x100);
230 LOG_DEBUG("jtag_speed using RCLK");
234 if (speed
> 8190 || speed
< 2)
236 LOG_USER("valid ZY1000 jtag_speed=[8190,2]. Divisor is 64MHz / even values between 8190-2, i.e. min 7814Hz, max 32MHz");
237 return ERROR_INVALID_ARGUMENTS
;
240 LOG_USER("jtag_speed %d => JTAG clk=%f", speed
, 64.0/(float)speed
);
241 ZY1000_POKE(ZY1000_JTAG_BASE
+ 0x14, 0x100);
242 ZY1000_POKE(ZY1000_JTAG_BASE
+ 0x1c, speed
&~1);
247 static bool savePower
;
250 static void setPower(bool power
)
255 ZY1000_POKE(ZY1000_JTAG_BASE
+ 0x14, 0x8);
258 ZY1000_POKE(ZY1000_JTAG_BASE
+ 0x10, 0x8);
262 COMMAND_HANDLER(handle_power_command
)
268 COMMAND_PARSE_ON_OFF(CMD_ARGV
[0], enable
);
273 LOG_INFO("Target power %s", savePower
? "on" : "off");
276 return ERROR_INVALID_ARGUMENTS
;
283 static char *tcp_server
= "notspecified";
284 static int jim_zy1000_server(Jim_Interp
*interp
, int argc
, Jim_Obj
*const *argv
)
289 tcp_server
= strdup(Jim_GetString(argv
[1], NULL
));
296 /* Give TELNET a way to find out what version this is */
297 static int jim_zy1000_version(Jim_Interp
*interp
, int argc
, Jim_Obj
*const *argv
)
299 if ((argc
< 1) || (argc
> 3))
301 const char *version_str
= NULL
;
305 version_str
= ZYLIN_OPENOCD_VERSION
;
308 const char *str
= Jim_GetString(argv
[1], NULL
);
309 const char *str2
= NULL
;
311 str2
= Jim_GetString(argv
[2], NULL
);
312 if (strcmp("openocd", str
) == 0)
314 version_str
= ZYLIN_OPENOCD
;
316 else if (strcmp("zy1000", str
) == 0)
318 version_str
= ZYLIN_VERSION
;
320 else if (strcmp("date", str
) == 0)
322 version_str
= ZYLIN_DATE
;
324 else if (strcmp("time", str
) == 0)
326 version_str
= ZYLIN_TIME
;
328 else if (strcmp("pcb", str
) == 0)
330 #ifdef CYGPKG_HAL_NIOS2
336 #ifdef CYGPKG_HAL_NIOS2
337 else if (strcmp("fpga", str
) == 0)
340 /* return a list of 32 bit integers to describe the expected
343 static char *fpga_id
= "0x12345678 0x12345678 0x12345678 0x12345678";
344 uint32_t id
, timestamp
;
345 HAL_READ_UINT32(SYSID_BASE
, id
);
346 HAL_READ_UINT32(SYSID_BASE
+4, timestamp
);
347 sprintf(fpga_id
, "0x%08x 0x%08x 0x%08x 0x%08x", id
, timestamp
, SYSID_ID
, SYSID_TIMESTAMP
);
348 version_str
= fpga_id
;
349 if ((argc
>2) && (strcmp("time", str2
) == 0))
351 time_t last_mod
= timestamp
;
352 char * t
= ctime (&last_mod
) ;
365 Jim_SetResult(interp
, Jim_NewStringObj(interp
, version_str
, -1));
371 #ifdef CYGPKG_HAL_NIOS2
377 struct cyg_upgrade_info
*upgraded_file
;
380 static void report_info(void *data
, const char * format
, va_list args
)
382 char *s
= alloc_vprintf(format
, args
);
387 struct cyg_upgrade_info firmware_info
=
389 (uint8_t *)0x84000000,
395 "ZylinNiosFirmware\n",
399 static int jim_zy1000_writefirmware(Jim_Interp
*interp
, int argc
, Jim_Obj
*const *argv
)
405 const char *str
= Jim_GetString(argv
[1], &length
);
409 if ((tmpFile
= open(firmware_info
.file
, O_RDWR
| O_CREAT
| O_TRUNC
)) <= 0)
414 success
= write(tmpFile
, str
, length
) == length
;
419 if (!cyg_firmware_upgrade(NULL
, firmware_info
))
427 zylinjtag_Jim_Command_powerstatus(Jim_Interp
*interp
,
429 Jim_Obj
* const *argv
)
433 Jim_WrongNumArgs(interp
, 1, argv
, "powerstatus");
437 bool dropout
= readPowerDropout();
439 Jim_SetResult(interp
, Jim_NewIntObj(interp
, dropout
));
446 int zy1000_quit(void)
454 int interface_jtag_execute_queue(void)
459 ZY1000_PEEK(ZY1000_JTAG_BASE
+ 0x10, empty
);
460 /* clear JTAG error register */
461 ZY1000_POKE(ZY1000_JTAG_BASE
+ 0x14, 0x400);
463 if ((empty
&0x400) != 0)
465 LOG_WARNING("RCLK timeout");
466 /* the error is informative only as we don't want to break the firmware if there
467 * is a false positive.
469 // return ERROR_FAIL;
478 static uint32_t getShiftValue(void)
482 ZY1000_PEEK(ZY1000_JTAG_BASE
+ 0xc, value
);
483 VERBOSE(LOG_INFO("getShiftValue %08x", value
));
487 static uint32_t getShiftValueFlip(void)
491 ZY1000_PEEK(ZY1000_JTAG_BASE
+ 0x18, value
);
492 VERBOSE(LOG_INFO("getShiftValue %08x (flipped)", value
));
498 static void shiftValueInnerFlip(const tap_state_t state
, const tap_state_t endState
, int repeat
, uint32_t value
)
500 VERBOSE(LOG_INFO("shiftValueInner %s %s %d %08x (flipped)", tap_state_name(state
), tap_state_name(endState
), repeat
, value
));
504 ZY1000_POKE(ZY1000_JTAG_BASE
+ 0xc, value
);
505 ZY1000_POKE(ZY1000_JTAG_BASE
+ 0x8, (1 << 15) | (repeat
<< 8) | (a
<< 4) | b
);
506 VERBOSE(getShiftValueFlip());
510 // here we shuffle N bits out/in
511 static __inline
void scanBits(const uint8_t *out_value
, uint8_t *in_value
, int num_bits
, bool pause
, tap_state_t shiftState
, tap_state_t end_state
)
513 tap_state_t pause_state
= shiftState
;
514 for (int j
= 0; j
< num_bits
; j
+= 32)
516 int k
= num_bits
- j
;
520 /* we have more to shift out */
523 /* this was the last to shift out this time */
524 pause_state
= end_state
;
527 // we have (num_bits + 7)/8 bytes of bits to toggle out.
528 // bits are pushed out LSB to MSB
531 if (out_value
!= NULL
)
533 for (int l
= 0; l
< k
; l
+= 8)
535 value
|=out_value
[(j
+ l
)/8]<<l
;
538 /* mask away unused bits for easier debugging */
541 value
&=~(((uint32_t)0xffffffff) << k
);
544 /* Shifting by >= 32 is not defined by the C standard
545 * and will in fact shift by &0x1f bits on nios */
548 shiftValueInner(shiftState
, pause_state
, k
, value
);
550 if (in_value
!= NULL
)
552 // data in, LSB to MSB
553 value
= getShiftValue();
554 // we're shifting in data to MSB, shift data to be aligned for returning the value
557 for (int l
= 0; l
< k
; l
+= 8)
559 in_value
[(j
+ l
)/8]=(value
>> l
)&0xff;
565 static __inline
void scanFields(int num_fields
, const struct scan_field
*fields
, tap_state_t shiftState
, tap_state_t end_state
)
567 for (int i
= 0; i
< num_fields
; i
++)
569 scanBits(fields
[i
].out_value
,
578 int interface_jtag_add_ir_scan(struct jtag_tap
*active
, const struct scan_field
*fields
, tap_state_t state
)
581 struct jtag_tap
*tap
, *nextTap
;
582 tap_state_t pause_state
= TAP_IRSHIFT
;
584 for (tap
= jtag_tap_next_enabled(NULL
); tap
!= NULL
; tap
= nextTap
)
586 nextTap
= jtag_tap_next_enabled(tap
);
591 scan_size
= tap
->ir_length
;
593 /* search the list */
596 scanFields(1, fields
, TAP_IRSHIFT
, pause_state
);
597 /* update device information */
598 buf_cpy(fields
[0].out_value
, tap
->cur_instr
, scan_size
);
603 /* if a device isn't listed, set it to BYPASS */
604 assert(scan_size
<= 32);
605 shiftValueInner(TAP_IRSHIFT
, pause_state
, scan_size
, 0xffffffff);
618 int interface_jtag_add_plain_ir_scan(int num_bits
, const uint8_t *out_bits
, uint8_t *in_bits
, tap_state_t state
)
620 scanBits(out_bits
, in_bits
, num_bits
, true, TAP_IRSHIFT
, state
);
624 int interface_jtag_add_dr_scan(struct jtag_tap
*active
, int num_fields
, const struct scan_field
*fields
, tap_state_t state
)
626 struct jtag_tap
*tap
, *nextTap
;
627 tap_state_t pause_state
= TAP_DRSHIFT
;
628 for (tap
= jtag_tap_next_enabled(NULL
); tap
!= NULL
; tap
= nextTap
)
630 nextTap
= jtag_tap_next_enabled(tap
);
636 /* Find a range of fields to write to this tap */
639 assert(!tap
->bypass
);
641 scanFields(num_fields
, fields
, TAP_DRSHIFT
, pause_state
);
644 /* Shift out a 0 for disabled tap's */
646 shiftValueInner(TAP_DRSHIFT
, pause_state
, 1, 0);
652 int interface_jtag_add_plain_dr_scan(int num_bits
, const uint8_t *out_bits
, uint8_t *in_bits
, tap_state_t state
)
654 scanBits(out_bits
, in_bits
, num_bits
, true, TAP_DRSHIFT
, state
);
658 int interface_jtag_add_tlr()
660 setCurrentState(TAP_RESET
);
665 int interface_jtag_add_reset(int req_trst
, int req_srst
)
667 zy1000_reset(req_trst
, req_srst
);
671 static int zy1000_jtag_add_clocks(int num_cycles
, tap_state_t state
, tap_state_t clockstate
)
673 /* num_cycles can be 0 */
674 setCurrentState(clockstate
);
676 /* execute num_cycles, 32 at the time. */
678 for (i
= 0; i
< num_cycles
; i
+= 32)
682 if (num_cycles
-i
< num
)
686 shiftValueInner(clockstate
, clockstate
, num
, 0);
690 /* finish in end_state */
691 setCurrentState(state
);
693 tap_state_t t
= TAP_IDLE
;
694 /* test manual drive code on any target */
696 uint8_t tms_scan
= tap_get_tms_path(t
, state
);
697 int tms_count
= tap_get_tms_path_len(tap_get_state(), tap_get_end_state());
699 for (i
= 0; i
< tms_count
; i
++)
701 tms
= (tms_scan
>> i
) & 1;
703 ZY1000_POKE(ZY1000_JTAG_BASE
+ 0x28, tms
);
706 ZY1000_POKE(ZY1000_JTAG_BASE
+ 0x20, state
);
712 int interface_jtag_add_runtest(int num_cycles
, tap_state_t state
)
714 return zy1000_jtag_add_clocks(num_cycles
, state
, TAP_IDLE
);
717 int interface_jtag_add_clocks(int num_cycles
)
719 return zy1000_jtag_add_clocks(num_cycles
, cmd_queue_cur_state
, cmd_queue_cur_state
);
722 int interface_add_tms_seq(unsigned num_bits
, const uint8_t *seq
, enum tap_state state
)
724 /*wait for the fifo to be empty*/
727 for (unsigned i
= 0; i
< num_bits
; i
++)
731 if (((seq
[i
/8] >> (i
% 8)) & 1) == 0)
741 ZY1000_POKE(ZY1000_JTAG_BASE
+ 0x28, tms
);
745 if (state
!= TAP_INVALID
)
747 ZY1000_POKE(ZY1000_JTAG_BASE
+ 0x20, state
);
750 /* this would be normal if we are switching to SWD mode */
755 int interface_jtag_add_pathmove(int num_states
, const tap_state_t
*path
)
762 tap_state_t cur_state
= cmd_queue_cur_state
;
765 memset(seq
, 0, sizeof(seq
));
766 assert(num_states
< (int)((sizeof(seq
) * 8)));
770 if (tap_state_transition(cur_state
, false) == path
[state_count
])
774 else if (tap_state_transition(cur_state
, true) == path
[state_count
])
780 LOG_ERROR("BUG: %s -> %s isn't a valid TAP transition", tap_state_name(cur_state
), tap_state_name(path
[state_count
]));
784 seq
[state_count
/8] = seq
[state_count
/8] | (tms
<< (state_count
% 8));
786 cur_state
= path
[state_count
];
791 return interface_add_tms_seq(state_count
, seq
, cur_state
);
794 static void jtag_pre_post_bits(struct jtag_tap
*tap
, int *pre
, int *post
)
796 /* bypass bits before and after */
801 struct jtag_tap
*cur_tap
, *nextTap
;
802 for (cur_tap
= jtag_tap_next_enabled(NULL
); cur_tap
!= NULL
; cur_tap
= nextTap
)
804 nextTap
= jtag_tap_next_enabled(cur_tap
);
823 void embeddedice_write_dcc(struct jtag_tap
*tap
, int reg_addr
, uint8_t *buffer
, int little
, int count
)
828 jtag_pre_post_bits(tap
, &pre_bits
, &post_bits
);
830 if (pre_bits
+ post_bits
+ 6 > 32)
833 for (i
= 0; i
< count
; i
++)
835 embeddedice_write_reg_inner(tap
, reg_addr
, fast_target_buffer_get_u32(buffer
, little
));
840 shiftValueInner(TAP_DRSHIFT
, TAP_DRSHIFT
, pre_bits
, 0);
842 for (i
= 0; i
< count
- 1; i
++)
844 /* Fewer pokes means we get to use the FIFO more efficiently */
845 shiftValueInner(TAP_DRSHIFT
, TAP_DRSHIFT
, 32, fast_target_buffer_get_u32(buffer
, little
));
846 shiftValueInner(TAP_DRSHIFT
, TAP_IDLE
, 6 + post_bits
+ pre_bits
, (reg_addr
| (1 << 5)));
849 shiftValueInner(TAP_DRSHIFT
, TAP_DRSHIFT
, 32, fast_target_buffer_get_u32(buffer
, little
));
850 shiftValueInner(TAP_DRSHIFT
, TAP_IDLE
, 6 + post_bits
, (reg_addr
| (1 << 5)));
856 int arm11_run_instr_data_to_core_noack_inner(struct jtag_tap
* tap
, uint32_t opcode
, uint32_t * data
, size_t count
)
859 int arm11_run_instr_data_to_core_noack_inner_default(struct jtag_tap
* tap
, uint32_t opcode
, uint32_t * data
, size_t count
);
860 return arm11_run_instr_data_to_core_noack_inner_default(tap
, opcode
, data
, count
);
862 static const int bits
[] = {32, 2};
863 uint32_t values
[] = {0, 0};
865 /* FIX!!!!!! the target_write_memory() API started this nasty problem
866 * with unaligned uint32_t * pointers... */
867 const uint8_t *t
= (const uint8_t *)data
;
870 /* bypass bits before and after */
873 jtag_pre_post_bits(tap
, &pre_bits
, &post_bits
);
876 struct jtag_tap
*cur_tap
, *nextTap
;
877 for (cur_tap
= jtag_tap_next_enabled(NULL
); cur_tap
!= NULL
; cur_tap
= nextTap
)
879 nextTap
= jtag_tap_next_enabled(cur_tap
);
900 shiftValueInner(TAP_DRSHIFT
, TAP_DRSHIFT
, pre_bits
, 0);
908 shiftValueInner(TAP_DRSHIFT
, TAP_DRSHIFT
, 32, value
);
910 shiftValueInner(TAP_DRSHIFT
, TAP_DRPAUSE
, post_bits
, 0);
913 /* copy & paste from arm11_dbgtap.c */
914 //TAP_DREXIT2, TAP_DRUPDATE, TAP_IDLE, TAP_IDLE, TAP_IDLE, TAP_DRSELECT, TAP_DRCAPTURE, TAP_DRSHIFT
917 ZY1000_POKE(ZY1000_JTAG_BASE
+ 0x28, 1);
918 ZY1000_POKE(ZY1000_JTAG_BASE
+ 0x28, 1);
919 ZY1000_POKE(ZY1000_JTAG_BASE
+ 0x28, 0);
920 ZY1000_POKE(ZY1000_JTAG_BASE
+ 0x28, 0);
921 ZY1000_POKE(ZY1000_JTAG_BASE
+ 0x28, 0);
922 ZY1000_POKE(ZY1000_JTAG_BASE
+ 0x28, 1);
923 ZY1000_POKE(ZY1000_JTAG_BASE
+ 0x28, 0);
924 ZY1000_POKE(ZY1000_JTAG_BASE
+ 0x28, 0);
925 /* we don't have to wait for the queue to empty here. waitIdle(); */
926 ZY1000_POKE(ZY1000_JTAG_BASE
+ 0x20, TAP_DRSHIFT
);
928 static const tap_state_t arm11_MOVE_DRPAUSE_IDLE_DRPAUSE_with_delay
[] =
930 TAP_DREXIT2
, TAP_DRUPDATE
, TAP_IDLE
, TAP_IDLE
, TAP_IDLE
, TAP_DRSELECT
, TAP_DRCAPTURE
, TAP_DRSHIFT
933 jtag_add_pathmove(ARRAY_SIZE(arm11_MOVE_DRPAUSE_IDLE_DRPAUSE_with_delay
),
934 arm11_MOVE_DRPAUSE_IDLE_DRPAUSE_with_delay
);
939 values
[0] |= (*t
++<<8);
940 values
[0] |= (*t
++<<16);
941 values
[0] |= (*t
++<<24);
943 /* This will happen on the last iteration updating the current tap state
944 * so we don't have to track it during the common code path */
951 return jtag_execute_queue();
956 static const struct command_registration zy1000_commands
[] = {
959 .handler
= handle_power_command
,
961 .help
= "Turn power switch to target on/off. "
962 "With no arguments, prints status.",
963 .usage
= "('on'|'off)",
967 .name
= "zy1000_version",
969 .jim_handler
= jim_zy1000_version
,
970 .help
= "Print version info for zy1000.",
971 .usage
= "['openocd'|'zy1000'|'date'|'time'|'pcb'|'fpga']",
975 .name
= "zy1000_server",
977 .jim_handler
= jim_zy1000_server
,
978 .help
= "Tcpip address for ZY1000 server.",
983 .name
= "powerstatus",
985 .jim_handler
= zylinjtag_Jim_Command_powerstatus
,
986 .help
= "Returns power status of target",
988 #ifdef CYGPKG_HAL_NIOS2
990 .name
= "updatezy1000firmware",
992 .jim_handler
= jim_zy1000_writefirmware
,
993 .help
= "writes firmware to flash",
994 /* .usage = "some_string", */
997 COMMAND_REGISTRATION_DONE
1001 static int tcp_ip
= -1;
1003 /* Write large packets if we can */
1004 static size_t out_pos
;
1005 static uint8_t out_buffer
[16384];
1006 static size_t in_pos
;
1007 static size_t in_write
;
1008 static uint8_t in_buffer
[16384];
1010 static bool flush_writes(void)
1012 bool ok
= (write(tcp_ip
, out_buffer
, out_pos
) == (int)out_pos
);
1017 static bool writeLong(uint32_t l
)
1020 for (i
= 0; i
< 4; i
++)
1022 uint8_t c
= (l
>> (i
*8))&0xff;
1023 out_buffer
[out_pos
++] = c
;
1024 if (out_pos
>= sizeof(out_buffer
))
1026 if (!flush_writes())
1035 static bool readLong(uint32_t *out_data
)
1039 if (!flush_writes())
1047 for (i
= 0; i
< 4; i
++)
1050 if (in_pos
== in_write
)
1054 t
= read(tcp_ip
, in_buffer
, sizeof(in_buffer
));
1059 in_write
= (size_t) t
;
1062 c
= in_buffer
[in_pos
++];
1064 data
|= (c
<< (i
*8));
1072 ZY1000_CMD_POKE
= 0x0,
1073 ZY1000_CMD_PEEK
= 0x8,
1074 ZY1000_CMD_SLEEP
= 0x1,
1078 #if !BUILD_ECOSBOARD
1080 #include <sys/socket.h> /* for socket(), connect(), send(), and recv() */
1081 #include <arpa/inet.h> /* for sockaddr_in and inet_addr() */
1083 /* We initialize this late since we need to know the server address
1086 static void tcpip_open(void)
1091 struct sockaddr_in echoServAddr
; /* Echo server address */
1093 /* Create a reliable, stream socket using TCP */
1094 if ((tcp_ip
= socket(PF_INET
, SOCK_STREAM
, IPPROTO_TCP
)) < 0)
1096 fprintf(stderr
, "Failed to connect to zy1000 server\n");
1100 /* Construct the server address structure */
1101 memset(&echoServAddr
, 0, sizeof(echoServAddr
)); /* Zero out structure */
1102 echoServAddr
.sin_family
= AF_INET
; /* Internet address family */
1103 echoServAddr
.sin_addr
.s_addr
= inet_addr(tcp_server
); /* Server IP address */
1104 echoServAddr
.sin_port
= htons(7777); /* Server port */
1106 /* Establish the connection to the echo server */
1107 if (connect(tcp_ip
, (struct sockaddr
*) &echoServAddr
, sizeof(echoServAddr
)) < 0)
1109 fprintf(stderr
, "Failed to connect to zy1000 server\n");
1114 setsockopt(tcp_ip
, /* socket affected */
1115 IPPROTO_TCP
, /* set option at TCP level */
1116 TCP_NODELAY
, /* name of option */
1117 (char *)&flag
, /* the cast is historical cruft */
1118 sizeof(int)); /* length of option value */
1124 void zy1000_tcpout(uint32_t address
, uint32_t data
)
1127 if (!writeLong((ZY1000_CMD_POKE
<< 24) | address
)||
1130 fprintf(stderr
, "Could not write to zy1000 server\n");
1135 uint32_t zy1000_tcpin(uint32_t address
)
1139 if (!writeLong((ZY1000_CMD_PEEK
<< 24) | address
)||
1142 fprintf(stderr
, "Could not read from zy1000 server\n");
1148 int interface_jtag_add_sleep(uint32_t us
)
1151 if (!writeLong((ZY1000_CMD_SLEEP
<< 24))||
1154 fprintf(stderr
, "Could not read from zy1000 server\n");
1164 static char tcpip_stack
[2048];
1166 static cyg_thread tcpip_thread_object
;
1167 static cyg_handle_t tcpip_thread_handle
;
1169 /* Infinite loop peeking & poking */
1170 static void tcpipserver(void)
1175 if (!readLong(&address
))
1177 enum ZY1000_CMD c
= (address
>> 24) & 0xff;
1178 address
&= 0xffffff;
1181 case ZY1000_CMD_POKE
:
1184 if (!readLong(&data
))
1186 address
&= ~0x80000000;
1187 ZY1000_POKE(address
+ ZY1000_JTAG_BASE
, data
);
1190 case ZY1000_CMD_PEEK
:
1193 ZY1000_PEEK(address
+ ZY1000_JTAG_BASE
, data
);
1194 if (!writeLong(data
))
1198 case ZY1000_CMD_SLEEP
:
1201 if (!readLong(&data
))
1213 static void tcpip_server(cyg_addrword_t data
)
1215 int so_reuseaddr_option
= 1;
1218 if ((fd
= socket(AF_INET
, SOCK_STREAM
, 0)) == -1)
1220 LOG_ERROR("error creating socket: %s", strerror(errno
));
1224 setsockopt(fd
, SOL_SOCKET
, SO_REUSEADDR
, (void*) &so_reuseaddr_option
,
1227 struct sockaddr_in sin
;
1228 unsigned int address_size
;
1229 address_size
= sizeof(sin
);
1230 memset(&sin
, 0, sizeof(sin
));
1231 sin
.sin_family
= AF_INET
;
1232 sin
.sin_addr
.s_addr
= INADDR_ANY
;
1233 sin
.sin_port
= htons(7777);
1235 if (bind(fd
, (struct sockaddr
*) &sin
, sizeof(sin
)) == -1)
1237 LOG_ERROR("couldn't bind to socket: %s", strerror(errno
));
1241 if (listen(fd
, 1) == -1)
1243 LOG_ERROR("couldn't listen on socket: %s", strerror(errno
));
1250 tcp_ip
= accept(fd
, (struct sockaddr
*) &sin
, &address_size
);
1257 setsockopt(tcp_ip
, /* socket affected */
1258 IPPROTO_TCP
, /* set option at TCP level */
1259 TCP_NODELAY
, /* name of option */
1260 (char *)&flag
, /* the cast is historical cruft */
1261 sizeof(int)); /* length of option value */
1263 bool save_poll
= jtag_poll_get_enabled();
1265 /* polling will screw up the "connection" */
1266 jtag_poll_set_enabled(false);
1270 jtag_poll_set_enabled(save_poll
);
1279 int interface_jtag_add_sleep(uint32_t us
)
1288 int zy1000_init(void)
1291 LOG_USER("%s", ZYLIN_OPENOCD_VERSION
);
1294 ZY1000_POKE(ZY1000_JTAG_BASE
+ 0x10, 0x30); // Turn on LED1 & LED2
1296 setPower(true); // on by default
1299 /* deassert resets. Important to avoid infinite loop waiting for SRST to deassert */
1301 zy1000_speed(jtag_get_speed());
1305 cyg_thread_create(1, tcpip_server
, (cyg_addrword_t
) 0, "tcip/ip server",
1306 (void *) tcpip_stack
, sizeof(tcpip_stack
),
1307 &tcpip_thread_handle
, &tcpip_thread_object
);
1308 cyg_thread_resume(tcpip_thread_handle
);
1316 struct jtag_interface zy1000_interface
=
1319 .supported
= DEBUG_CAP_TMS_SEQ
,
1320 .execute_queue
= NULL
,
1321 .speed
= zy1000_speed
,
1322 .commands
= zy1000_commands
,
1323 .init
= zy1000_init
,
1324 .quit
= zy1000_quit
,
1326 .speed_div
= zy1000_speed_div
,
1327 .power_dropout
= zy1000_power_dropout
,
1328 .srst_asserted
= zy1000_srst_asserted
,
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