zy1000: use correct base clock when calculating speed divisor
[openocd.git] / src / jtag / zy1000 / zy1000.c
1 /***************************************************************************
2 * Copyright (C) 2007-2010 by Øyvind Harboe *
3 * *
4 * This program is free software; you can redistribute it and/or modify *
5 * it under the terms of the GNU General Public License as published by *
6 * the Free Software Foundation; either version 2 of the License, or *
7 * (at your option) any later version. *
8 * *
9 * This program is distributed in the hope that it will be useful, *
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of *
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
12 * GNU General Public License for more details. *
13 * *
14 * You should have received a copy of the GNU General Public License *
15 * along with this program; if not, write to the *
16 * Free Software Foundation, Inc., *
17 * 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. *
18 ***************************************************************************/
19
20 /* This file supports the zy1000 debugger: http://www.zylin.com/zy1000.html
21 *
22 * The zy1000 is a standalone debugger that has a web interface and
23 * requires no drivers on the developer host as all communication
24 * is via TCP/IP. The zy1000 gets it performance(~400-700kBytes/s
25 * DCC downloads @ 16MHz target) as it has an FPGA to hardware
26 * accelerate the JTAG commands, while offering *very* low latency
27 * between OpenOCD and the FPGA registers.
28 *
29 * The disadvantage of the zy1000 is that it has a feeble CPU compared to
30 * a PC(ca. 50-500 DMIPS depending on how one counts it), whereas a PC
31 * is on the order of 10000 DMIPS(i.e. at a factor of 20-200).
32 *
33 * The zy1000 revc hardware is using an Altera Nios CPU, whereas the
34 * revb is using ARM7 + Xilinx.
35 *
36 * See Zylin web pages or contact Zylin for more information.
37 *
38 * The reason this code is in OpenOCD rather than OpenOCD linked with the
39 * ZY1000 code is that OpenOCD is the long road towards getting
40 * libopenocd into place. libopenocd will support both low performance,
41 * low latency systems(embedded) and high performance high latency
42 * systems(PCs).
43 */
44 #ifdef HAVE_CONFIG_H
45 #include "config.h"
46 #endif
47
48 #include <target/embeddedice.h>
49 #include <jtag/minidriver.h>
50 #include <jtag/interface.h>
51 #include <time.h>
52 #include <helper/time_support.h>
53
54 #include <netinet/tcp.h>
55
56 #if BUILD_ECOSBOARD
57 #include "zy1000_version.h"
58
59 #include <cyg/hal/hal_io.h> // low level i/o
60 #include <cyg/hal/hal_diag.h>
61
62 #ifdef CYGPKG_HAL_NIOS2
63 #include <cyg/hal/io.h>
64 #include <cyg/firmwareutil/firmwareutil.h>
65 #define ZYLIN_KHZ 60000
66 #else
67 #define ZYLIN_KHZ 64000
68 #endif
69
70 #define ZYLIN_VERSION GIT_ZY1000_VERSION
71 #define ZYLIN_DATE __DATE__
72 #define ZYLIN_TIME __TIME__
73 #define ZYLIN_OPENOCD GIT_OPENOCD_VERSION
74 #define ZYLIN_OPENOCD_VERSION "ZY1000 " ZYLIN_VERSION " " ZYLIN_DATE
75
76 #else
77 /* Assume we're connecting to a revc w/60MHz clock. */
78 #define ZYLIN_KHZ 60000
79 #endif
80
81
82 /* The software needs to check if it's in RCLK mode or not */
83 static bool zy1000_rclk = false;
84
85 static int zy1000_khz(int khz, int *jtag_speed)
86 {
87 if (khz == 0)
88 {
89 *jtag_speed = 0;
90 }
91 else
92 {
93 int speed;
94 /* Round speed up to nearest divisor.
95 *
96 * E.g. 16000kHz
97 * (64000 + 15999) / 16000 = 4
98 * (4 + 1) / 2 = 2
99 * 2 * 2 = 4
100 *
101 * 64000 / 4 = 16000
102 *
103 * E.g. 15999
104 * (64000 + 15998) / 15999 = 5
105 * (5 + 1) / 2 = 3
106 * 3 * 2 = 6
107 *
108 * 64000 / 6 = 10666
109 *
110 */
111 speed = (ZYLIN_KHZ + (khz -1)) / khz;
112 speed = (speed + 1 ) / 2;
113 speed *= 2;
114 if (speed > 8190)
115 {
116 /* maximum dividend */
117 speed = 8190;
118 }
119 *jtag_speed = speed;
120 }
121 return ERROR_OK;
122 }
123
124 static int zy1000_speed_div(int speed, int *khz)
125 {
126 if (speed == 0)
127 {
128 *khz = 0;
129 }
130 else
131 {
132 *khz = ZYLIN_KHZ / speed;
133 }
134
135 return ERROR_OK;
136 }
137
138 static bool readPowerDropout(void)
139 {
140 uint32_t state;
141 // sample and clear power dropout
142 ZY1000_POKE(ZY1000_JTAG_BASE + 0x10, 0x80);
143 ZY1000_PEEK(ZY1000_JTAG_BASE + 0x10, state);
144 bool powerDropout;
145 powerDropout = (state & 0x80) != 0;
146 return powerDropout;
147 }
148
149
150 static bool readSRST(void)
151 {
152 uint32_t state;
153 // sample and clear SRST sensing
154 ZY1000_POKE(ZY1000_JTAG_BASE + 0x10, 0x00000040);
155 ZY1000_PEEK(ZY1000_JTAG_BASE + 0x10, state);
156 bool srstAsserted;
157 srstAsserted = (state & 0x40) != 0;
158 return srstAsserted;
159 }
160
161 static int zy1000_srst_asserted(int *srst_asserted)
162 {
163 *srst_asserted = readSRST();
164 return ERROR_OK;
165 }
166
167 static int zy1000_power_dropout(int *dropout)
168 {
169 *dropout = readPowerDropout();
170 return ERROR_OK;
171 }
172
173 void zy1000_reset(int trst, int srst)
174 {
175 LOG_DEBUG("zy1000 trst=%d, srst=%d", trst, srst);
176
177 /* flush the JTAG FIFO. Not flushing the queue before messing with
178 * reset has such interesting bugs as causing hard to reproduce
179 * RCLK bugs as RCLK will stop responding when TRST is asserted
180 */
181 waitIdle();
182
183 if (!srst)
184 {
185 ZY1000_POKE(ZY1000_JTAG_BASE + 0x14, 0x00000001);
186 }
187 else
188 {
189 /* Danger!!! if clk != 0 when in
190 * idle in TAP_IDLE, reset halt on str912 will fail.
191 */
192 ZY1000_POKE(ZY1000_JTAG_BASE + 0x10, 0x00000001);
193 }
194
195 if (!trst)
196 {
197 ZY1000_POKE(ZY1000_JTAG_BASE + 0x14, 0x00000002);
198 }
199 else
200 {
201 /* assert reset */
202 ZY1000_POKE(ZY1000_JTAG_BASE + 0x10, 0x00000002);
203 }
204
205 if (trst||(srst && (jtag_get_reset_config() & RESET_SRST_PULLS_TRST)))
206 {
207 /* we're now in the RESET state until trst is deasserted */
208 ZY1000_POKE(ZY1000_JTAG_BASE + 0x20, TAP_RESET);
209 } else
210 {
211 /* We'll get RCLK failure when we assert TRST, so clear any false positives here */
212 ZY1000_POKE(ZY1000_JTAG_BASE + 0x14, 0x400);
213 }
214
215 /* wait for srst to float back up */
216 if ((!srst && ((jtag_get_reset_config() & RESET_TRST_PULLS_SRST) == 0))||
217 (!srst && !trst && (jtag_get_reset_config() & RESET_TRST_PULLS_SRST)))
218 {
219 bool first = true;
220 long long start = 0;
221 long total = 0;
222 for (;;)
223 {
224 // We don't want to sense our own reset, so we clear here.
225 // There is of course a timing hole where we could loose
226 // a "real" reset.
227 if (!readSRST())
228 {
229 if (total > 1)
230 {
231 LOG_USER("SRST took %dms to deassert", (int)total);
232 }
233 break;
234 }
235
236 if (first)
237 {
238 first = false;
239 start = timeval_ms();
240 }
241
242 total = timeval_ms() - start;
243
244 keep_alive();
245
246 if (total > 5000)
247 {
248 LOG_ERROR("SRST took too long to deassert: %dms", (int)total);
249 break;
250 }
251 }
252
253 }
254 }
255
256 int zy1000_speed(int speed)
257 {
258 /* flush JTAG master FIFO before setting speed */
259 waitIdle();
260
261 zy1000_rclk = false;
262
263 if (speed == 0)
264 {
265 /*0 means RCLK*/
266 ZY1000_POKE(ZY1000_JTAG_BASE + 0x10, 0x100);
267 zy1000_rclk = true;
268 LOG_DEBUG("jtag_speed using RCLK");
269 }
270 else
271 {
272 if (speed > 8190 || speed < 2)
273 {
274 LOG_USER("valid ZY1000 jtag_speed=[8190,2]. With divisor is %dkHz / even values between 8190-2, i.e. min %dHz, max %dMHz",
275 ZYLIN_KHZ, (ZYLIN_KHZ * 1000) / 8190, ZYLIN_KHZ / (2 * 1000));
276 return ERROR_INVALID_ARGUMENTS;
277 }
278
279 int khz;
280 speed &= ~1;
281 zy1000_speed_div(speed, &khz);
282 LOG_USER("jtag_speed %d => JTAG clk=%d kHz", speed, khz);
283 ZY1000_POKE(ZY1000_JTAG_BASE + 0x14, 0x100);
284 ZY1000_POKE(ZY1000_JTAG_BASE + 0x1c, speed);
285 }
286 return ERROR_OK;
287 }
288
289 static bool savePower;
290
291
292 static void setPower(bool power)
293 {
294 savePower = power;
295 if (power)
296 {
297 ZY1000_POKE(ZY1000_JTAG_BASE + 0x14, 0x8);
298 } else
299 {
300 ZY1000_POKE(ZY1000_JTAG_BASE + 0x10, 0x8);
301 }
302 }
303
304 COMMAND_HANDLER(handle_power_command)
305 {
306 switch (CMD_ARGC)
307 {
308 case 1: {
309 bool enable;
310 COMMAND_PARSE_ON_OFF(CMD_ARGV[0], enable);
311 setPower(enable);
312 // fall through
313 }
314 case 0:
315 LOG_INFO("Target power %s", savePower ? "on" : "off");
316 break;
317 default:
318 return ERROR_INVALID_ARGUMENTS;
319 }
320
321 return ERROR_OK;
322 }
323
324 #if !BUILD_ECOSBOARD
325 static char *tcp_server = "notspecified";
326 static int jim_zy1000_server(Jim_Interp *interp, int argc, Jim_Obj *const *argv)
327 {
328 if (argc != 2)
329 return JIM_ERR;
330
331 tcp_server = strdup(Jim_GetString(argv[1], NULL));
332
333 return JIM_OK;
334 }
335 #endif
336
337 #if BUILD_ECOSBOARD
338 /* Give TELNET a way to find out what version this is */
339 static int jim_zy1000_version(Jim_Interp *interp, int argc, Jim_Obj *const *argv)
340 {
341 if ((argc < 1) || (argc > 3))
342 return JIM_ERR;
343 const char *version_str = NULL;
344
345 if (argc == 1)
346 {
347 version_str = ZYLIN_OPENOCD_VERSION;
348 } else
349 {
350 const char *str = Jim_GetString(argv[1], NULL);
351 const char *str2 = NULL;
352 if (argc > 2)
353 str2 = Jim_GetString(argv[2], NULL);
354 if (strcmp("openocd", str) == 0)
355 {
356 version_str = ZYLIN_OPENOCD;
357 }
358 else if (strcmp("zy1000", str) == 0)
359 {
360 version_str = ZYLIN_VERSION;
361 }
362 else if (strcmp("date", str) == 0)
363 {
364 version_str = ZYLIN_DATE;
365 }
366 else if (strcmp("time", str) == 0)
367 {
368 version_str = ZYLIN_TIME;
369 }
370 else if (strcmp("pcb", str) == 0)
371 {
372 #ifdef CYGPKG_HAL_NIOS2
373 version_str="c";
374 #else
375 version_str="b";
376 #endif
377 }
378 #ifdef CYGPKG_HAL_NIOS2
379 else if (strcmp("fpga", str) == 0)
380 {
381
382 /* return a list of 32 bit integers to describe the expected
383 * and actual FPGA
384 */
385 static char *fpga_id = "0x12345678 0x12345678 0x12345678 0x12345678";
386 uint32_t id, timestamp;
387 HAL_READ_UINT32(SYSID_BASE, id);
388 HAL_READ_UINT32(SYSID_BASE+4, timestamp);
389 sprintf(fpga_id, "0x%08x 0x%08x 0x%08x 0x%08x", id, timestamp, SYSID_ID, SYSID_TIMESTAMP);
390 version_str = fpga_id;
391 if ((argc>2) && (strcmp("time", str2) == 0))
392 {
393 time_t last_mod = timestamp;
394 char * t = ctime (&last_mod) ;
395 t[strlen(t)-1] = 0;
396 version_str = t;
397 }
398 }
399 #endif
400
401 else
402 {
403 return JIM_ERR;
404 }
405 }
406
407 Jim_SetResult(interp, Jim_NewStringObj(interp, version_str, -1));
408
409 return JIM_OK;
410 }
411 #endif
412
413 #ifdef CYGPKG_HAL_NIOS2
414
415
416 struct info_forward
417 {
418 void *data;
419 struct cyg_upgrade_info *upgraded_file;
420 };
421
422 static void report_info(void *data, const char * format, va_list args)
423 {
424 char *s = alloc_vprintf(format, args);
425 LOG_USER_N("%s", s);
426 free(s);
427 }
428
429 struct cyg_upgrade_info firmware_info =
430 {
431 (uint8_t *)0x84000000,
432 "/ram/firmware.phi",
433 "Firmware",
434 0x0300000,
435 0x1f00000 -
436 0x0300000,
437 "ZylinNiosFirmware\n",
438 report_info,
439 };
440
441 static int jim_zy1000_writefirmware(Jim_Interp *interp, int argc, Jim_Obj *const *argv)
442 {
443 if (argc != 2)
444 return JIM_ERR;
445
446 int length;
447 const char *str = Jim_GetString(argv[1], &length);
448
449 /* */
450 int tmpFile;
451 if ((tmpFile = open(firmware_info.file, O_RDWR | O_CREAT | O_TRUNC)) <= 0)
452 {
453 return JIM_ERR;
454 }
455 bool success;
456 success = write(tmpFile, str, length) == length;
457 close(tmpFile);
458 if (!success)
459 return JIM_ERR;
460
461 if (!cyg_firmware_upgrade(NULL, firmware_info))
462 return JIM_ERR;
463
464 return JIM_OK;
465 }
466 #endif
467
468 static int
469 zylinjtag_Jim_Command_powerstatus(Jim_Interp *interp,
470 int argc,
471 Jim_Obj * const *argv)
472 {
473 if (argc != 1)
474 {
475 Jim_WrongNumArgs(interp, 1, argv, "powerstatus");
476 return JIM_ERR;
477 }
478
479 bool dropout = readPowerDropout();
480
481 Jim_SetResult(interp, Jim_NewIntObj(interp, dropout));
482
483 return JIM_OK;
484 }
485
486
487
488 int zy1000_quit(void)
489 {
490
491 return ERROR_OK;
492 }
493
494
495
496 int interface_jtag_execute_queue(void)
497 {
498 uint32_t empty;
499
500 waitIdle();
501
502 /* We must make sure to write data read back to memory location before we return
503 * from this fn
504 */
505 zy1000_flush_readqueue();
506
507 /* and handle any callbacks... */
508 zy1000_flush_callbackqueue();
509
510 if (zy1000_rclk)
511 {
512 /* Only check for errors when using RCLK to speed up
513 * jtag over TCP/IP
514 */
515 ZY1000_PEEK(ZY1000_JTAG_BASE + 0x10, empty);
516 /* clear JTAG error register */
517 ZY1000_POKE(ZY1000_JTAG_BASE + 0x14, 0x400);
518
519 if ((empty&0x400) != 0)
520 {
521 LOG_WARNING("RCLK timeout");
522 /* the error is informative only as we don't want to break the firmware if there
523 * is a false positive.
524 */
525 // return ERROR_FAIL;
526 }
527 }
528 return ERROR_OK;
529 }
530
531
532
533
534 static void writeShiftValue(uint8_t *data, int bits);
535
536 // here we shuffle N bits out/in
537 static __inline void scanBits(const uint8_t *out_value, uint8_t *in_value, int num_bits, bool pause_now, tap_state_t shiftState, tap_state_t end_state)
538 {
539 tap_state_t pause_state = shiftState;
540 for (int j = 0; j < num_bits; j += 32)
541 {
542 int k = num_bits - j;
543 if (k > 32)
544 {
545 k = 32;
546 /* we have more to shift out */
547 } else if (pause_now)
548 {
549 /* this was the last to shift out this time */
550 pause_state = end_state;
551 }
552
553 // we have (num_bits + 7)/8 bytes of bits to toggle out.
554 // bits are pushed out LSB to MSB
555 uint32_t value;
556 value = 0;
557 if (out_value != NULL)
558 {
559 for (int l = 0; l < k; l += 8)
560 {
561 value|=out_value[(j + l)/8]<<l;
562 }
563 }
564 /* mask away unused bits for easier debugging */
565 if (k < 32)
566 {
567 value&=~(((uint32_t)0xffffffff) << k);
568 } else
569 {
570 /* Shifting by >= 32 is not defined by the C standard
571 * and will in fact shift by &0x1f bits on nios */
572 }
573
574 shiftValueInner(shiftState, pause_state, k, value);
575
576 if (in_value != NULL)
577 {
578 writeShiftValue(in_value + (j/8), k);
579 }
580 }
581 }
582
583 static __inline void scanFields(int num_fields, const struct scan_field *fields, tap_state_t shiftState, tap_state_t end_state)
584 {
585 for (int i = 0; i < num_fields; i++)
586 {
587 scanBits(fields[i].out_value,
588 fields[i].in_value,
589 fields[i].num_bits,
590 (i == num_fields-1),
591 shiftState,
592 end_state);
593 }
594 }
595
596 int interface_jtag_add_ir_scan(struct jtag_tap *active, const struct scan_field *fields, tap_state_t state)
597 {
598 int scan_size = 0;
599 struct jtag_tap *tap, *nextTap;
600 tap_state_t pause_state = TAP_IRSHIFT;
601
602 for (tap = jtag_tap_next_enabled(NULL); tap!= NULL; tap = nextTap)
603 {
604 nextTap = jtag_tap_next_enabled(tap);
605 if (nextTap==NULL)
606 {
607 pause_state = state;
608 }
609 scan_size = tap->ir_length;
610
611 /* search the list */
612 if (tap == active)
613 {
614 scanFields(1, fields, TAP_IRSHIFT, pause_state);
615 /* update device information */
616 buf_cpy(fields[0].out_value, tap->cur_instr, scan_size);
617
618 tap->bypass = 0;
619 } else
620 {
621 /* if a device isn't listed, set it to BYPASS */
622 assert(scan_size <= 32);
623 shiftValueInner(TAP_IRSHIFT, pause_state, scan_size, 0xffffffff);
624
625 tap->bypass = 1;
626 }
627 }
628
629 return ERROR_OK;
630 }
631
632
633
634
635
636 int interface_jtag_add_plain_ir_scan(int num_bits, const uint8_t *out_bits, uint8_t *in_bits, tap_state_t state)
637 {
638 scanBits(out_bits, in_bits, num_bits, true, TAP_IRSHIFT, state);
639 return ERROR_OK;
640 }
641
642 int interface_jtag_add_dr_scan(struct jtag_tap *active, int num_fields, const struct scan_field *fields, tap_state_t state)
643 {
644 struct jtag_tap *tap, *nextTap;
645 tap_state_t pause_state = TAP_DRSHIFT;
646 for (tap = jtag_tap_next_enabled(NULL); tap!= NULL; tap = nextTap)
647 {
648 nextTap = jtag_tap_next_enabled(tap);
649 if (nextTap==NULL)
650 {
651 pause_state = state;
652 }
653
654 /* Find a range of fields to write to this tap */
655 if (tap == active)
656 {
657 assert(!tap->bypass);
658
659 scanFields(num_fields, fields, TAP_DRSHIFT, pause_state);
660 } else
661 {
662 /* Shift out a 0 for disabled tap's */
663 assert(tap->bypass);
664 shiftValueInner(TAP_DRSHIFT, pause_state, 1, 0);
665 }
666 }
667 return ERROR_OK;
668 }
669
670 int interface_jtag_add_plain_dr_scan(int num_bits, const uint8_t *out_bits, uint8_t *in_bits, tap_state_t state)
671 {
672 scanBits(out_bits, in_bits, num_bits, true, TAP_DRSHIFT, state);
673 return ERROR_OK;
674 }
675
676 int interface_jtag_add_tlr()
677 {
678 setCurrentState(TAP_RESET);
679 return ERROR_OK;
680 }
681
682
683 int interface_jtag_add_reset(int req_trst, int req_srst)
684 {
685 zy1000_reset(req_trst, req_srst);
686 return ERROR_OK;
687 }
688
689 static int zy1000_jtag_add_clocks(int num_cycles, tap_state_t state, tap_state_t clockstate)
690 {
691 /* num_cycles can be 0 */
692 setCurrentState(clockstate);
693
694 /* execute num_cycles, 32 at the time. */
695 int i;
696 for (i = 0; i < num_cycles; i += 32)
697 {
698 int num;
699 num = 32;
700 if (num_cycles-i < num)
701 {
702 num = num_cycles-i;
703 }
704 shiftValueInner(clockstate, clockstate, num, 0);
705 }
706
707 #if !TEST_MANUAL()
708 /* finish in end_state */
709 setCurrentState(state);
710 #else
711 tap_state_t t = TAP_IDLE;
712 /* test manual drive code on any target */
713 int tms;
714 uint8_t tms_scan = tap_get_tms_path(t, state);
715 int tms_count = tap_get_tms_path_len(tap_get_state(), tap_get_end_state());
716
717 for (i = 0; i < tms_count; i++)
718 {
719 tms = (tms_scan >> i) & 1;
720 waitIdle();
721 ZY1000_POKE(ZY1000_JTAG_BASE + 0x28, tms);
722 }
723 waitIdle();
724 ZY1000_POKE(ZY1000_JTAG_BASE + 0x20, state);
725 #endif
726
727 return ERROR_OK;
728 }
729
730 int interface_jtag_add_runtest(int num_cycles, tap_state_t state)
731 {
732 return zy1000_jtag_add_clocks(num_cycles, state, TAP_IDLE);
733 }
734
735 int interface_jtag_add_clocks(int num_cycles)
736 {
737 return zy1000_jtag_add_clocks(num_cycles, cmd_queue_cur_state, cmd_queue_cur_state);
738 }
739
740 int interface_add_tms_seq(unsigned num_bits, const uint8_t *seq, enum tap_state state)
741 {
742 /*wait for the fifo to be empty*/
743 waitIdle();
744
745 for (unsigned i = 0; i < num_bits; i++)
746 {
747 int tms;
748
749 if (((seq[i/8] >> (i % 8)) & 1) == 0)
750 {
751 tms = 0;
752 }
753 else
754 {
755 tms = 1;
756 }
757
758 waitIdle();
759 ZY1000_POKE(ZY1000_JTAG_BASE + 0x28, tms);
760 }
761
762 waitIdle();
763 if (state != TAP_INVALID)
764 {
765 ZY1000_POKE(ZY1000_JTAG_BASE + 0x20, state);
766 } else
767 {
768 /* this would be normal if we are switching to SWD mode */
769 }
770 return ERROR_OK;
771 }
772
773 int interface_jtag_add_pathmove(int num_states, const tap_state_t *path)
774 {
775 int state_count;
776 int tms = 0;
777
778 state_count = 0;
779
780 tap_state_t cur_state = cmd_queue_cur_state;
781
782 uint8_t seq[16];
783 memset(seq, 0, sizeof(seq));
784 assert(num_states < (int)((sizeof(seq) * 8)));
785
786 while (num_states)
787 {
788 if (tap_state_transition(cur_state, false) == path[state_count])
789 {
790 tms = 0;
791 }
792 else if (tap_state_transition(cur_state, true) == path[state_count])
793 {
794 tms = 1;
795 }
796 else
797 {
798 LOG_ERROR("BUG: %s -> %s isn't a valid TAP transition", tap_state_name(cur_state), tap_state_name(path[state_count]));
799 exit(-1);
800 }
801
802 seq[state_count/8] = seq[state_count/8] | (tms << (state_count % 8));
803
804 cur_state = path[state_count];
805 state_count++;
806 num_states--;
807 }
808
809 return interface_add_tms_seq(state_count, seq, cur_state);
810 }
811
812 static void jtag_pre_post_bits(struct jtag_tap *tap, int *pre, int *post)
813 {
814 /* bypass bits before and after */
815 int pre_bits = 0;
816 int post_bits = 0;
817
818 bool found = false;
819 struct jtag_tap *cur_tap, *nextTap;
820 for (cur_tap = jtag_tap_next_enabled(NULL); cur_tap!= NULL; cur_tap = nextTap)
821 {
822 nextTap = jtag_tap_next_enabled(cur_tap);
823 if (cur_tap == tap)
824 {
825 found = true;
826 } else
827 {
828 if (found)
829 {
830 post_bits++;
831 } else
832 {
833 pre_bits++;
834 }
835 }
836 }
837 *pre = pre_bits;
838 *post = post_bits;
839 }
840
841 /*
842 static const int embeddedice_num_bits[] = {32, 6};
843 uint32_t values[2];
844
845 values[0] = value;
846 values[1] = (1 << 5) | reg_addr;
847
848 jtag_add_dr_out(tap,
849 2,
850 embeddedice_num_bits,
851 values,
852 TAP_IDLE);
853 */
854
855 void embeddedice_write_dcc(struct jtag_tap *tap, int reg_addr, uint8_t *buffer, int little, int count)
856 {
857 #if 0
858 int i;
859 for (i = 0; i < count; i++)
860 {
861 embeddedice_write_reg_inner(tap, reg_addr, fast_target_buffer_get_u32(buffer, little));
862 buffer += 4;
863 }
864 #else
865 int pre_bits;
866 int post_bits;
867 jtag_pre_post_bits(tap, &pre_bits, &post_bits);
868
869 if ((pre_bits > 32) || (post_bits + 6 > 32))
870 {
871 int i;
872 for (i = 0; i < count; i++)
873 {
874 embeddedice_write_reg_inner(tap, reg_addr, fast_target_buffer_get_u32(buffer, little));
875 buffer += 4;
876 }
877 } else
878 {
879 int i;
880 for (i = 0; i < count; i++)
881 {
882 /* Fewer pokes means we get to use the FIFO more efficiently */
883 shiftValueInner(TAP_DRSHIFT, TAP_DRSHIFT, pre_bits, 0);
884 shiftValueInner(TAP_DRSHIFT, TAP_DRSHIFT, 32, fast_target_buffer_get_u32(buffer, little));
885 /* Danger! here we need to exit into the TAP_IDLE state to make
886 * DCC pick up this value.
887 */
888 shiftValueInner(TAP_DRSHIFT, TAP_IDLE, 6 + post_bits, (reg_addr | (1 << 5)));
889 buffer += 4;
890 }
891 }
892 #endif
893 }
894
895
896
897 int arm11_run_instr_data_to_core_noack_inner(struct jtag_tap * tap, uint32_t opcode, uint32_t * data, size_t count)
898 {
899 /* bypass bits before and after */
900 int pre_bits;
901 int post_bits;
902 jtag_pre_post_bits(tap, &pre_bits, &post_bits);
903 post_bits+=2;
904
905 if ((pre_bits > 32) || (post_bits > 32))
906 {
907 int arm11_run_instr_data_to_core_noack_inner_default(struct jtag_tap *, uint32_t, uint32_t *, size_t);
908 return arm11_run_instr_data_to_core_noack_inner_default(tap, opcode, data, count);
909 } else
910 {
911 static const int bits[] = {32, 2};
912 uint32_t values[] = {0, 0};
913
914 /* FIX!!!!!! the target_write_memory() API started this nasty problem
915 * with unaligned uint32_t * pointers... */
916 const uint8_t *t = (const uint8_t *)data;
917
918 while (--count > 0)
919 {
920 #if 1
921 /* Danger! This code doesn't update cmd_queue_cur_state, so
922 * invoking jtag_add_pathmove() before jtag_add_dr_out() after
923 * this loop would fail!
924 */
925 shiftValueInner(TAP_DRSHIFT, TAP_DRSHIFT, pre_bits, 0);
926
927 uint32_t value;
928 value = *t++;
929 value |= (*t++<<8);
930 value |= (*t++<<16);
931 value |= (*t++<<24);
932
933 shiftValueInner(TAP_DRSHIFT, TAP_DRSHIFT, 32, value);
934 /* minimum 2 bits */
935 shiftValueInner(TAP_DRSHIFT, TAP_DRPAUSE, post_bits, 0);
936
937 /* copy & paste from arm11_dbgtap.c */
938 //TAP_DREXIT2, TAP_DRUPDATE, TAP_IDLE, TAP_IDLE, TAP_IDLE, TAP_DRSELECT, TAP_DRCAPTURE, TAP_DRSHIFT
939 /* KLUDGE! we have to flush the fifo or the Nios CPU locks up.
940 * This is probably a bug in the Avalon bus(cross clocking bridge?)
941 * or in the jtag registers module.
942 */
943 waitIdle();
944 ZY1000_POKE(ZY1000_JTAG_BASE + 0x28, 1);
945 ZY1000_POKE(ZY1000_JTAG_BASE + 0x28, 1);
946 ZY1000_POKE(ZY1000_JTAG_BASE + 0x28, 0);
947 ZY1000_POKE(ZY1000_JTAG_BASE + 0x28, 0);
948 ZY1000_POKE(ZY1000_JTAG_BASE + 0x28, 0);
949 ZY1000_POKE(ZY1000_JTAG_BASE + 0x28, 1);
950 ZY1000_POKE(ZY1000_JTAG_BASE + 0x28, 0);
951 ZY1000_POKE(ZY1000_JTAG_BASE + 0x28, 0);
952 /* we don't have to wait for the queue to empty here */
953 ZY1000_POKE(ZY1000_JTAG_BASE + 0x20, TAP_DRSHIFT);
954 waitIdle();
955 #else
956 static const tap_state_t arm11_MOVE_DRPAUSE_IDLE_DRPAUSE_with_delay[] =
957 {
958 TAP_DREXIT2, TAP_DRUPDATE, TAP_IDLE, TAP_IDLE, TAP_IDLE, TAP_DRSELECT, TAP_DRCAPTURE, TAP_DRSHIFT
959 };
960
961 values[0] = *t++;
962 values[0] |= (*t++<<8);
963 values[0] |= (*t++<<16);
964 values[0] |= (*t++<<24);
965
966 jtag_add_dr_out(tap,
967 2,
968 bits,
969 values,
970 TAP_IDLE);
971
972 jtag_add_pathmove(ARRAY_SIZE(arm11_MOVE_DRPAUSE_IDLE_DRPAUSE_with_delay),
973 arm11_MOVE_DRPAUSE_IDLE_DRPAUSE_with_delay);
974 #endif
975 }
976
977 values[0] = *t++;
978 values[0] |= (*t++<<8);
979 values[0] |= (*t++<<16);
980 values[0] |= (*t++<<24);
981
982 /* This will happen on the last iteration updating cmd_queue_cur_state
983 * so we don't have to track it during the common code path
984 */
985 jtag_add_dr_out(tap,
986 2,
987 bits,
988 values,
989 TAP_IDLE);
990
991 return jtag_execute_queue();
992 }
993 }
994
995
996 static const struct command_registration zy1000_commands[] = {
997 {
998 .name = "power",
999 .handler = handle_power_command,
1000 .mode = COMMAND_ANY,
1001 .help = "Turn power switch to target on/off. "
1002 "With no arguments, prints status.",
1003 .usage = "('on'|'off)",
1004 },
1005 #if BUILD_ECOSBOARD
1006 {
1007 .name = "zy1000_version",
1008 .mode = COMMAND_ANY,
1009 .jim_handler = jim_zy1000_version,
1010 .help = "Print version info for zy1000.",
1011 .usage = "['openocd'|'zy1000'|'date'|'time'|'pcb'|'fpga']",
1012 },
1013 #else
1014 {
1015 .name = "zy1000_server",
1016 .mode = COMMAND_ANY,
1017 .jim_handler = jim_zy1000_server,
1018 .help = "Tcpip address for ZY1000 server.",
1019 .usage = "address",
1020 },
1021 #endif
1022 {
1023 .name = "powerstatus",
1024 .mode = COMMAND_ANY,
1025 .jim_handler = zylinjtag_Jim_Command_powerstatus,
1026 .help = "Returns power status of target",
1027 },
1028 #ifdef CYGPKG_HAL_NIOS2
1029 {
1030 .name = "updatezy1000firmware",
1031 .mode = COMMAND_ANY,
1032 .jim_handler = jim_zy1000_writefirmware,
1033 .help = "writes firmware to flash",
1034 /* .usage = "some_string", */
1035 },
1036 #endif
1037 COMMAND_REGISTRATION_DONE
1038 };
1039
1040
1041 static int tcp_ip = -1;
1042
1043 /* Write large packets if we can */
1044 static size_t out_pos;
1045 static uint8_t out_buffer[16384];
1046 static size_t in_pos;
1047 static size_t in_write;
1048 static uint8_t in_buffer[16384];
1049
1050 static bool flush_writes(void)
1051 {
1052 bool ok = (write(tcp_ip, out_buffer, out_pos) == (int)out_pos);
1053 out_pos = 0;
1054 return ok;
1055 }
1056
1057 static bool writeLong(uint32_t l)
1058 {
1059 int i;
1060 for (i = 0; i < 4; i++)
1061 {
1062 uint8_t c = (l >> (i*8))&0xff;
1063 out_buffer[out_pos++] = c;
1064 if (out_pos >= sizeof(out_buffer))
1065 {
1066 if (!flush_writes())
1067 {
1068 return false;
1069 }
1070 }
1071 }
1072 return true;
1073 }
1074
1075 static bool readLong(uint32_t *out_data)
1076 {
1077 if (out_pos > 0)
1078 {
1079 if (!flush_writes())
1080 {
1081 return false;
1082 }
1083 }
1084
1085 uint32_t data = 0;
1086 int i;
1087 for (i = 0; i < 4; i++)
1088 {
1089 uint8_t c;
1090 if (in_pos == in_write)
1091 {
1092 /* read more */
1093 int t;
1094 t = read(tcp_ip, in_buffer, sizeof(in_buffer));
1095 if (t < 1)
1096 {
1097 return false;
1098 }
1099 in_write = (size_t) t;
1100 in_pos = 0;
1101 }
1102 c = in_buffer[in_pos++];
1103
1104 data |= (c << (i*8));
1105 }
1106 *out_data = data;
1107 return true;
1108 }
1109
1110 enum ZY1000_CMD
1111 {
1112 ZY1000_CMD_POKE = 0x0,
1113 ZY1000_CMD_PEEK = 0x8,
1114 ZY1000_CMD_SLEEP = 0x1,
1115 ZY1000_CMD_WAITIDLE = 2
1116 };
1117
1118
1119 #if !BUILD_ECOSBOARD
1120
1121 #include <sys/socket.h> /* for socket(), connect(), send(), and recv() */
1122 #include <arpa/inet.h> /* for sockaddr_in and inet_addr() */
1123
1124 /* We initialize this late since we need to know the server address
1125 * first.
1126 */
1127 static void tcpip_open(void)
1128 {
1129 if (tcp_ip >= 0)
1130 return;
1131
1132 struct sockaddr_in echoServAddr; /* Echo server address */
1133
1134 /* Create a reliable, stream socket using TCP */
1135 if ((tcp_ip = socket(PF_INET, SOCK_STREAM, IPPROTO_TCP)) < 0)
1136 {
1137 fprintf(stderr, "Failed to connect to zy1000 server\n");
1138 exit(-1);
1139 }
1140
1141 /* Construct the server address structure */
1142 memset(&echoServAddr, 0, sizeof(echoServAddr)); /* Zero out structure */
1143 echoServAddr.sin_family = AF_INET; /* Internet address family */
1144 echoServAddr.sin_addr.s_addr = inet_addr(tcp_server); /* Server IP address */
1145 echoServAddr.sin_port = htons(7777); /* Server port */
1146
1147 /* Establish the connection to the echo server */
1148 if (connect(tcp_ip, (struct sockaddr *) &echoServAddr, sizeof(echoServAddr)) < 0)
1149 {
1150 fprintf(stderr, "Failed to connect to zy1000 server\n");
1151 exit(-1);
1152 }
1153
1154 int flag = 1;
1155 setsockopt(tcp_ip, /* socket affected */
1156 IPPROTO_TCP, /* set option at TCP level */
1157 TCP_NODELAY, /* name of option */
1158 (char *)&flag, /* the cast is historical cruft */
1159 sizeof(int)); /* length of option value */
1160
1161 }
1162
1163
1164 /* send a poke */
1165 void zy1000_tcpout(uint32_t address, uint32_t data)
1166 {
1167 tcpip_open();
1168 if (!writeLong((ZY1000_CMD_POKE << 24) | address)||
1169 !writeLong(data))
1170 {
1171 fprintf(stderr, "Could not write to zy1000 server\n");
1172 exit(-1);
1173 }
1174 }
1175
1176 /* By sending the wait to the server, we avoid a readback
1177 * of status. Radically improves performance for this operation
1178 * with long ping times.
1179 */
1180 void waitIdle(void)
1181 {
1182 tcpip_open();
1183 if (!writeLong((ZY1000_CMD_WAITIDLE << 24)))
1184 {
1185 fprintf(stderr, "Could not write to zy1000 server\n");
1186 exit(-1);
1187 }
1188 }
1189
1190 uint32_t zy1000_tcpin(uint32_t address)
1191 {
1192 tcpip_open();
1193
1194 zy1000_flush_readqueue();
1195
1196 uint32_t data;
1197 if (!writeLong((ZY1000_CMD_PEEK << 24) | address)||
1198 !readLong(&data))
1199 {
1200 fprintf(stderr, "Could not read from zy1000 server\n");
1201 exit(-1);
1202 }
1203 return data;
1204 }
1205
1206 int interface_jtag_add_sleep(uint32_t us)
1207 {
1208 tcpip_open();
1209 if (!writeLong((ZY1000_CMD_SLEEP << 24))||
1210 !writeLong(us))
1211 {
1212 fprintf(stderr, "Could not read from zy1000 server\n");
1213 exit(-1);
1214 }
1215 return ERROR_OK;
1216 }
1217
1218 /* queue a readback */
1219 #define readqueue_size 16384
1220 static struct
1221 {
1222 uint8_t *dest;
1223 int bits;
1224 } readqueue[readqueue_size];
1225
1226 static int readqueue_pos = 0;
1227
1228 /* flush the readqueue, this means reading any data that
1229 * we're expecting and store them into the final position
1230 */
1231 void zy1000_flush_readqueue(void)
1232 {
1233 if (readqueue_pos == 0)
1234 {
1235 /* simply debugging by allowing easy breakpoints when there
1236 * is something to do. */
1237 return;
1238 }
1239 int i;
1240 tcpip_open();
1241 for (i = 0; i < readqueue_pos; i++)
1242 {
1243 uint32_t value;
1244 if (!readLong(&value))
1245 {
1246 fprintf(stderr, "Could not read from zy1000 server\n");
1247 exit(-1);
1248 }
1249
1250 uint8_t *in_value = readqueue[i].dest;
1251 int k = readqueue[i].bits;
1252
1253 // we're shifting in data to MSB, shift data to be aligned for returning the value
1254 value >>= 32-k;
1255
1256 for (int l = 0; l < k; l += 8)
1257 {
1258 in_value[l/8]=(value >> l)&0xff;
1259 }
1260 }
1261 readqueue_pos = 0;
1262 }
1263
1264 /* By queuing the callback's we avoid flushing the
1265 read queue until jtag_execute_queue(). This can
1266 reduce latency dramatically for cases where
1267 callbacks are used extensively.
1268 */
1269 #define callbackqueue_size 128
1270 static struct callbackentry
1271 {
1272 jtag_callback_t callback;
1273 jtag_callback_data_t data0;
1274 jtag_callback_data_t data1;
1275 jtag_callback_data_t data2;
1276 jtag_callback_data_t data3;
1277 } callbackqueue[callbackqueue_size];
1278
1279 static int callbackqueue_pos = 0;
1280
1281 void zy1000_jtag_add_callback4(jtag_callback_t callback, jtag_callback_data_t data0, jtag_callback_data_t data1, jtag_callback_data_t data2, jtag_callback_data_t data3)
1282 {
1283 if (callbackqueue_pos >= callbackqueue_size)
1284 {
1285 zy1000_flush_callbackqueue();
1286 }
1287
1288 callbackqueue[callbackqueue_pos].callback = callback;
1289 callbackqueue[callbackqueue_pos].data0 = data0;
1290 callbackqueue[callbackqueue_pos].data1 = data1;
1291 callbackqueue[callbackqueue_pos].data2 = data2;
1292 callbackqueue[callbackqueue_pos].data3 = data3;
1293 callbackqueue_pos++;
1294 }
1295
1296 static int zy1000_jtag_convert_to_callback4(jtag_callback_data_t data0, jtag_callback_data_t data1, jtag_callback_data_t data2, jtag_callback_data_t data3)
1297 {
1298 ((jtag_callback1_t)data1)(data0);
1299 return ERROR_OK;
1300 }
1301
1302 void zy1000_jtag_add_callback(jtag_callback1_t callback, jtag_callback_data_t data0)
1303 {
1304 zy1000_jtag_add_callback4(zy1000_jtag_convert_to_callback4, data0, (jtag_callback_data_t)callback, 0, 0);
1305 }
1306
1307 void zy1000_flush_callbackqueue(void)
1308 {
1309 /* we have to flush the read queue so we have access to
1310 the data the callbacks will use
1311 */
1312 zy1000_flush_readqueue();
1313 int i;
1314 for (i = 0; i < callbackqueue_pos; i++)
1315 {
1316 struct callbackentry *entry = &callbackqueue[i];
1317 jtag_set_error(entry->callback(entry->data0, entry->data1, entry->data2, entry->data3));
1318 }
1319 callbackqueue_pos = 0;
1320 }
1321
1322 static void writeShiftValue(uint8_t *data, int bits)
1323 {
1324 waitIdle();
1325
1326 if (!writeLong((ZY1000_CMD_PEEK << 24) | (ZY1000_JTAG_BASE + 0xc)))
1327 {
1328 fprintf(stderr, "Could not read from zy1000 server\n");
1329 exit(-1);
1330 }
1331
1332 if (readqueue_pos >= readqueue_size)
1333 {
1334 zy1000_flush_readqueue();
1335 }
1336
1337 readqueue[readqueue_pos].dest = data;
1338 readqueue[readqueue_pos].bits = bits;
1339 readqueue_pos++;
1340 }
1341
1342 #else
1343
1344 static void writeShiftValue(uint8_t *data, int bits)
1345 {
1346 uint32_t value;
1347 waitIdle();
1348 ZY1000_PEEK(ZY1000_JTAG_BASE + 0xc, value);
1349 VERBOSE(LOG_INFO("getShiftValue %08x", value));
1350
1351 // data in, LSB to MSB
1352 // we're shifting in data to MSB, shift data to be aligned for returning the value
1353 value >>= 32 - bits;
1354
1355 for (int l = 0; l < bits; l += 8)
1356 {
1357 data[l/8]=(value >> l)&0xff;
1358 }
1359 }
1360
1361 #endif
1362
1363 #if BUILD_ECOSBOARD
1364 static char tcpip_stack[2048];
1365 static cyg_thread tcpip_thread_object;
1366 static cyg_handle_t tcpip_thread_handle;
1367
1368 static char watchdog_stack[2048];
1369 static cyg_thread watchdog_thread_object;
1370 static cyg_handle_t watchdog_thread_handle;
1371
1372 /* Infinite loop peeking & poking */
1373 static void tcpipserver(void)
1374 {
1375 for (;;)
1376 {
1377 uint32_t address;
1378 if (!readLong(&address))
1379 return;
1380 enum ZY1000_CMD c = (address >> 24) & 0xff;
1381 address &= 0xffffff;
1382 switch (c)
1383 {
1384 case ZY1000_CMD_POKE:
1385 {
1386 uint32_t data;
1387 if (!readLong(&data))
1388 return;
1389 address &= ~0x80000000;
1390 ZY1000_POKE(address + ZY1000_JTAG_BASE, data);
1391 break;
1392 }
1393 case ZY1000_CMD_PEEK:
1394 {
1395 uint32_t data;
1396 ZY1000_PEEK(address + ZY1000_JTAG_BASE, data);
1397 if (!writeLong(data))
1398 return;
1399 break;
1400 }
1401 case ZY1000_CMD_SLEEP:
1402 {
1403 uint32_t data;
1404 if (!readLong(&data))
1405 return;
1406 jtag_sleep(data);
1407 break;
1408 }
1409 case ZY1000_CMD_WAITIDLE:
1410 {
1411 waitIdle();
1412 break;
1413 }
1414 default:
1415 return;
1416 }
1417 }
1418 }
1419
1420
1421 static void tcpip_server(cyg_addrword_t data)
1422 {
1423 int so_reuseaddr_option = 1;
1424
1425 int fd;
1426 if ((fd = socket(AF_INET, SOCK_STREAM, 0)) == -1)
1427 {
1428 LOG_ERROR("error creating socket: %s", strerror(errno));
1429 exit(-1);
1430 }
1431
1432 setsockopt(fd, SOL_SOCKET, SO_REUSEADDR, (void*) &so_reuseaddr_option,
1433 sizeof(int));
1434
1435 struct sockaddr_in sin;
1436 unsigned int address_size;
1437 address_size = sizeof(sin);
1438 memset(&sin, 0, sizeof(sin));
1439 sin.sin_family = AF_INET;
1440 sin.sin_addr.s_addr = INADDR_ANY;
1441 sin.sin_port = htons(7777);
1442
1443 if (bind(fd, (struct sockaddr *) &sin, sizeof(sin)) == -1)
1444 {
1445 LOG_ERROR("couldn't bind to socket: %s", strerror(errno));
1446 exit(-1);
1447 }
1448
1449 if (listen(fd, 1) == -1)
1450 {
1451 LOG_ERROR("couldn't listen on socket: %s", strerror(errno));
1452 exit(-1);
1453 }
1454
1455
1456 for (;;)
1457 {
1458 tcp_ip = accept(fd, (struct sockaddr *) &sin, &address_size);
1459 if (tcp_ip < 0)
1460 {
1461 continue;
1462 }
1463
1464 int flag = 1;
1465 setsockopt(tcp_ip, /* socket affected */
1466 IPPROTO_TCP, /* set option at TCP level */
1467 TCP_NODELAY, /* name of option */
1468 (char *)&flag, /* the cast is historical cruft */
1469 sizeof(int)); /* length of option value */
1470
1471 bool save_poll = jtag_poll_get_enabled();
1472
1473 /* polling will screw up the "connection" */
1474 jtag_poll_set_enabled(false);
1475
1476 tcpipserver();
1477
1478 jtag_poll_set_enabled(save_poll);
1479
1480 close(tcp_ip);
1481
1482 }
1483 close(fd);
1484
1485 }
1486
1487 #ifdef WATCHDOG_BASE
1488 /* If we connect to port 8888 we must send a char every 10s or the board resets itself */
1489 static void watchdog_server(cyg_addrword_t data)
1490 {
1491 int so_reuseaddr_option = 1;
1492
1493 int fd;
1494 if ((fd = socket(AF_INET, SOCK_STREAM, 0)) == -1)
1495 {
1496 LOG_ERROR("error creating socket: %s", strerror(errno));
1497 exit(-1);
1498 }
1499
1500 setsockopt(fd, SOL_SOCKET, SO_REUSEADDR, (void*) &so_reuseaddr_option,
1501 sizeof(int));
1502
1503 struct sockaddr_in sin;
1504 unsigned int address_size;
1505 address_size = sizeof(sin);
1506 memset(&sin, 0, sizeof(sin));
1507 sin.sin_family = AF_INET;
1508 sin.sin_addr.s_addr = INADDR_ANY;
1509 sin.sin_port = htons(8888);
1510
1511 if (bind(fd, (struct sockaddr *) &sin, sizeof(sin)) == -1)
1512 {
1513 LOG_ERROR("couldn't bind to socket: %s", strerror(errno));
1514 exit(-1);
1515 }
1516
1517 if (listen(fd, 1) == -1)
1518 {
1519 LOG_ERROR("couldn't listen on socket: %s", strerror(errno));
1520 exit(-1);
1521 }
1522
1523
1524 for (;;)
1525 {
1526 int watchdog_ip = accept(fd, (struct sockaddr *) &sin, &address_size);
1527
1528 /* Start watchdog, must be reset every 10 seconds. */
1529 HAL_WRITE_UINT32(WATCHDOG_BASE + 4, 4);
1530
1531 if (watchdog_ip < 0)
1532 {
1533 LOG_ERROR("couldn't open watchdog socket: %s", strerror(errno));
1534 exit(-1);
1535 }
1536
1537 int flag = 1;
1538 setsockopt(watchdog_ip, /* socket affected */
1539 IPPROTO_TCP, /* set option at TCP level */
1540 TCP_NODELAY, /* name of option */
1541 (char *)&flag, /* the cast is historical cruft */
1542 sizeof(int)); /* length of option value */
1543
1544
1545 char buf;
1546 for (;;)
1547 {
1548 if (read(watchdog_ip, &buf, 1) == 1)
1549 {
1550 /* Reset timer */
1551 HAL_WRITE_UINT32(WATCHDOG_BASE + 8, 0x1234);
1552 /* Echo so we can telnet in and see that resetting works */
1553 write(watchdog_ip, &buf, 1);
1554 } else
1555 {
1556 /* Stop tickling the watchdog, the CPU will reset in < 10 seconds
1557 * now.
1558 */
1559 return;
1560 }
1561
1562 }
1563
1564 /* Never reached */
1565 }
1566 }
1567 #endif
1568
1569 int interface_jtag_add_sleep(uint32_t us)
1570 {
1571 jtag_sleep(us);
1572 return ERROR_OK;
1573 }
1574
1575 #endif
1576
1577
1578 int zy1000_init(void)
1579 {
1580 #if BUILD_ECOSBOARD
1581 LOG_USER("%s", ZYLIN_OPENOCD_VERSION);
1582 #endif
1583
1584 ZY1000_POKE(ZY1000_JTAG_BASE + 0x10, 0x30); // Turn on LED1 & LED2
1585
1586 setPower(true); // on by default
1587
1588
1589 /* deassert resets. Important to avoid infinite loop waiting for SRST to deassert */
1590 zy1000_reset(0, 0);
1591 zy1000_speed(jtag_get_speed());
1592
1593
1594 #if BUILD_ECOSBOARD
1595 cyg_thread_create(1, tcpip_server, (cyg_addrword_t) 0, "tcip/ip server",
1596 (void *) tcpip_stack, sizeof(tcpip_stack),
1597 &tcpip_thread_handle, &tcpip_thread_object);
1598 cyg_thread_resume(tcpip_thread_handle);
1599 #ifdef WATCHDOG_BASE
1600 cyg_thread_create(1, watchdog_server, (cyg_addrword_t) 0, "watchdog tcip/ip server",
1601 (void *) watchdog_stack, sizeof(watchdog_stack),
1602 &watchdog_thread_handle, &watchdog_thread_object);
1603 cyg_thread_resume(watchdog_thread_handle);
1604 #endif
1605 #endif
1606
1607 return ERROR_OK;
1608 }
1609
1610
1611
1612 struct jtag_interface zy1000_interface =
1613 {
1614 .name = "ZY1000",
1615 .supported = DEBUG_CAP_TMS_SEQ,
1616 .execute_queue = NULL,
1617 .speed = zy1000_speed,
1618 .commands = zy1000_commands,
1619 .init = zy1000_init,
1620 .quit = zy1000_quit,
1621 .khz = zy1000_khz,
1622 .speed_div = zy1000_speed_div,
1623 .power_dropout = zy1000_power_dropout,
1624 .srst_asserted = zy1000_srst_asserted,
1625 };

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