1 /***************************************************************************
2 * Copyright (C) 2006 by Magnus Lundin *
5 * This program is free software; you can redistribute it and/or modify *
6 * it under the terms of the GNU General Public License as published by *
7 * the Free Software Foundation; either version 2 of the License, or *
8 * (at your option) any later version. *
10 * This program is distributed in the hope that it will be useful, *
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of *
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
13 * GNU General Public License for more details. *
15 * You should have received a copy of the GNU General Public License *
16 * along with this program; if not, write to the *
17 * Free Software Foundation, Inc., *
18 * 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. *
19 ***************************************************************************/
21 /***************************************************************************
22 * STELLARIS is tested on LM3S811
26 ***************************************************************************/
31 #include "replacements.h"
33 #include "stellaris.h"
34 #include "cortex_m3.h"
39 #include "binarybuffer.h"
46 #define DID0_VER(did0) ((did0>>28)&0x07)
47 int stellaris_register_commands(struct command_context_s
*cmd_ctx
);
48 int stellaris_flash_bank_command(struct command_context_s
*cmd_ctx
, char *cmd
, char **args
, int argc
, struct flash_bank_s
*bank
);
49 int stellaris_erase(struct flash_bank_s
*bank
, int first
, int last
);
50 int stellaris_protect(struct flash_bank_s
*bank
, int set
, int first
, int last
);
51 int stellaris_write(struct flash_bank_s
*bank
, u8
*buffer
, u32 offset
, u32 count
);
52 int stellaris_probe(struct flash_bank_s
*bank
);
53 int stellaris_erase_check(struct flash_bank_s
*bank
);
54 int stellaris_protect_check(struct flash_bank_s
*bank
);
55 int stellaris_info(struct flash_bank_s
*bank
, char *buf
, int buf_size
);
57 int stellaris_read_part_info(struct flash_bank_s
*bank
);
58 u32
stellaris_get_flash_status(flash_bank_t
*bank
);
59 void stellaris_set_flash_mode(flash_bank_t
*bank
,int mode
);
60 u32
stellaris_wait_status_busy(flash_bank_t
*bank
, u32 waitbits
, int timeout
);
62 int stellaris_read_part_info(struct flash_bank_s
*bank
);
64 flash_driver_t stellaris_flash
=
67 .register_commands
= stellaris_register_commands
,
68 .flash_bank_command
= stellaris_flash_bank_command
,
69 .erase
= stellaris_erase
,
70 .protect
= stellaris_protect
,
71 .write
= stellaris_write
,
72 .probe
= stellaris_probe
,
73 .erase_check
= stellaris_erase_check
,
74 .protect_check
= stellaris_protect_check
,
75 .info
= stellaris_info
205 char * StellarisClassname
[2] =
211 /***************************************************************************
212 * openocd command interface *
213 ***************************************************************************/
215 /* flash_bank stellaris <base> <size> 0 0 <target#>
217 int stellaris_flash_bank_command(struct command_context_s
*cmd_ctx
, char *cmd
, char **args
, int argc
, struct flash_bank_s
*bank
)
219 stellaris_flash_bank_t
*stellaris_info
;
223 WARNING("incomplete flash_bank stellaris configuration");
224 return ERROR_FLASH_BANK_INVALID
;
227 stellaris_info
= calloc(sizeof(stellaris_flash_bank_t
),1);
229 bank
->driver_priv
= stellaris_info
;
231 stellaris_info
->target_name
= "Unknown target";
233 /* part wasn't probed for info yet */
234 stellaris_info
->did1
= 0;
236 /* TODO Use an optional main oscillator clock rate in kHz from arg[6] */
240 int stellaris_register_commands(struct command_context_s
*cmd_ctx
)
243 command_t *stellaris_cmd = register_command(cmd_ctx, NULL, "stellaris", NULL, COMMAND_ANY, NULL);
244 register_command(cmd_ctx, stellaris_cmd, "gpnvm", stellaris_handle_gpnvm_command, COMMAND_EXEC,
245 "stellaris gpnvm <num> <bit> set|clear, set or clear stellaris gpnvm bit");
250 int stellaris_info(struct flash_bank_s
*bank
, char *buf
, int buf_size
)
252 int printed
, device_class
;
253 stellaris_flash_bank_t
*stellaris_info
= bank
->driver_priv
;
255 stellaris_read_part_info(bank
);
257 if (stellaris_info
->did1
== 0)
259 printed
= snprintf(buf
, buf_size
, "Cannot identify target as a Stellaris\n");
262 return ERROR_FLASH_OPERATION_FAILED
;
265 if (DID0_VER(stellaris_info
->did0
)>0)
267 device_class
= (stellaris_info
->did0
>>16)&0xFF;
273 printed
= snprintf(buf
, buf_size
, "\nLMI Stellaris information: Chip is class %i(%s) %s v%c.%i\n",
274 device_class
, StellarisClassname
[device_class
], stellaris_info
->target_name
,
275 'A' + (stellaris_info
->did0
>>8)&0xFF, (stellaris_info
->did0
)&0xFF);
279 printed
= snprintf(buf
, buf_size
, "did1: 0x%8.8x, arch: 0x%4.4x, eproc: %s, ramsize:%ik, flashsize: %ik\n",
280 stellaris_info
->did1
, stellaris_info
->did1
, "ARMV7M", (1+(stellaris_info
->dc0
>>16)&0xFFFF)/4, (1+stellaris_info
->dc0
&0xFFFF)*2);
284 printed
= snprintf(buf
, buf_size
, "master clock(estimated): %ikHz, rcc is 0x%x \n", stellaris_info
->mck_freq
/ 1000, stellaris_info
->rcc
);
288 if (stellaris_info
->num_lockbits
>0) {
289 printed
= snprintf(buf
, buf_size
, "pagesize: %i, lockbits: %i 0x%4.4x, pages in lock region: %i \n", stellaris_info
->pagesize
, stellaris_info
->num_lockbits
, stellaris_info
->lockbits
,stellaris_info
->num_pages
/stellaris_info
->num_lockbits
);
296 /***************************************************************************
297 * chip identification and status *
298 ***************************************************************************/
300 u32
stellaris_get_flash_status(flash_bank_t
*bank
)
302 target_t
*target
= bank
->target
;
305 target_read_u32(target
, FLASH_CONTROL_BASE
|FLASH_FMC
, &fmc
);
310 /** Read clock configuration and set stellaris_info->usec_clocks*/
312 void stellaris_read_clock_info(flash_bank_t
*bank
)
314 stellaris_flash_bank_t
*stellaris_info
= bank
->driver_priv
;
315 target_t
*target
= bank
->target
;
316 u32 rcc
, pllcfg
, sysdiv
, usesysdiv
, bypass
, oscsrc
;
317 unsigned long mainfreq
;
319 target_read_u32(target
, SCB_BASE
|RCC
, &rcc
);
320 DEBUG("Stellaris RCC %x",rcc
);
321 target_read_u32(target
, SCB_BASE
|PLLCFG
, &pllcfg
);
322 DEBUG("Stellaris PLLCFG %x",pllcfg
);
323 stellaris_info
->rcc
= rcc
;
325 sysdiv
= (rcc
>>23)&0xF;
326 usesysdiv
= (rcc
>>22)&0x1;
327 bypass
= (rcc
>>11)&0x1;
328 oscsrc
= (rcc
>>4)&0x3;
329 /* xtal = (rcc>>6)&0xF; */
333 mainfreq
= 6000000; /* Default xtal */
336 mainfreq
= 22500000; /* Internal osc. 15 MHz +- 50% */
339 mainfreq
= 5625000; /* Internal osc. / 4 */
342 WARNING("Invalid oscsrc (3) in rcc register");
348 mainfreq
= 200000000; /* PLL out frec */
351 stellaris_info
->mck_freq
= mainfreq
/(1+sysdiv
);
353 stellaris_info
->mck_freq
= mainfreq
;
355 /* Forget old flash timing */
356 stellaris_set_flash_mode(bank
,0);
359 /* Setup the timimg registers */
360 void stellaris_set_flash_mode(flash_bank_t
*bank
,int mode
)
362 stellaris_flash_bank_t
*stellaris_info
= bank
->driver_priv
;
363 target_t
*target
= bank
->target
;
365 u32 usecrl
= (stellaris_info
->mck_freq
/1000000ul-1);
366 DEBUG("usecrl = %i",usecrl
);
367 target_write_u32(target
, SCB_BASE
|USECRL
, usecrl
);
371 u32
stellaris_wait_status_busy(flash_bank_t
*bank
, u32 waitbits
, int timeout
)
375 /* Stellaris waits for cmdbit to clear */
376 while (((status
= stellaris_get_flash_status(bank
)) & waitbits
) && (timeout
-- > 0))
378 DEBUG("status: 0x%x", status
);
382 /* Flash errors are reflected in the FLASH_CRIS register */
388 /* Send one command to the flash controller */
389 int stellaris_flash_command(struct flash_bank_s
*bank
,u8 cmd
,u16 pagen
)
392 // stellaris_flash_bank_t *stellaris_info = bank->driver_priv;
393 target_t
*target
= bank
->target
;
395 fmc
= FMC_WRKEY
| cmd
;
396 target_write_u32(target
, FLASH_CONTROL_BASE
|FLASH_FMC
, fmc
);
397 DEBUG("Flash command: 0x%x", fmc
);
399 if (stellaris_wait_status_busy(bank
, cmd
, 100))
401 return ERROR_FLASH_OPERATION_FAILED
;
407 /* Read device id register, main clock frequency register and fill in driver info structure */
408 int stellaris_read_part_info(struct flash_bank_s
*bank
)
410 stellaris_flash_bank_t
*stellaris_info
= bank
->driver_priv
;
411 target_t
*target
= bank
->target
;
412 u32 did0
,did1
, ver
, fam
, status
;
415 /* Read and parse chip identification register */
416 target_read_u32(target
, SCB_BASE
|DID0
, &did0
);
417 target_read_u32(target
, SCB_BASE
|DID1
, &did1
);
418 target_read_u32(target
, SCB_BASE
|DC0
, &stellaris_info
->dc0
);
419 target_read_u32(target
, SCB_BASE
|DC1
, &stellaris_info
->dc1
);
420 DEBUG("did0 0x%x, did1 0x%x, dc0 0x%x, dc1 0x%x",did0
, did1
, stellaris_info
->dc0
,stellaris_info
->dc1
);
423 if((ver
!= 0) && (ver
!= 1))
425 WARNING("Unknown did0 version, cannot identify target");
426 return ERROR_FLASH_OPERATION_FAILED
;
430 fam
= (did1
>> 24) & 0xF;
431 if(((ver
!= 0) && (ver
!= 1)) || (fam
!= 0))
433 WARNING("Unknown did1 version/family, cannot positively identify target as a Stellaris");
438 WARNING("Cannot identify target as a Stellaris");
439 return ERROR_FLASH_OPERATION_FAILED
;
442 for (i
=0;StellarisParts
[i
].partno
;i
++)
444 if (StellarisParts
[i
].partno
==((did1
>>16)&0xFF))
448 stellaris_info
->target_name
= StellarisParts
[i
].partname
;
450 stellaris_info
->did0
= did0
;
451 stellaris_info
->did1
= did1
;
453 stellaris_info
->num_lockbits
= 1+stellaris_info
->dc0
&0xFFFF;
454 stellaris_info
->num_pages
= 2*(1+stellaris_info
->dc0
&0xFFFF);
455 stellaris_info
->pagesize
= 1024;
456 bank
->size
= 1024*stellaris_info
->num_pages
;
457 stellaris_info
->pages_in_lockregion
= 2;
458 target_read_u32(target
, SCB_BASE
|FMPPE
, &stellaris_info
->lockbits
);
460 // Read main and master clock freqency register
461 stellaris_read_clock_info(bank
);
463 status
= stellaris_get_flash_status(bank
);
468 /***************************************************************************
470 ***************************************************************************/
472 int stellaris_erase_check(struct flash_bank_s
*bank
)
476 stellaris_flash_bank_t *stellaris_info = bank->driver_priv;
477 target_t *target = bank->target;
485 int stellaris_protect_check(struct flash_bank_s
*bank
)
489 stellaris_flash_bank_t
*stellaris_info
= bank
->driver_priv
;
491 if (stellaris_info
->did1
== 0)
493 stellaris_read_part_info(bank
);
496 if (stellaris_info
->did1
== 0)
498 WARNING("Cannot identify target as an AT91SAM");
499 return ERROR_FLASH_OPERATION_FAILED
;
502 status
= stellaris_get_flash_status(bank
);
503 stellaris_info
->lockbits
= status
>> 16;
508 int stellaris_erase(struct flash_bank_s
*bank
, int first
, int last
)
511 u32 flash_fmc
, flash_cris
;
512 stellaris_flash_bank_t
*stellaris_info
= bank
->driver_priv
;
513 target_t
*target
= bank
->target
;
515 if (bank
->target
->state
!= TARGET_HALTED
)
517 return ERROR_TARGET_NOT_HALTED
;
520 if (stellaris_info
->did1
== 0)
522 stellaris_read_part_info(bank
);
525 if (stellaris_info
->did1
== 0)
527 WARNING("Cannot identify target as Stellaris");
528 return ERROR_FLASH_OPERATION_FAILED
;
531 if ((first
< 0) || (last
< first
) || (last
>= stellaris_info
->num_pages
))
533 return ERROR_FLASH_SECTOR_INVALID
;
536 /* Configure the flash controller timing */
537 stellaris_read_clock_info(bank
);
538 stellaris_set_flash_mode(bank
,0);
540 /* Clear and disable flash programming interrupts */
541 target_write_u32(target
, FLASH_CIM
, 0);
542 target_write_u32(target
, FLASH_MISC
, PMISC
|AMISC
);
544 if ((first
== 0) && (last
== (stellaris_info
->num_pages
-1)))
546 target_write_u32(target
, FLASH_FMA
, 0);
547 target_write_u32(target
, FLASH_FMC
, FMC_WRKEY
| FMC_MERASE
);
548 /* Wait until erase complete */
551 target_read_u32(target
, FLASH_FMC
, &flash_fmc
);
553 while(flash_fmc
& FMC_MERASE
);
555 /* if device has > 128k, then second erase cycle is needed */
556 if(stellaris_info
->num_pages
* stellaris_info
->pagesize
> 0x20000)
558 target_write_u32(target
, FLASH_FMA
, 0x20000);
559 target_write_u32(target
, FLASH_FMC
, FMC_WRKEY
| FMC_MERASE
);
560 /* Wait until erase complete */
563 target_read_u32(target
, FLASH_FMC
, &flash_fmc
);
565 while(flash_fmc
& FMC_MERASE
);
571 for (banknr
=first
;banknr
<=last
;banknr
++)
573 /* Address is first word in page */
574 target_write_u32(target
, FLASH_FMA
, banknr
*stellaris_info
->pagesize
);
575 /* Write erase command */
576 target_write_u32(target
, FLASH_FMC
, FMC_WRKEY
| FMC_ERASE
);
577 /* Wait until erase complete */
580 target_read_u32(target
, FLASH_FMC
, &flash_fmc
);
582 while(flash_fmc
& FMC_ERASE
);
584 /* Check acess violations */
585 target_read_u32(target
, FLASH_CRIS
, &flash_cris
);
586 if(flash_cris
& (AMASK
))
588 WARNING("Error erasing flash page %i, flash_cris 0x%x", banknr
, flash_cris
);
589 target_write_u32(target
, FLASH_CRIS
, 0);
590 return ERROR_FLASH_OPERATION_FAILED
;
597 int stellaris_protect(struct flash_bank_s
*bank
, int set
, int first
, int last
)
599 u32 fmppe
, flash_fmc
, flash_cris
;
602 stellaris_flash_bank_t
*stellaris_info
= bank
->driver_priv
;
603 target_t
*target
= bank
->target
;
605 if (bank
->target
->state
!= TARGET_HALTED
)
607 return ERROR_TARGET_NOT_HALTED
;
610 if ((first
< 0) || (last
< first
) || (last
>= stellaris_info
->num_lockbits
))
612 return ERROR_FLASH_SECTOR_INVALID
;
615 if (stellaris_info
->did1
== 0)
617 stellaris_read_part_info(bank
);
620 if (stellaris_info
->did1
== 0)
622 WARNING("Cannot identify target as an Stellaris MCU");
623 return ERROR_FLASH_OPERATION_FAILED
;
626 /* Configure the flash controller timing */
627 stellaris_read_clock_info(bank
);
628 stellaris_set_flash_mode(bank
,0);
630 fmppe
= stellaris_info
->lockbits
;
631 for (lockregion
=first
;lockregion
<=last
;lockregion
++)
634 fmppe
&= ~(1<<lockregion
);
636 fmppe
|= (1<<lockregion
);
639 /* Clear and disable flash programming interrupts */
640 target_write_u32(target
, FLASH_CIM
, 0);
641 target_write_u32(target
, FLASH_MISC
, PMISC
|AMISC
);
643 DEBUG("fmppe 0x%x",fmppe
);
644 target_write_u32(target
, SCB_BASE
|FMPPE
, fmppe
);
646 target_write_u32(target
, FLASH_FMA
, 1);
647 /* Write commit command */
648 /* TODO safety check, sice this cannot be undone */
649 WARNING("Flash protection cannot be removed once commited, commit is NOT executed !");
650 /* target_write_u32(target, FLASH_FMC, FMC_WRKEY | FMC_COMT); */
651 /* Wait until erase complete */
654 target_read_u32(target
, FLASH_FMC
, &flash_fmc
);
656 while(flash_fmc
& FMC_COMT
);
658 /* Check acess violations */
659 target_read_u32(target
, FLASH_CRIS
, &flash_cris
);
660 if(flash_cris
& (AMASK
))
662 WARNING("Error setting flash page protection, flash_cris 0x%x", flash_cris
);
663 target_write_u32(target
, FLASH_CRIS
, 0);
664 return ERROR_FLASH_OPERATION_FAILED
;
667 target_read_u32(target
, SCB_BASE
|FMPPE
, &stellaris_info
->lockbits
);
672 u8 stellaris_write_code
[] =
677 r1 = destination address
678 r2 = bytecount (in) - endaddr (work)
681 r3 = pFLASH_CTRL_BASE
687 0x07,0x4B, /* ldr r3,pFLASH_CTRL_BASE */
688 0x08,0x4C, /* ldr r4,FLASHWRITECMD */
689 0x01,0x25, /* movs r5, 1 */
690 0x00,0x26, /* movs r6, #0 */
692 0x19,0x60, /* str r1, [r3, #0] */
693 0x87,0x59, /* ldr r7, [r0, r6] */
694 0x5F,0x60, /* str r7, [r3, #4] */
695 0x9C,0x60, /* str r4, [r3, #8] */
697 0x9F,0x68, /* ldr r7, [r3, #8] */
698 0x2F,0x42, /* tst r7, r5 */
699 0xFC,0xD1, /* bne waitloop */
700 0x04,0x31, /* adds r1, r1, #4 */
701 0x04,0x36, /* adds r6, r6, #4 */
702 0x96,0x42, /* cmp r6, r2 */
703 0xF4,0xD1, /* bne mainloop */
704 0x00,0xBE, /* bkpt #0 */
705 /* pFLASH_CTRL_BASE: */
706 0x00,0xD0,0x0F,0x40, /* .word 0x400FD000 */
708 0x01,0x00,0x42,0xA4 /* .word 0xA4420001 */
711 int stellaris_write_block(struct flash_bank_s
*bank
, u8
*buffer
, u32 offset
, u32 wcount
)
713 // stellaris_flash_bank_t *stellaris_info = bank->driver_priv;
714 target_t
*target
= bank
->target
;
715 u32 buffer_size
= 8192;
716 working_area_t
*source
;
717 working_area_t
*write_algorithm
;
718 u32 address
= bank
->base
+ offset
;
719 reg_param_t reg_params
[8];
720 armv7m_algorithm_t armv7m_info
;
723 DEBUG("(bank=%08X buffer=%08X offset=%08X wcount=%08X)",
724 (unsigned int)bank
, (unsigned int)buffer
, offset
, wcount
);
726 /* flash write code */
727 if (target_alloc_working_area(target
, sizeof(stellaris_write_code
), &write_algorithm
) != ERROR_OK
)
729 WARNING("no working area available, can't do block memory writes");
730 return ERROR_TARGET_RESOURCE_NOT_AVAILABLE
;
733 target_write_buffer(target
, write_algorithm
->address
, sizeof(stellaris_write_code
), stellaris_write_code
);
736 while (target_alloc_working_area(target
, buffer_size
, &source
) != ERROR_OK
)
738 DEBUG("called target_alloc_working_area(target=%08X buffer_size=%08X source=%08X)",
739 (unsigned int)target
, buffer_size
, (unsigned int)source
);
741 if (buffer_size
<= 256)
743 /* if we already allocated the writing code, but failed to get a buffer, free the algorithm */
745 target_free_working_area(target
, write_algorithm
);
747 WARNING("no large enough working area available, can't do block memory writes");
748 return ERROR_TARGET_RESOURCE_NOT_AVAILABLE
;
752 armv7m_info
.common_magic
= ARMV7M_COMMON_MAGIC
;
753 armv7m_info
.core_mode
= ARMV7M_MODE_ANY
;
754 armv7m_info
.core_state
= ARMV7M_STATE_THUMB
;
756 init_reg_param(®_params
[0], "r0", 32, PARAM_OUT
);
757 init_reg_param(®_params
[1], "r1", 32, PARAM_OUT
);
758 init_reg_param(®_params
[2], "r2", 32, PARAM_OUT
);
759 init_reg_param(®_params
[3], "r3", 32, PARAM_OUT
);
760 init_reg_param(®_params
[4], "r4", 32, PARAM_OUT
);
761 init_reg_param(®_params
[5], "r5", 32, PARAM_OUT
);
762 init_reg_param(®_params
[6], "r6", 32, PARAM_OUT
);
763 init_reg_param(®_params
[7], "r7", 32, PARAM_OUT
);
767 u32 thisrun_count
= (wcount
> (buffer_size
/ 4)) ? (buffer_size
/ 4) : wcount
;
769 target_write_buffer(target
, source
->address
, thisrun_count
* 4, buffer
);
771 buf_set_u32(reg_params
[0].value
, 0, 32, source
->address
);
772 buf_set_u32(reg_params
[1].value
, 0, 32, address
);
773 buf_set_u32(reg_params
[2].value
, 0, 32, 4*thisrun_count
);
774 WARNING("Algorithm flash write %i words to 0x%x, %i remaining",thisrun_count
,address
, wcount
);
775 DEBUG("Algorithm flash write %i words to 0x%x, %i remaining",thisrun_count
,address
, wcount
);
776 if ((retval
= target
->type
->run_algorithm(target
, 0, NULL
, 3, reg_params
, write_algorithm
->address
, write_algorithm
->address
+ sizeof(stellaris_write_code
)-10, 10000, &armv7m_info
)) != ERROR_OK
)
778 ERROR("error executing stellaris flash write algorithm");
779 target_free_working_area(target
, source
);
780 destroy_reg_param(®_params
[0]);
781 destroy_reg_param(®_params
[1]);
782 destroy_reg_param(®_params
[2]);
783 return ERROR_FLASH_OPERATION_FAILED
;
786 buffer
+= thisrun_count
* 4;
787 address
+= thisrun_count
* 4;
788 wcount
-= thisrun_count
;
792 target_free_working_area(target
, write_algorithm
);
793 target_free_working_area(target
, source
);
795 destroy_reg_param(®_params
[0]);
796 destroy_reg_param(®_params
[1]);
797 destroy_reg_param(®_params
[2]);
798 destroy_reg_param(®_params
[3]);
799 destroy_reg_param(®_params
[4]);
800 destroy_reg_param(®_params
[5]);
801 destroy_reg_param(®_params
[6]);
802 destroy_reg_param(®_params
[7]);
807 int stellaris_write(struct flash_bank_s
*bank
, u8
*buffer
, u32 offset
, u32 count
)
809 stellaris_flash_bank_t
*stellaris_info
= bank
->driver_priv
;
810 target_t
*target
= bank
->target
;
811 u32 address
= offset
;
812 u32 flash_cris
,flash_fmc
;
815 DEBUG("(bank=%08X buffer=%08X offset=%08X count=%08X)",
816 (unsigned int)bank
, (unsigned int)buffer
, offset
, count
);
818 if (bank
->target
->state
!= TARGET_HALTED
)
820 return ERROR_TARGET_NOT_HALTED
;
823 if (stellaris_info
->did1
== 0)
825 stellaris_read_part_info(bank
);
828 if (stellaris_info
->did1
== 0)
830 WARNING("Cannot identify target as a Stellaris processor");
831 return ERROR_FLASH_OPERATION_FAILED
;
834 if((offset
& 3) || (count
& 3))
836 WARNING("offset size must be word aligned");
837 return ERROR_FLASH_DST_BREAKS_ALIGNMENT
;
840 if (offset
+ count
> bank
->size
)
841 return ERROR_FLASH_DST_OUT_OF_BANK
;
843 /* Configure the flash controller timing */
844 stellaris_read_clock_info(bank
);
845 stellaris_set_flash_mode(bank
,0);
848 /* Clear and disable flash programming interrupts */
849 target_write_u32(target
, FLASH_CIM
, 0);
850 target_write_u32(target
, FLASH_MISC
, PMISC
|AMISC
);
852 /* multiple words to be programmed? */
855 /* try using a block write */
856 if ((retval
= stellaris_write_block(bank
, buffer
, offset
, count
/4)) != ERROR_OK
)
858 if (retval
== ERROR_TARGET_RESOURCE_NOT_AVAILABLE
)
860 /* if block write failed (no sufficient working area),
861 * we use normal (slow) single dword accesses */
862 WARNING("couldn't use block writes, falling back to single memory accesses");
864 else if (retval
== ERROR_FLASH_OPERATION_FAILED
)
866 /* if an error occured, we examine the reason, and quit */
867 target_read_u32(target
, FLASH_CRIS
, &flash_cris
);
869 ERROR("flash writing failed with CRIS: 0x%x", flash_cris
);
870 return ERROR_FLASH_OPERATION_FAILED
;
876 address
+= count
* 4;
885 if (!(address
&0xff)) DEBUG("0x%x",address
);
886 /* Program one word */
887 target_write_u32(target
, FLASH_FMA
, address
);
888 target_write_buffer(target
, FLASH_FMD
, 4, buffer
);
889 target_write_u32(target
, FLASH_FMC
, FMC_WRKEY
| FMC_WRITE
);
890 //DEBUG("0x%x 0x%x 0x%x",address,buf_get_u32(buffer, 0, 32),FMC_WRKEY | FMC_WRITE);
891 /* Wait until write complete */
894 target_read_u32(target
, FLASH_FMC
, &flash_fmc
);
896 while(flash_fmc
& FMC_WRITE
);
901 /* Check acess violations */
902 target_read_u32(target
, FLASH_CRIS
, &flash_cris
);
903 if(flash_cris
& (AMASK
))
905 DEBUG("flash_cris 0x%x", flash_cris
);
906 return ERROR_FLASH_OPERATION_FAILED
;
912 int stellaris_probe(struct flash_bank_s
*bank
)
914 /* we can't probe on an stellaris
915 * if this is an stellaris, it has the configured flash
917 stellaris_flash_bank_t
*stellaris_info
= bank
->driver_priv
;
919 if (stellaris_info
->did1
== 0)
921 stellaris_read_part_info(bank
);
924 if (stellaris_info
->did1
== 0)
926 WARNING("Cannot identify target as a LMI Stellaris");
927 return ERROR_FLASH_OPERATION_FAILED
;
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