1 /***************************************************************************
2 * Copyright (C) 2007, 2008 by Ben Dooks *
5 * This program is free software; you can redistribute it and/or modify *
6 * it under the terms of the GNU General Public License as published by *
7 * the Free Software Foundation; either version 2 of the License, or *
8 * (at your option) any later version. *
10 * This program is distributed in the hope that it will be useful, *
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of *
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
13 * GNU General Public License for more details. *
15 * You should have received a copy of the GNU General Public License *
16 * along with this program; if not, write to the *
17 * Free Software Foundation, Inc., *
18 * 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. *
19 ***************************************************************************/
22 * S3C2440 OpenOCD NAND Flash controller support.
24 * Many thanks to Simtec Electronics for sponsoring this work.
31 #include "replacements.h"
38 #include "s3c24xx_nand.h"
41 int s3c2440_nand_device_command(struct command_context_s
*cmd_ctx
, char *cmd
, char **args
, int argc
, struct nand_device_s
*device
);
42 int s3c2440_init(struct nand_device_s
*device
);
43 int s3c2440_nand_ready(struct nand_device_s
*device
, int timeout
);
45 nand_flash_controller_t s3c2440_nand_controller
=
48 .nand_device_command
= s3c2440_nand_device_command
,
49 .register_commands
= s3c24xx_register_commands
,
51 .reset
= s3c24xx_reset
,
52 .command
= s3c24xx_command
,
53 .address
= s3c24xx_address
,
54 .write_data
= s3c24xx_write_data
,
55 .read_data
= s3c24xx_read_data
,
56 .write_page
= s3c24xx_write_page
,
57 .read_page
= s3c24xx_read_page
,
58 .write_block_data
= s3c2440_write_block_data
,
59 .read_block_data
= s3c2440_read_block_data
,
60 .controller_ready
= s3c24xx_controller_ready
,
61 .nand_ready
= s3c2440_nand_ready
,
64 int s3c2440_nand_device_command(struct command_context_s
*cmd_ctx
, char *cmd
,
65 char **args
, int argc
,
66 struct nand_device_s
*device
)
68 s3c24xx_nand_controller_t
*info
;
70 info
= s3c24xx_nand_device_command(cmd_ctx
, cmd
, args
, argc
, device
);
72 return ERROR_NAND_DEVICE_INVALID
;
75 /* fill in the address fields for the core device */
76 info
->cmd
= S3C2440_NFCMD
;
77 info
->addr
= S3C2440_NFADDR
;
78 info
->data
= S3C2440_NFDATA
;
79 info
->nfstat
= S3C2440_NFSTAT
;
84 int s3c2440_init(struct nand_device_s
*device
)
86 s3c24xx_nand_controller_t
*s3c24xx_info
= device
->controller_priv
;
87 target_t
*target
= s3c24xx_info
->target
;
89 target_write_u32(target
, S3C2410_NFCONF
,
90 S3C2440_NFCONF_TACLS(3) |
91 S3C2440_NFCONF_TWRPH0(7) |
92 S3C2440_NFCONF_TWRPH1(7));
94 target_write_u32(target
, S3C2440_NFCONT
,
95 S3C2440_NFCONT_INITECC
| S3C2440_NFCONT_ENABLE
);
100 int s3c2440_nand_ready(struct nand_device_s
*device
, int timeout
)
102 s3c24xx_nand_controller_t
*s3c24xx_info
= device
->controller_priv
;
103 target_t
*target
= s3c24xx_info
->target
;
106 if (target
->state
!= TARGET_HALTED
) {
107 LOG_ERROR("target must be halted to use S3C24XX NAND flash controller");
108 return ERROR_NAND_OPERATION_FAILED
;
112 target_read_u8(target
, s3c24xx_info
->nfstat
, &status
);
114 if (status
& S3C2440_NFSTAT_READY
)
118 } while (timeout
-- > 0);
124 /* use the fact we can read/write 4 bytes in one go via a single 32bit op */
126 int s3c2440_read_block_data(struct nand_device_s
*device
, u8
*data
, int data_size
)
128 s3c24xx_nand_controller_t
*s3c24xx_info
= device
->controller_priv
;
129 target_t
*target
= s3c24xx_info
->target
;
130 u32 nfdata
= s3c24xx_info
->data
;
133 LOG_INFO("%s: reading data: %p, %p, %d\n", __func__
, device
, data
, data_size
);
135 if (target
->state
!= TARGET_HALTED
) {
136 LOG_ERROR("target must be halted to use S3C24XX NAND flash controller");
137 return ERROR_NAND_OPERATION_FAILED
;
140 while (data_size
>= 4) {
141 target_read_u32(target
, nfdata
, &tmp
);
152 while (data_size
> 0) {
153 target_read_u8(target
, nfdata
, data
);
162 int s3c2440_write_block_data(struct nand_device_s
*device
, u8
*data
, int data_size
)
164 s3c24xx_nand_controller_t
*s3c24xx_info
= device
->controller_priv
;
165 target_t
*target
= s3c24xx_info
->target
;
166 u32 nfdata
= s3c24xx_info
->data
;
169 if (target
->state
!= TARGET_HALTED
) {
170 LOG_ERROR("target must be halted to use S3C24XX NAND flash controller");
171 return ERROR_NAND_OPERATION_FAILED
;
174 while (data_size
>= 4) {
175 tmp
= le_to_h_u32(data
);
176 target_write_u32(target
, nfdata
, tmp
);
182 while (data_size
> 0) {
183 target_write_u8(target
, nfdata
, *data
);
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