1 /***************************************************************************
2 * Copyright (C) 2007 by Dominic Rath *
3 * Dominic.Rath@gmx.de *
6 * drivers/mtd/nand_ids.c *
8 * Copyright (C) 2002 Thomas Gleixner (tglx@linutronix.de) *
10 * This program is free software; you can redistribute it and/or modify *
11 * it under the terms of the GNU General Public License as published by *
12 * the Free Software Foundation; either version 2 of the License, or *
13 * (at your option) any later version. *
15 * This program is distributed in the hope that it will be useful, *
16 * but WITHOUT ANY WARRANTY; without even the implied warranty of *
17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
18 * GNU General Public License for more details. *
20 * You should have received a copy of the GNU General Public License *
21 * along with this program; if not, write to the *
22 * Free Software Foundation, Inc., *
23 * 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. *
24 ***************************************************************************/
29 #include "replacements.h"
40 #include "time_support.h"
44 int nand_register_commands(struct command_context_s
*cmd_ctx
);
45 int handle_nand_list_command(struct command_context_s
*cmd_ctx
, char *cmd
, char **args
, int argc
);
46 int handle_nand_probe_command(struct command_context_s
*cmd_ctx
, char *cmd
, char **args
, int argc
);
47 int handle_nand_check_bad_blocks_command(struct command_context_s
*cmd_ctx
, char *cmd
, char **args
, int argc
);
48 int handle_nand_info_command(struct command_context_s
*cmd_ctx
, char *cmd
, char **args
, int argc
);
49 int handle_nand_copy_command(struct command_context_s
*cmd_ctx
, char *cmd
, char **args
, int argc
);
50 int handle_nand_write_command(struct command_context_s
*cmd_ctx
, char *cmd
, char **args
, int argc
);
51 int handle_nand_dump_command(struct command_context_s
*cmd_ctx
, char *cmd
, char **args
, int argc
);
52 int handle_nand_erase_command(struct command_context_s
*cmd_ctx
, char *cmd
, char **args
, int argc
);
54 int handle_nand_raw_access_command(struct command_context_s
*cmd_ctx
, char *cmd
, char **args
, int argc
);
56 int nand_read_page_raw(struct nand_device_s
*device
, u32 page
, u8
*data
, u32 data_size
, u8
*oob
, u32 oob_size
);
57 int nand_read_page(struct nand_device_s
*device
, u32 page
, u8
*data
, u32 data_size
, u8
*oob
, u32 oob_size
);
58 int nand_read_plain(struct nand_device_s
*device
, u32 address
, u8
*data
, u32 data_size
);
60 int nand_write_page_raw(struct nand_device_s
*device
, u32 page
, u8
*data
, u32 data_size
, u8
*oob
, u32 oob_size
);
61 int nand_write_page(struct nand_device_s
*device
, u32 page
, u8
*data
, u32 data_size
, u8
*oob
, u32 oob_size
);
63 /* NAND flash controller
65 extern nand_flash_controller_t lpc3180_nand_controller
;
66 extern nand_flash_controller_t s3c2410_nand_controller
;
67 extern nand_flash_controller_t s3c2412_nand_controller
;
68 extern nand_flash_controller_t s3c2440_nand_controller
;
69 extern nand_flash_controller_t s3c2443_nand_controller
;
71 /* extern nand_flash_controller_t boundary_scan_nand_controller; */
73 nand_flash_controller_t
*nand_flash_controllers
[] =
75 &lpc3180_nand_controller
,
76 &s3c2410_nand_controller
,
77 &s3c2412_nand_controller
,
78 &s3c2440_nand_controller
,
79 &s3c2443_nand_controller
,
80 /* &boundary_scan_nand_controller, */
84 /* configured NAND devices and NAND Flash command handler */
85 nand_device_t
*nand_devices
= NULL
;
86 static command_t
*nand_cmd
;
90 * Name, ID code, pagesize, chipsize in MegaByte, eraseblock size,
93 * Pagesize; 0, 256, 512
94 * 0 get this information from the extended chip ID
95 * 256 256 Byte page size
96 * 512 512 Byte page size
98 nand_info_t nand_flash_ids
[] =
100 {"NAND 1MiB 5V 8-bit", 0x6e, 256, 1, 0x1000, 0},
101 {"NAND 2MiB 5V 8-bit", 0x64, 256, 2, 0x1000, 0},
102 {"NAND 4MiB 5V 8-bit", 0x6b, 512, 4, 0x2000, 0},
103 {"NAND 1MiB 3,3V 8-bit", 0xe8, 256, 1, 0x1000, 0},
104 {"NAND 1MiB 3,3V 8-bit", 0xec, 256, 1, 0x1000, 0},
105 {"NAND 2MiB 3,3V 8-bit", 0xea, 256, 2, 0x1000, 0},
106 {"NAND 4MiB 3,3V 8-bit", 0xd5, 512, 4, 0x2000, 0},
107 {"NAND 4MiB 3,3V 8-bit", 0xe3, 512, 4, 0x2000, 0},
108 {"NAND 4MiB 3,3V 8-bit", 0xe5, 512, 4, 0x2000, 0},
109 {"NAND 8MiB 3,3V 8-bit", 0xd6, 512, 8, 0x2000, 0},
111 {"NAND 8MiB 1,8V 8-bit", 0x39, 512, 8, 0x2000, 0},
112 {"NAND 8MiB 3,3V 8-bit", 0xe6, 512, 8, 0x2000, 0},
113 {"NAND 8MiB 1,8V 16-bit", 0x49, 512, 8, 0x2000, NAND_BUSWIDTH_16
},
114 {"NAND 8MiB 3,3V 16-bit", 0x59, 512, 8, 0x2000, NAND_BUSWIDTH_16
},
116 {"NAND 16MiB 1,8V 8-bit", 0x33, 512, 16, 0x4000, 0},
117 {"NAND 16MiB 3,3V 8-bit", 0x73, 512, 16, 0x4000, 0},
118 {"NAND 16MiB 1,8V 16-bit", 0x43, 512, 16, 0x4000, NAND_BUSWIDTH_16
},
119 {"NAND 16MiB 3,3V 16-bit", 0x53, 512, 16, 0x4000, NAND_BUSWIDTH_16
},
121 {"NAND 32MiB 1,8V 8-bit", 0x35, 512, 32, 0x4000, 0},
122 {"NAND 32MiB 3,3V 8-bit", 0x75, 512, 32, 0x4000, 0},
123 {"NAND 32MiB 1,8V 16-bit", 0x45, 512, 32, 0x4000, NAND_BUSWIDTH_16
},
124 {"NAND 32MiB 3,3V 16-bit", 0x55, 512, 32, 0x4000, NAND_BUSWIDTH_16
},
126 {"NAND 64MiB 1,8V 8-bit", 0x36, 512, 64, 0x4000, 0},
127 {"NAND 64MiB 3,3V 8-bit", 0x76, 512, 64, 0x4000, 0},
128 {"NAND 64MiB 1,8V 16-bit", 0x46, 512, 64, 0x4000, NAND_BUSWIDTH_16
},
129 {"NAND 64MiB 3,3V 16-bit", 0x56, 512, 64, 0x4000, NAND_BUSWIDTH_16
},
131 {"NAND 128MiB 1,8V 8-bit", 0x78, 512, 128, 0x4000, 0},
132 {"NAND 128MiB 1,8V 8-bit", 0x39, 512, 128, 0x4000, 0},
133 {"NAND 128MiB 3,3V 8-bit", 0x79, 512, 128, 0x4000, 0},
134 {"NAND 128MiB 1,8V 16-bit", 0x72, 512, 128, 0x4000, NAND_BUSWIDTH_16
},
135 {"NAND 128MiB 1,8V 16-bit", 0x49, 512, 128, 0x4000, NAND_BUSWIDTH_16
},
136 {"NAND 128MiB 3,3V 16-bit", 0x74, 512, 128, 0x4000, NAND_BUSWIDTH_16
},
137 {"NAND 128MiB 3,3V 16-bit", 0x59, 512, 128, 0x4000, NAND_BUSWIDTH_16
},
139 {"NAND 256MiB 3,3V 8-bit", 0x71, 512, 256, 0x4000, 0},
141 {"NAND 64MiB 1,8V 8-bit", 0xA2, 0, 64, 0, LP_OPTIONS
},
142 {"NAND 64MiB 3,3V 8-bit", 0xF2, 0, 64, 0, LP_OPTIONS
},
143 {"NAND 64MiB 1,8V 16-bit", 0xB2, 0, 64, 0, LP_OPTIONS16
},
144 {"NAND 64MiB 3,3V 16-bit", 0xC2, 0, 64, 0, LP_OPTIONS16
},
146 {"NAND 128MiB 1,8V 8-bit", 0xA1, 0, 128, 0, LP_OPTIONS
},
147 {"NAND 128MiB 3,3V 8-bit", 0xF1, 0, 128, 0, LP_OPTIONS
},
148 {"NAND 128MiB 1,8V 16-bit", 0xB1, 0, 128, 0, LP_OPTIONS16
},
149 {"NAND 128MiB 3,3V 16-bit", 0xC1, 0, 128, 0, LP_OPTIONS16
},
151 {"NAND 256MiB 1,8V 8-bit", 0xAA, 0, 256, 0, LP_OPTIONS
},
152 {"NAND 256MiB 3,3V 8-bit", 0xDA, 0, 256, 0, LP_OPTIONS
},
153 {"NAND 256MiB 1,8V 16-bit", 0xBA, 0, 256, 0, LP_OPTIONS16
},
154 {"NAND 256MiB 3,3V 16-bit", 0xCA, 0, 256, 0, LP_OPTIONS16
},
156 {"NAND 512MiB 1,8V 8-bit", 0xAC, 0, 512, 0, LP_OPTIONS
},
157 {"NAND 512MiB 3,3V 8-bit", 0xDC, 0, 512, 0, LP_OPTIONS
},
158 {"NAND 512MiB 1,8V 16-bit", 0xBC, 0, 512, 0, LP_OPTIONS16
},
159 {"NAND 512MiB 3,3V 16-bit", 0xCC, 0, 512, 0, LP_OPTIONS16
},
161 {"NAND 1GiB 1,8V 8-bit", 0xA3, 0, 1024, 0, LP_OPTIONS
},
162 {"NAND 1GiB 3,3V 8-bit", 0xD3, 0, 1024, 0, LP_OPTIONS
},
163 {"NAND 1GiB 1,8V 16-bit", 0xB3, 0, 1024, 0, LP_OPTIONS16
},
164 {"NAND 1GiB 3,3V 16-bit", 0xC3, 0, 1024, 0, LP_OPTIONS16
},
166 {"NAND 2GiB 1,8V 8-bit", 0xA5, 0, 2048, 0, LP_OPTIONS
},
167 {"NAND 2GiB 3,3V 8-bit", 0xD5, 0, 2048, 0, LP_OPTIONS
},
168 {"NAND 2GiB 1,8V 16-bit", 0xB5, 0, 2048, 0, LP_OPTIONS16
},
169 {"NAND 2GiB 3,3V 16-bit", 0xC5, 0, 2048, 0, LP_OPTIONS16
},
174 /* Manufacturer ID list
176 nand_manufacturer_t nand_manuf_ids
[] =
179 {NAND_MFR_TOSHIBA
, "Toshiba"},
180 {NAND_MFR_SAMSUNG
, "Samsung"},
181 {NAND_MFR_FUJITSU
, "Fujitsu"},
182 {NAND_MFR_NATIONAL
, "National"},
183 {NAND_MFR_RENESAS
, "Renesas"},
184 {NAND_MFR_STMICRO
, "ST Micro"},
185 {NAND_MFR_HYNIX
, "Hynix"},
189 /* nand device <nand_controller> [controller options]
191 int handle_nand_device_command(struct command_context_s
*cmd_ctx
, char *cmd
, char **args
, int argc
)
198 WARNING("incomplete flash device nand configuration");
199 return ERROR_FLASH_BANK_INVALID
;
202 for (i
= 0; nand_flash_controllers
[i
]; i
++)
204 nand_device_t
*p
, *c
;
206 if (strcmp(args
[0], nand_flash_controllers
[i
]->name
) == 0)
208 /* register flash specific commands */
209 if (nand_flash_controllers
[i
]->register_commands(cmd_ctx
) != ERROR_OK
)
211 ERROR("couldn't register '%s' commands", args
[0]);
215 c
= malloc(sizeof(nand_device_t
));
217 c
->controller
= nand_flash_controllers
[i
];
218 c
->controller_priv
= NULL
;
219 c
->manufacturer
= NULL
;
222 c
->address_cycles
= 0;
227 if ((retval
= nand_flash_controllers
[i
]->nand_device_command(cmd_ctx
, cmd
, args
, argc
, c
)) != ERROR_OK
)
229 ERROR("'%s' driver rejected nand flash", c
->controller
->name
);
234 /* put NAND device in linked list */
237 /* find last flash device */
238 for (p
= nand_devices
; p
&& p
->next
; p
= p
->next
);
251 /* no valid NAND controller was found (i.e. the configuration option,
252 * didn't match one of the compiled-in controllers)
254 ERROR("No valid NAND flash controller found (%s)", args
[0]);
255 ERROR("compiled-in NAND flash controllers:");
256 for (i
= 0; nand_flash_controllers
[i
]; i
++)
258 ERROR("%i: %s", i
, nand_flash_controllers
[i
]->name
);
264 int nand_register_commands(struct command_context_s
*cmd_ctx
)
266 nand_cmd
= register_command(cmd_ctx
, NULL
, "nand", NULL
, COMMAND_ANY
, "NAND specific commands");
268 register_command(cmd_ctx
, nand_cmd
, "device", handle_nand_device_command
, COMMAND_CONFIG
, NULL
);
273 int nand_init(struct command_context_s
*cmd_ctx
)
277 register_command(cmd_ctx
, nand_cmd
, "list", handle_nand_list_command
, COMMAND_EXEC
,
278 "list configured NAND flash devices");
279 register_command(cmd_ctx
, nand_cmd
, "info", handle_nand_info_command
, COMMAND_EXEC
,
280 "print info about NAND flash device <num>");
281 register_command(cmd_ctx
, nand_cmd
, "probe", handle_nand_probe_command
, COMMAND_EXEC
,
282 "identify NAND flash device <num>");
283 register_command(cmd_ctx
, nand_cmd
, "check_bad_blocks", handle_nand_check_bad_blocks_command
, COMMAND_EXEC
,
284 "check NAND flash device <num> for bad blocks [<first> <last>]");
285 register_command(cmd_ctx
, nand_cmd
, "erase", handle_nand_erase_command
, COMMAND_EXEC
,
286 "erase blocks on NAND flash device <num> <first> <last>");
287 register_command(cmd_ctx
, nand_cmd
, "copy", handle_nand_copy_command
, COMMAND_EXEC
,
288 "copy from NAND flash device <num> <offset> <length> <ram-address>");
289 register_command(cmd_ctx
, nand_cmd
, "dump", handle_nand_dump_command
, COMMAND_EXEC
,
290 "dump from NAND flash device <num> <filename> <offset> <size> [options]");
291 register_command(cmd_ctx
, nand_cmd
, "write", handle_nand_write_command
, COMMAND_EXEC
,
292 "write to NAND flash device <num> <filename> <offset> [options]");
293 register_command(cmd_ctx
, nand_cmd
, "raw_access", handle_nand_raw_access_command
, COMMAND_EXEC
,
294 "raw access to NAND flash device <num> ['enable'|'disable']");
300 nand_device_t
*get_nand_device_by_num(int num
)
305 for (p
= nand_devices
; p
; p
= p
->next
)
316 int nand_build_bbt(struct nand_device_s
*device
, int first
, int last
)
324 if ((first
< 0) || (first
>= device
->num_blocks
))
327 if ((last
>= device
->num_blocks
) || (last
== -1))
328 last
= device
->num_blocks
- 1;
330 for (i
= first
; i
< last
; i
++)
332 nand_read_page(device
, page
, NULL
, 0, oob
, 6);
334 if (((device
->device
->options
& NAND_BUSWIDTH_16
) && ((oob
[0] & oob
[1]) != 0xff))
335 || (((device
->page_size
== 512) && (oob
[5] != 0xff)) ||
336 ((device
->page_size
== 2048) && (oob
[0] != 0xff))))
338 WARNING("invalid block: %i", i
);
339 device
->blocks
[i
].is_bad
= 1;
343 device
->blocks
[i
].is_bad
= 0;
346 page
+= (device
->erase_size
/ device
->page_size
);
352 int nand_read_status(struct nand_device_s
*device
, u8
*status
)
355 return ERROR_NAND_DEVICE_NOT_PROBED
;
357 /* Send read status command */
358 device
->controller
->command(device
, NAND_CMD_STATUS
);
363 if (device
->device
->options
& NAND_BUSWIDTH_16
)
366 device
->controller
->read_data(device
, &data
);
367 *status
= data
& 0xff;
371 device
->controller
->read_data(device
, status
);
377 int nand_probe(struct nand_device_s
*device
)
379 u8 manufacturer_id
, device_id
;
384 /* clear device data */
385 device
->device
= NULL
;
386 device
->manufacturer
= NULL
;
388 /* clear device parameters */
389 device
->bus_width
= 0;
390 device
->address_cycles
= 0;
391 device
->page_size
= 0;
392 device
->erase_size
= 0;
394 /* initialize controller (device parameters are zero, use controller default) */
395 if ((retval
= device
->controller
->init(device
) != ERROR_OK
))
399 case ERROR_NAND_OPERATION_FAILED
:
400 DEBUG("controller initialization failed");
401 return ERROR_NAND_OPERATION_FAILED
;
402 case ERROR_NAND_OPERATION_NOT_SUPPORTED
:
403 ERROR("BUG: controller reported that it doesn't support default parameters");
404 return ERROR_NAND_OPERATION_FAILED
;
406 ERROR("BUG: unknown controller initialization failure");
407 return ERROR_NAND_OPERATION_FAILED
;
411 device
->controller
->command(device
, NAND_CMD_RESET
);
412 device
->controller
->reset(device
);
414 device
->controller
->command(device
, NAND_CMD_READID
);
415 device
->controller
->address(device
, 0x0);
417 if (device
->bus_width
== 8)
419 device
->controller
->read_data(device
, &manufacturer_id
);
420 device
->controller
->read_data(device
, &device_id
);
425 device
->controller
->read_data(device
, &data_buf
);
426 manufacturer_id
= data_buf
& 0xff;
427 device
->controller
->read_data(device
, &data_buf
);
428 device_id
= data_buf
& 0xff;
431 for (i
= 0; nand_flash_ids
[i
].name
; i
++)
433 if (nand_flash_ids
[i
].id
== device_id
)
435 device
->device
= &nand_flash_ids
[i
];
440 for (i
= 0; nand_manuf_ids
[i
].name
; i
++)
442 if (nand_manuf_ids
[i
].id
== manufacturer_id
)
444 device
->manufacturer
= &nand_manuf_ids
[i
];
449 if (!device
->manufacturer
)
451 device
->manufacturer
= &nand_manuf_ids
[0];
452 device
->manufacturer
->id
= manufacturer_id
;
457 ERROR("unknown NAND flash device found, manufacturer id: 0x%2.2x device id: 0x%2.2x",
458 manufacturer_id
, device_id
);
459 return ERROR_NAND_OPERATION_FAILED
;
462 DEBUG("found %s (%s)", device
->device
->name
, device
->manufacturer
->name
);
464 /* initialize device parameters */
467 if (device
->device
->options
& NAND_BUSWIDTH_16
)
468 device
->bus_width
= 16;
470 device
->bus_width
= 8;
472 /* Do we need extended device probe information? */
473 if (device
->device
->page_size
== 0 ||
474 device
->device
->erase_size
== 0)
476 if (device
->bus_width
== 8)
478 device
->controller
->read_data(device
, id_buff
+3);
479 device
->controller
->read_data(device
, id_buff
+4);
480 device
->controller
->read_data(device
, id_buff
+5);
486 device
->controller
->read_data(device
, &data_buf
);
487 id_buff
[3] = data_buf
;
489 device
->controller
->read_data(device
, &data_buf
);
490 id_buff
[4] = data_buf
;
492 device
->controller
->read_data(device
, &data_buf
);
493 id_buff
[5] = data_buf
>> 8;
498 if (device
->device
->page_size
== 0)
500 device
->page_size
= 1 << (10 + (id_buff
[4] & 3));
502 else if (device
->device
->page_size
== 256)
504 ERROR("NAND flashes with 256 byte pagesize are not supported");
505 return ERROR_NAND_OPERATION_FAILED
;
509 device
->page_size
= device
->device
->page_size
;
512 /* number of address cycles */
513 if (device
->page_size
<= 512)
515 /* small page devices */
516 if (device
->device
->chip_size
<= 32)
517 device
->address_cycles
= 3;
518 else if (device
->device
->chip_size
<= 8*1024)
519 device
->address_cycles
= 4;
522 ERROR("BUG: small page NAND device with more than 8 GiB encountered");
523 device
->address_cycles
= 5;
528 /* large page devices */
529 if (device
->device
->chip_size
<= 128)
530 device
->address_cycles
= 4;
531 else if (device
->device
->chip_size
<= 32*1024)
532 device
->address_cycles
= 5;
535 ERROR("BUG: small page NAND device with more than 32 GiB encountered");
536 device
->address_cycles
= 6;
541 if (device
->device
->erase_size
== 0)
543 switch ((id_buff
[4] >> 4) & 3) {
545 device
->erase_size
= 64 << 10;
548 device
->erase_size
= 128 << 10;
551 device
->erase_size
= 256 << 10;
554 device
->erase_size
=512 << 10;
560 device
->erase_size
= device
->device
->erase_size
;
563 /* initialize controller, but leave parameters at the controllers default */
564 if ((retval
= device
->controller
->init(device
) != ERROR_OK
))
568 case ERROR_NAND_OPERATION_FAILED
:
569 DEBUG("controller initialization failed");
570 return ERROR_NAND_OPERATION_FAILED
;
571 case ERROR_NAND_OPERATION_NOT_SUPPORTED
:
572 ERROR("controller doesn't support requested parameters (buswidth: %i, address cycles: %i, page size: %i)",
573 device
->bus_width
, device
->address_cycles
, device
->page_size
);
574 return ERROR_NAND_OPERATION_FAILED
;
576 ERROR("BUG: unknown controller initialization failure");
577 return ERROR_NAND_OPERATION_FAILED
;
581 device
->num_blocks
= (device
->device
->chip_size
* 1024) / (device
->erase_size
/ 1024);
582 device
->blocks
= malloc(sizeof(nand_block_t
) * device
->num_blocks
);
584 for (i
= 0; i
< device
->num_blocks
; i
++)
586 device
->blocks
[i
].size
= device
->erase_size
;
587 device
->blocks
[i
].offset
= i
* device
->erase_size
;
588 device
->blocks
[i
].is_erased
= -1;
589 device
->blocks
[i
].is_bad
= -1;
595 int nand_erase(struct nand_device_s
*device
, int first_block
, int last_block
)
603 return ERROR_NAND_DEVICE_NOT_PROBED
;
605 if ((first_block
< 0) || (last_block
> device
->num_blocks
))
606 return ERROR_INVALID_ARGUMENTS
;
608 /* make sure we know if a block is bad before erasing it */
609 for (i
= first_block
; i
<= last_block
; i
++)
611 if (device
->blocks
[i
].is_bad
== -1)
613 nand_build_bbt(device
, i
, last_block
);
618 for (i
= first_block
; i
<= last_block
; i
++)
620 /* Send erase setup command */
621 device
->controller
->command(device
, NAND_CMD_ERASE1
);
623 page
= i
* (device
->erase_size
/ device
->page_size
);
625 /* Send page address */
626 if (device
->page_size
<= 512)
629 device
->controller
->address(device
, page
& 0xff);
630 device
->controller
->address(device
, (page
>> 8) & 0xff);
632 /* 3rd cycle only on devices with more than 32 MiB */
633 if (device
->address_cycles
>= 4)
634 device
->controller
->address(device
, (page
>> 16) & 0xff);
636 /* 4th cycle only on devices with more than 8 GiB */
637 if (device
->address_cycles
>= 5)
638 device
->controller
->address(device
, (page
>> 24) & 0xff);
643 device
->controller
->address(device
, page
& 0xff);
644 device
->controller
->address(device
, (page
>> 8) & 0xff);
646 /* 3rd cycle only on devices with more than 128 MiB */
647 if (device
->address_cycles
>= 5)
648 device
->controller
->address(device
, (page
>> 16) & 0xff);
651 /* Send erase confirm command */
652 device
->controller
->command(device
, NAND_CMD_ERASE2
);
654 if (!device
->controller
->nand_ready(device
, 1000))
656 ERROR("timeout waiting for NAND flash block erase to complete");
657 return ERROR_NAND_OPERATION_TIMEOUT
;
660 if ((retval
= nand_read_status(device
, &status
)) != ERROR_OK
)
662 ERROR("couldn't read status");
663 return ERROR_NAND_OPERATION_FAILED
;
668 ERROR("erase operation didn't pass, status: 0x%2.2x", status
);
669 return ERROR_NAND_OPERATION_FAILED
;
676 int nand_read_plain(struct nand_device_s
*device
, u32 address
, u8
*data
, u32 data_size
)
681 return ERROR_NAND_DEVICE_NOT_PROBED
;
683 if (address
% device
->page_size
)
685 ERROR("reads need to be page aligned");
686 return ERROR_NAND_OPERATION_FAILED
;
689 page
= malloc(device
->page_size
);
691 while (data_size
> 0 )
693 u32 thisrun_size
= (data_size
> device
->page_size
) ? device
->page_size
: data_size
;
697 page_address
= address
/ device
->page_size
;
699 nand_read_page(device
, page_address
, page
, device
->page_size
, NULL
, 0);
701 memcpy(data
, page
, thisrun_size
);
703 address
+= thisrun_size
;
704 data
+= thisrun_size
;
705 data_size
-= thisrun_size
;
713 int nand_write_plain(struct nand_device_s
*device
, u32 address
, u8
*data
, u32 data_size
)
718 return ERROR_NAND_DEVICE_NOT_PROBED
;
720 if (address
% device
->page_size
)
722 ERROR("writes need to be page aligned");
723 return ERROR_NAND_OPERATION_FAILED
;
726 page
= malloc(device
->page_size
);
728 while (data_size
> 0 )
730 u32 thisrun_size
= (data_size
> device
->page_size
) ? device
->page_size
: data_size
;
733 memset(page
, 0xff, device
->page_size
);
734 memcpy(page
, data
, thisrun_size
);
736 page_address
= address
/ device
->page_size
;
738 nand_write_page(device
, page_address
, page
, device
->page_size
, NULL
, 0);
740 address
+= thisrun_size
;
741 data
+= thisrun_size
;
742 data_size
-= thisrun_size
;
750 int nand_write_page(struct nand_device_s
*device
, u32 page
, u8
*data
, u32 data_size
, u8
*oob
, u32 oob_size
)
753 return ERROR_NAND_DEVICE_NOT_PROBED
;
755 if (device
->use_raw
|| device
->controller
->write_page
== NULL
)
756 return nand_write_page_raw(device
, page
, data
, data_size
, oob
, oob_size
);
758 return device
->controller
->write_page(device
, page
, data
, data_size
, oob
, oob_size
);
761 int nand_read_page(struct nand_device_s
*device
, u32 page
, u8
*data
, u32 data_size
, u8
*oob
, u32 oob_size
)
764 return ERROR_NAND_DEVICE_NOT_PROBED
;
766 if (device
->use_raw
|| device
->controller
->read_page
== NULL
)
767 return nand_read_page_raw(device
, page
, data
, data_size
, oob
, oob_size
);
769 return device
->controller
->read_page(device
, page
, data
, data_size
, oob
, oob_size
);
772 int nand_read_page_raw(struct nand_device_s
*device
, u32 page
, u8
*data
, u32 data_size
, u8
*oob
, u32 oob_size
)
777 return ERROR_NAND_DEVICE_NOT_PROBED
;
779 if (device
->page_size
<= 512)
781 /* small page device */
783 device
->controller
->command(device
, NAND_CMD_READ0
);
785 device
->controller
->command(device
, NAND_CMD_READOOB
);
787 /* column (always 0, we start at the beginning of a page/OOB area) */
788 device
->controller
->address(device
, 0x0);
791 device
->controller
->address(device
, page
& 0xff);
792 device
->controller
->address(device
, (page
>> 8) & 0xff);
794 /* 4th cycle only on devices with more than 32 MiB */
795 if (device
->address_cycles
>= 4)
796 device
->controller
->address(device
, (page
>> 16) & 0xff);
798 /* 5th cycle only on devices with more than 8 GiB */
799 if (device
->address_cycles
>= 5)
800 device
->controller
->address(device
, (page
>> 24) & 0xff);
804 /* large page device */
805 device
->controller
->command(device
, NAND_CMD_READ0
);
807 /* column (0 when we start at the beginning of a page,
808 * or 2048 for the beginning of OOB area)
810 device
->controller
->address(device
, 0x0);
811 device
->controller
->address(device
, 0x8);
814 device
->controller
->address(device
, page
& 0xff);
815 device
->controller
->address(device
, (page
>> 8) & 0xff);
817 /* 5th cycle only on devices with more than 128 MiB */
818 if (device
->address_cycles
>= 5)
819 device
->controller
->address(device
, (page
>> 16) & 0xff);
821 /* large page devices need a start command */
822 device
->controller
->command(device
, NAND_CMD_READSTART
);
825 if (!device
->controller
->nand_ready(device
, 100))
826 return ERROR_NAND_OPERATION_TIMEOUT
;
830 if (device
->controller
->read_block_data
!= NULL
)
831 (device
->controller
->read_block_data
)(device
, data
, data_size
);
834 for (i
= 0; i
< data_size
;)
836 if (device
->device
->options
& NAND_BUSWIDTH_16
)
838 device
->controller
->read_data(device
, data
);
844 device
->controller
->read_data(device
, data
);
854 if (device
->controller
->read_block_data
!= NULL
)
855 (device
->controller
->read_block_data
)(device
, oob
, oob_size
);
858 for (i
= 0; i
< oob_size
;)
860 if (device
->device
->options
& NAND_BUSWIDTH_16
)
862 device
->controller
->read_data(device
, oob
);
868 device
->controller
->read_data(device
, oob
);
879 int nand_write_page_raw(struct nand_device_s
*device
, u32 page
, u8
*data
, u32 data_size
, u8
*oob
, u32 oob_size
)
886 return ERROR_NAND_DEVICE_NOT_PROBED
;
888 device
->controller
->command(device
, NAND_CMD_SEQIN
);
890 if (device
->page_size
<= 512)
892 /* column (always 0, we start at the beginning of a page/OOB area) */
893 device
->controller
->address(device
, 0x0);
896 device
->controller
->address(device
, page
& 0xff);
897 device
->controller
->address(device
, (page
>> 8) & 0xff);
899 /* 4th cycle only on devices with more than 32 MiB */
900 if (device
->address_cycles
>= 4)
901 device
->controller
->address(device
, (page
>> 16) & 0xff);
903 /* 5th cycle only on devices with more than 8 GiB */
904 if (device
->address_cycles
>= 5)
905 device
->controller
->address(device
, (page
>> 24) & 0xff);
909 /* column (0 when we start at the beginning of a page,
910 * or 2048 for the beginning of OOB area)
912 device
->controller
->address(device
, 0x0);
913 device
->controller
->address(device
, 0x8);
916 device
->controller
->address(device
, page
& 0xff);
917 device
->controller
->address(device
, (page
>> 8) & 0xff);
919 /* 5th cycle only on devices with more than 128 MiB */
920 if (device
->address_cycles
>= 5)
921 device
->controller
->address(device
, (page
>> 16) & 0xff);
926 if (device
->controller
->write_block_data
!= NULL
)
927 (device
->controller
->write_block_data
)(device
, data
, data_size
);
930 for (i
= 0; i
< data_size
;)
932 if (device
->device
->options
& NAND_BUSWIDTH_16
)
934 u16 data_buf
= le_to_h_u16(data
);
935 device
->controller
->write_data(device
, data_buf
);
941 device
->controller
->write_data(device
, *data
);
951 if (device
->controller
->write_block_data
!= NULL
)
952 (device
->controller
->write_block_data
)(device
, oob
, oob_size
);
955 for (i
= 0; i
< oob_size
;)
957 if (device
->device
->options
& NAND_BUSWIDTH_16
)
959 u16 oob_buf
= le_to_h_u16(data
);
960 device
->controller
->write_data(device
, oob_buf
);
966 device
->controller
->write_data(device
, *oob
);
974 device
->controller
->command(device
, NAND_CMD_PAGEPROG
);
976 if (!device
->controller
->nand_ready(device
, 100))
977 return ERROR_NAND_OPERATION_TIMEOUT
;
979 if ((retval
= nand_read_status(device
, &status
)) != ERROR_OK
)
981 ERROR("couldn't read status");
982 return ERROR_NAND_OPERATION_FAILED
;
985 if (status
& NAND_STATUS_FAIL
)
987 ERROR("write operation didn't pass, status: 0x%2.2x", status
);
988 return ERROR_NAND_OPERATION_FAILED
;
994 int handle_nand_list_command(struct command_context_s
*cmd_ctx
, char *cmd
, char **args
, int argc
)
1001 command_print(cmd_ctx
, "no NAND flash devices configured");
1005 for (p
= nand_devices
; p
; p
= p
->next
)
1008 command_print(cmd_ctx
, "#%i: %s (%s) pagesize: %i, buswidth: %i, erasesize: %i",
1009 i
++, p
->device
->name
, p
->manufacturer
->name
, p
->page_size
, p
->bus_width
, p
->erase_size
);
1011 command_print(cmd_ctx
, "#%i: not probed");
1017 int handle_nand_info_command(struct command_context_s
*cmd_ctx
, char *cmd
, char **args
, int argc
)
1025 if ((argc
< 1) || (argc
> 3))
1027 command_print(cmd_ctx
, "usage: nand info <num> [<first> <last>]");
1033 first
= last
= strtoul(args
[1], NULL
, 0);
1037 first
= strtoul(args
[1], NULL
, 0);
1038 last
= strtoul(args
[2], NULL
, 0);
1041 p
= get_nand_device_by_num(strtoul(args
[0], NULL
, 0));
1046 if (first
>= p
->num_blocks
)
1047 first
= p
->num_blocks
- 1;
1049 if (last
>= p
->num_blocks
)
1050 last
= p
->num_blocks
- 1;
1052 command_print(cmd_ctx
, "#%i: %s (%s) pagesize: %i, buswidth: %i, erasesize: %i",
1053 i
++, p
->device
->name
, p
->manufacturer
->name
, p
->page_size
, p
->bus_width
, p
->erase_size
);
1055 for (j
= first
; j
<= last
; j
++)
1057 char *erase_state
, *bad_state
;
1059 if (p
->blocks
[j
].is_erased
== 0)
1060 erase_state
= "not erased";
1061 else if (p
->blocks
[j
].is_erased
== 1)
1062 erase_state
= "erased";
1064 erase_state
= "erase state unknown";
1066 if (p
->blocks
[j
].is_bad
== 0)
1068 else if (p
->blocks
[j
].is_bad
== 1)
1069 bad_state
= " (marked bad)";
1071 bad_state
= " (block condition unknown)";
1073 command_print(cmd_ctx
, "\t#%i: 0x%8.8x (0x%xkB) %s%s",
1074 j
, p
->blocks
[j
].offset
, p
->blocks
[j
].size
/ 1024,
1075 erase_state
, bad_state
);
1080 command_print(cmd_ctx
, "#%i: not probed");
1087 int handle_nand_probe_command(struct command_context_s
*cmd_ctx
, char *cmd
, char **args
, int argc
)
1094 command_print(cmd_ctx
, "usage: nand probe <num>");
1098 p
= get_nand_device_by_num(strtoul(args
[0], NULL
, 0));
1101 if ((retval
= nand_probe(p
)) == ERROR_OK
)
1103 command_print(cmd_ctx
, "NAND flash device '%s' found", p
->device
->name
);
1105 else if (retval
== ERROR_NAND_OPERATION_FAILED
)
1107 command_print(cmd_ctx
, "probing failed for NAND flash device");
1111 command_print(cmd_ctx
, "unknown error when probing NAND flash device");
1116 command_print(cmd_ctx
, "NAND flash device '#%s' is out of bounds", args
[0]);
1122 int handle_nand_erase_command(struct command_context_s
*cmd_ctx
, char *cmd
, char **args
, int argc
)
1129 command_print(cmd_ctx
, "usage: nand erase <num> <first> <last>");
1133 p
= get_nand_device_by_num(strtoul(args
[0], NULL
, 0));
1136 int first
= strtoul(args
[1], NULL
, 0);
1137 int last
= strtoul(args
[2], NULL
, 0);
1139 if ((retval
= nand_erase(p
, first
, last
)) == ERROR_OK
)
1141 command_print(cmd_ctx
, "successfully erased blocks %i to %i on NAND flash device '%s'", first
, last
, p
->device
->name
);
1143 else if (retval
== ERROR_NAND_OPERATION_FAILED
)
1145 command_print(cmd_ctx
, "erase failed");
1149 command_print(cmd_ctx
, "unknown error when erasing NAND flash device");
1154 command_print(cmd_ctx
, "NAND flash device '#%s' is out of bounds", args
[0]);
1160 int handle_nand_check_bad_blocks_command(struct command_context_s
*cmd_ctx
, char *cmd
, char **args
, int argc
)
1167 if ((argc
< 1) || (argc
> 3) || (argc
== 2))
1169 command_print(cmd_ctx
, "usage: nand check_bad_blocks <num> [<first> <last>]");
1175 first
= strtoul(args
[1], NULL
, 0);
1176 last
= strtoul(args
[2], NULL
, 0);
1179 p
= get_nand_device_by_num(strtoul(args
[0], NULL
, 0));
1182 if ((retval
= nand_build_bbt(p
, first
, last
)) == ERROR_OK
)
1184 command_print(cmd_ctx
, "checked NAND flash device for bad blocks, use \"nand info\" command to list blocks", p
->device
->name
);
1186 else if (retval
== ERROR_NAND_OPERATION_FAILED
)
1188 command_print(cmd_ctx
, "error when checking for bad blocks on NAND flash device");
1192 command_print(cmd_ctx
, "unknown error when checking for bad blocks on NAND flash device");
1197 command_print(cmd_ctx
, "NAND flash device '#%s' is out of bounds", args
[0]);
1203 int handle_nand_copy_command(struct command_context_s
*cmd_ctx
, char *cmd
, char **args
, int argc
)
1209 command_print(cmd_ctx
, "usage: nand copy <num> <offset> <length> <ram-address>");
1213 p
= get_nand_device_by_num(strtoul(args
[0], NULL
, 0));
1220 command_print(cmd_ctx
, "NAND flash device '#%s' is out of bounds", args
[0]);
1226 int handle_nand_write_command(struct command_context_s
*cmd_ctx
, char *cmd
, char **args
, int argc
)
1231 enum oob_formats oob_format
= NAND_OOB_NONE
;
1235 duration_t duration
;
1236 char *duration_text
;
1242 command_print(cmd_ctx
, "usage: nand write <num> <file> <offset> [options]");
1246 p
= get_nand_device_by_num(strtoul(args
[0], NULL
, 0));
1254 duration_start_measure(&duration
);
1255 offset
= strtoul(args
[2], NULL
, 0);
1260 for (i
= 3; i
< argc
; i
++)
1262 if (!strcmp(args
[i
], "oob_raw"))
1263 oob_format
|= NAND_OOB_RAW
;
1264 else if (!strcmp(args
[i
], "oob_only"))
1265 oob_format
|= NAND_OOB_RAW
| NAND_OOB_ONLY
;
1268 command_print(cmd_ctx
, "unknown option: %s", args
[i
]);
1273 if (fileio_open(&fileio
, args
[1], FILEIO_READ
, FILEIO_BINARY
) != ERROR_OK
)
1275 command_print(cmd_ctx
, "file open error: %s", fileio
.error_str
);
1279 buf_cnt
= binary_size
= fileio
.size
;
1281 if (!(oob_format
& NAND_OOB_ONLY
))
1283 page_size
= p
->page_size
;
1284 page
= malloc(p
->page_size
);
1287 if (oob_format
& NAND_OOB_RAW
)
1289 if (p
->page_size
== 512)
1291 else if (p
->page_size
== 2048)
1293 oob
= malloc(oob_size
);
1296 if (offset
% p
->page_size
)
1298 command_print(cmd_ctx
, "only page size aligned offsets and sizes are supported");
1308 fileio_read(&fileio
, page_size
, page
, &size_read
);
1309 buf_cnt
-= size_read
;
1310 if (size_read
< page_size
)
1312 memset(page
+ size_read
, 0xff, page_size
- size_read
);
1318 fileio_read(&fileio
, oob_size
, oob
, &size_read
);
1319 buf_cnt
-= size_read
;
1320 if (size_read
< oob_size
)
1322 memset(oob
+ size_read
, 0xff, oob_size
- size_read
);
1326 if (nand_write_page(p
, offset
/ p
->page_size
, page
, page_size
, oob
, oob_size
) != ERROR_OK
)
1328 command_print(cmd_ctx
, "failed writing file %s to NAND flash %s at offset 0x%8.8x",
1329 args
[1], args
[0], offset
);
1332 offset
+= page_size
;
1335 fileio_close(&fileio
);
1337 duration_stop_measure(&duration
, &duration_text
);
1338 command_print(cmd_ctx
, "wrote file %s to NAND flash %s at offset 0x%8.8x in %s",
1339 args
[1], args
[0], offset
, duration_text
);
1340 free(duration_text
);
1344 command_print(cmd_ctx
, "NAND flash device '#%s' is out of bounds", args
[0]);
1350 int handle_nand_dump_command(struct command_context_s
*cmd_ctx
, char *cmd
, char **args
, int argc
)
1356 command_print(cmd_ctx
, "usage: nand dump <num> <filename> <address> <size> [options]");
1360 p
= get_nand_device_by_num(strtoul(args
[0], NULL
, 0));
1366 duration_t duration
;
1367 char *duration_text
;
1374 u32 address
= strtoul(args
[2], NULL
, 0);
1375 u32 size
= strtoul(args
[3], NULL
, 0);
1377 enum oob_formats oob_format
= NAND_OOB_NONE
;
1382 for (i
= 4; i
< argc
; i
++)
1384 if (!strcmp(args
[i
], "oob_raw"))
1385 oob_format
|= NAND_OOB_RAW
;
1386 else if (!strcmp(args
[i
], "oob_only"))
1387 oob_format
|= NAND_OOB_RAW
| NAND_OOB_ONLY
;
1389 command_print(cmd_ctx
, "unknown option: '%s'", args
[i
]);
1393 if ((address
% p
->page_size
) || (size
% p
->page_size
))
1395 command_print(cmd_ctx
, "only page size aligned addresses and sizes are supported");
1399 if (!(oob_format
& NAND_OOB_ONLY
))
1401 page_size
= p
->page_size
;
1402 page
= malloc(p
->page_size
);
1405 if (oob_format
& NAND_OOB_RAW
)
1407 if (p
->page_size
== 512)
1409 else if (p
->page_size
== 2048)
1411 oob
= malloc(oob_size
);
1414 if (fileio_open(&fileio
, args
[1], FILEIO_WRITE
, FILEIO_BINARY
) != ERROR_OK
)
1416 command_print(cmd_ctx
, "dump_image error: %s", fileio
.error_str
);
1420 duration_start_measure(&duration
);
1425 if ((retval
= nand_read_page(p
, address
/ p
->page_size
, page
, page_size
, oob
, oob_size
)) != ERROR_OK
)
1427 command_print(cmd_ctx
, "reading NAND flash page failed");
1433 fileio_write(&fileio
, page_size
, page
, &size_written
);
1434 bytes_done
+= page_size
;
1439 fileio_write(&fileio
, oob_size
, oob
, &size_written
);
1440 bytes_done
+= oob_size
;
1443 size
-= p
->page_size
;
1444 address
+= p
->page_size
;
1453 fileio_close(&fileio
);
1455 duration_stop_measure(&duration
, &duration_text
);
1456 command_print(cmd_ctx
, "dumped %"PRIi64
" byte in %s", fileio
.size
, duration_text
);
1457 free(duration_text
);
1461 command_print(cmd_ctx
, "#%i: not probed");
1466 command_print(cmd_ctx
, "NAND flash device '#%s' is out of bounds", args
[0]);
1472 int handle_nand_raw_access_command(struct command_context_s
*cmd_ctx
, char *cmd
, char **args
, int argc
)
1476 if ((argc
< 1) || (argc
> 2))
1478 command_print(cmd_ctx
, "usage: nand raw_access <num> ['enable'|'disable']");
1482 p
= get_nand_device_by_num(strtoul(args
[0], NULL
, 0));
1489 if (strcmp("enable", args
[1]) == 0)
1493 else if (strcmp("disable", args
[1]) == 0)
1499 command_print(cmd_ctx
, "usage: nand raw_access ['enable'|disable']");
1503 command_print(cmd_ctx
, "raw access is %s", (p
->use_raw
) ? "enabled" : "disabled");
1507 command_print(cmd_ctx
, "#%i: not probed");
1512 command_print(cmd_ctx
, "NAND flash device '#%s' is out of bounds", args
[0]);
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