1 /***************************************************************************
2 * Copyright (C) 2007 by Dominic Rath *
3 * Dominic.Rath@gmx.de *
5 * Partially based on drivers/mtd/nand_ids.c from Linux. *
6 * Copyright (C) 2002 Thomas Gleixner <tglx@linutronix.de> *
8 * This program is free software; you can redistribute it and/or modify *
9 * it under the terms of the GNU General Public License as published by *
10 * the Free Software Foundation; either version 2 of the License, or *
11 * (at your option) any later version. *
13 * This program is distributed in the hope that it will be useful, *
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of *
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
16 * GNU General Public License for more details. *
18 * You should have received a copy of the GNU General Public License *
19 * along with this program; if not, write to the *
20 * Free Software Foundation, Inc., *
21 * 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. *
22 ***************************************************************************/
29 #include "time_support.h"
32 static int nand_read_page(struct nand_device
*nand
, uint32_t page
, uint8_t *data
, uint32_t data_size
, uint8_t *oob
, uint32_t oob_size
);
33 //static int nand_read_plain(struct nand_device *nand, uint32_t address, uint8_t *data, uint32_t data_size);
35 static int nand_write_page(struct nand_device
*nand
, uint32_t page
, uint8_t *data
, uint32_t data_size
, uint8_t *oob
, uint32_t oob_size
);
37 /* NAND flash controller
39 extern struct nand_flash_controller davinci_nand_controller
;
40 extern struct nand_flash_controller lpc3180_nand_controller
;
41 extern struct nand_flash_controller orion_nand_controller
;
42 extern struct nand_flash_controller s3c2410_nand_controller
;
43 extern struct nand_flash_controller s3c2412_nand_controller
;
44 extern struct nand_flash_controller s3c2440_nand_controller
;
45 extern struct nand_flash_controller s3c2443_nand_controller
;
46 extern struct nand_flash_controller imx31_nand_flash_controller
;
48 /* extern struct nand_flash_controller boundary_scan_nand_controller; */
50 static struct nand_flash_controller
*nand_flash_controllers
[] =
52 &davinci_nand_controller
,
53 &lpc3180_nand_controller
,
54 &orion_nand_controller
,
55 &s3c2410_nand_controller
,
56 &s3c2412_nand_controller
,
57 &s3c2440_nand_controller
,
58 &s3c2443_nand_controller
,
59 &imx31_nand_flash_controller
,
60 /* &boundary_scan_nand_controller, */
64 /* configured NAND devices and NAND Flash command handler */
65 static struct nand_device
*nand_devices
= NULL
;
66 static struct command
*nand_cmd
;
70 * Name, ID code, pagesize, chipsize in MegaByte, eraseblock size,
73 * Pagesize; 0, 256, 512
74 * 0 get this information from the extended chip ID
75 * 256 256 Byte page size
76 * 512 512 Byte page size
78 static struct nand_info nand_flash_ids
[] =
80 /* start "museum" IDs */
81 {"NAND 1MiB 5V 8-bit", 0x6e, 256, 1, 0x1000, 0},
82 {"NAND 2MiB 5V 8-bit", 0x64, 256, 2, 0x1000, 0},
83 {"NAND 4MiB 5V 8-bit", 0x6b, 512, 4, 0x2000, 0},
84 {"NAND 1MiB 3,3V 8-bit", 0xe8, 256, 1, 0x1000, 0},
85 {"NAND 1MiB 3,3V 8-bit", 0xec, 256, 1, 0x1000, 0},
86 {"NAND 2MiB 3,3V 8-bit", 0xea, 256, 2, 0x1000, 0},
87 {"NAND 4MiB 3,3V 8-bit", 0xd5, 512, 4, 0x2000, 0},
88 {"NAND 4MiB 3,3V 8-bit", 0xe3, 512, 4, 0x2000, 0},
89 {"NAND 4MiB 3,3V 8-bit", 0xe5, 512, 4, 0x2000, 0},
90 {"NAND 8MiB 3,3V 8-bit", 0xd6, 512, 8, 0x2000, 0},
92 {"NAND 8MiB 1,8V 8-bit", 0x39, 512, 8, 0x2000, 0},
93 {"NAND 8MiB 3,3V 8-bit", 0xe6, 512, 8, 0x2000, 0},
94 {"NAND 8MiB 1,8V 16-bit", 0x49, 512, 8, 0x2000, NAND_BUSWIDTH_16
},
95 {"NAND 8MiB 3,3V 16-bit", 0x59, 512, 8, 0x2000, NAND_BUSWIDTH_16
},
96 /* end "museum" IDs */
98 {"NAND 16MiB 1,8V 8-bit", 0x33, 512, 16, 0x4000, 0},
99 {"NAND 16MiB 3,3V 8-bit", 0x73, 512, 16, 0x4000, 0},
100 {"NAND 16MiB 1,8V 16-bit", 0x43, 512, 16, 0x4000, NAND_BUSWIDTH_16
},
101 {"NAND 16MiB 3,3V 16-bit", 0x53, 512, 16, 0x4000, NAND_BUSWIDTH_16
},
103 {"NAND 32MiB 1,8V 8-bit", 0x35, 512, 32, 0x4000, 0},
104 {"NAND 32MiB 3,3V 8-bit", 0x75, 512, 32, 0x4000, 0},
105 {"NAND 32MiB 1,8V 16-bit", 0x45, 512, 32, 0x4000, NAND_BUSWIDTH_16
},
106 {"NAND 32MiB 3,3V 16-bit", 0x55, 512, 32, 0x4000, NAND_BUSWIDTH_16
},
108 {"NAND 64MiB 1,8V 8-bit", 0x36, 512, 64, 0x4000, 0},
109 {"NAND 64MiB 3,3V 8-bit", 0x76, 512, 64, 0x4000, 0},
110 {"NAND 64MiB 1,8V 16-bit", 0x46, 512, 64, 0x4000, NAND_BUSWIDTH_16
},
111 {"NAND 64MiB 3,3V 16-bit", 0x56, 512, 64, 0x4000, NAND_BUSWIDTH_16
},
113 {"NAND 128MiB 1,8V 8-bit", 0x78, 512, 128, 0x4000, 0},
114 {"NAND 128MiB 1,8V 8-bit", 0x39, 512, 128, 0x4000, 0},
115 {"NAND 128MiB 3,3V 8-bit", 0x79, 512, 128, 0x4000, 0},
116 {"NAND 128MiB 1,8V 16-bit", 0x72, 512, 128, 0x4000, NAND_BUSWIDTH_16
},
117 {"NAND 128MiB 1,8V 16-bit", 0x49, 512, 128, 0x4000, NAND_BUSWIDTH_16
},
118 {"NAND 128MiB 3,3V 16-bit", 0x74, 512, 128, 0x4000, NAND_BUSWIDTH_16
},
119 {"NAND 128MiB 3,3V 16-bit", 0x59, 512, 128, 0x4000, NAND_BUSWIDTH_16
},
121 {"NAND 256MiB 3,3V 8-bit", 0x71, 512, 256, 0x4000, 0},
123 {"NAND 64MiB 1,8V 8-bit", 0xA2, 0, 64, 0, LP_OPTIONS
},
124 {"NAND 64MiB 3,3V 8-bit", 0xF2, 0, 64, 0, LP_OPTIONS
},
125 {"NAND 64MiB 1,8V 16-bit", 0xB2, 0, 64, 0, LP_OPTIONS16
},
126 {"NAND 64MiB 3,3V 16-bit", 0xC2, 0, 64, 0, LP_OPTIONS16
},
128 {"NAND 128MiB 1,8V 8-bit", 0xA1, 0, 128, 0, LP_OPTIONS
},
129 {"NAND 128MiB 3,3V 8-bit", 0xF1, 0, 128, 0, LP_OPTIONS
},
130 {"NAND 128MiB 1,8V 16-bit", 0xB1, 0, 128, 0, LP_OPTIONS16
},
131 {"NAND 128MiB 3,3V 16-bit", 0xC1, 0, 128, 0, LP_OPTIONS16
},
133 {"NAND 256MiB 1,8V 8-bit", 0xAA, 0, 256, 0, LP_OPTIONS
},
134 {"NAND 256MiB 3,3V 8-bit", 0xDA, 0, 256, 0, LP_OPTIONS
},
135 {"NAND 256MiB 1,8V 16-bit", 0xBA, 0, 256, 0, LP_OPTIONS16
},
136 {"NAND 256MiB 3,3V 16-bit", 0xCA, 0, 256, 0, LP_OPTIONS16
},
138 {"NAND 512MiB 1,8V 8-bit", 0xAC, 0, 512, 0, LP_OPTIONS
},
139 {"NAND 512MiB 3,3V 8-bit", 0xDC, 0, 512, 0, LP_OPTIONS
},
140 {"NAND 512MiB 1,8V 16-bit", 0xBC, 0, 512, 0, LP_OPTIONS16
},
141 {"NAND 512MiB 3,3V 16-bit", 0xCC, 0, 512, 0, LP_OPTIONS16
},
143 {"NAND 1GiB 1,8V 8-bit", 0xA3, 0, 1024, 0, LP_OPTIONS
},
144 {"NAND 1GiB 3,3V 8-bit", 0xD3, 0, 1024, 0, LP_OPTIONS
},
145 {"NAND 1GiB 1,8V 16-bit", 0xB3, 0, 1024, 0, LP_OPTIONS16
},
146 {"NAND 1GiB 3,3V 16-bit", 0xC3, 0, 1024, 0, LP_OPTIONS16
},
148 {"NAND 2GiB 1,8V 8-bit", 0xA5, 0, 2048, 0, LP_OPTIONS
},
149 {"NAND 2GiB 3,3V 8-bit", 0xD5, 0, 2048, 0, LP_OPTIONS
},
150 {"NAND 2GiB 1,8V 16-bit", 0xB5, 0, 2048, 0, LP_OPTIONS16
},
151 {"NAND 2GiB 3,3V 16-bit", 0xC5, 0, 2048, 0, LP_OPTIONS16
},
153 {NULL
, 0, 0, 0, 0, 0 }
156 /* Manufacturer ID list
158 static struct nand_manufacturer nand_manuf_ids
[] =
161 {NAND_MFR_TOSHIBA
, "Toshiba"},
162 {NAND_MFR_SAMSUNG
, "Samsung"},
163 {NAND_MFR_FUJITSU
, "Fujitsu"},
164 {NAND_MFR_NATIONAL
, "National"},
165 {NAND_MFR_RENESAS
, "Renesas"},
166 {NAND_MFR_STMICRO
, "ST Micro"},
167 {NAND_MFR_HYNIX
, "Hynix"},
168 {NAND_MFR_MICRON
, "Micron"},
173 * Define default oob placement schemes for large and small page devices
177 static struct nand_ecclayout nand_oob_8
= {
188 static struct nand_ecclayout nand_oob_16
= {
190 .eccpos
= {0, 1, 2, 3, 6, 7},
196 static struct nand_ecclayout nand_oob_64
= {
199 40, 41, 42, 43, 44, 45, 46, 47,
200 48, 49, 50, 51, 52, 53, 54, 55,
201 56, 57, 58, 59, 60, 61, 62, 63},
207 COMMAND_HANDLER(handle_nand_list_drivers
)
209 command_print(CMD_CTX
, "Available NAND flash controller drivers:");
210 for (unsigned i
= 0; nand_flash_controllers
[i
]; i
++)
211 command_print(CMD_CTX
, " %s", nand_flash_controllers
[i
]->name
);
215 static COMMAND_HELPER(create_nand_device
, const char *bank_name
,
216 struct nand_flash_controller
*controller
)
218 int retval
= controller
->register_commands(CMD_CTX
);
219 if (ERROR_OK
!= retval
)
221 LOG_ERROR("couldn't register '%s' commands", controller
->name
);
224 struct nand_device
*c
= malloc(sizeof(struct nand_device
));
226 c
->name
= strdup(bank_name
);
227 c
->controller
= controller
;
228 c
->controller_priv
= NULL
;
229 c
->manufacturer
= NULL
;
232 c
->address_cycles
= 0;
237 retval
= CALL_COMMAND_HANDLER(controller
->nand_device_command
, c
);
238 if (ERROR_OK
!= retval
)
240 LOG_ERROR("'%s' driver rejected nand flash", controller
->name
);
246 struct nand_device
*p
= nand_devices
;
247 while (p
&& p
->next
) p
= p
->next
;
255 COMMAND_HANDLER(handle_nand_device_command
)
259 LOG_ERROR("incomplete nand device configuration");
260 return ERROR_FLASH_BANK_INVALID
;
263 // save name and increment (for compatibility) with drivers
264 const char *bank_name
= *CMD_ARGV
++;
267 const char *driver_name
= CMD_ARGV
[0];
268 for (unsigned i
= 0; nand_flash_controllers
[i
]; i
++)
270 struct nand_flash_controller
*controller
= nand_flash_controllers
[i
];
271 if (strcmp(driver_name
, controller
->name
) != 0)
274 return CALL_COMMAND_HANDLER(create_nand_device
,
275 bank_name
, controller
);
278 LOG_ERROR("No valid NAND flash driver found (%s)", driver_name
);
279 return CALL_COMMAND_HANDLER(handle_nand_list_drivers
);
282 int nand_register_commands(struct command_context
*cmd_ctx
)
284 nand_cmd
= COMMAND_REGISTER(cmd_ctx
, NULL
, "nand",
285 NULL
, COMMAND_ANY
, "NAND specific commands");
287 COMMAND_REGISTER(cmd_ctx
, nand_cmd
, "device",
288 &handle_nand_device_command
, COMMAND_CONFIG
,
289 "defines a new NAND bank");
290 COMMAND_REGISTER(cmd_ctx
, nand_cmd
, "drivers",
291 &handle_nand_list_drivers
, COMMAND_ANY
,
292 "lists available NAND drivers");
297 struct nand_device
*get_nand_device_by_name(const char *name
)
299 unsigned requested
= get_flash_name_index(name
);
302 struct nand_device
*nand
;
303 for (nand
= nand_devices
; NULL
!= nand
; nand
= nand
->next
)
305 if (strcmp(nand
->name
, name
) == 0)
307 if (!flash_driver_name_matches(nand
->controller
->name
, name
))
309 if (++found
< requested
)
316 struct nand_device
*get_nand_device_by_num(int num
)
318 struct nand_device
*p
;
321 for (p
= nand_devices
; p
; p
= p
->next
)
332 COMMAND_HELPER(nand_command_get_device
, unsigned name_index
,
333 struct nand_device
**nand
)
335 const char *str
= CMD_ARGV
[name_index
];
336 *nand
= get_nand_device_by_name(str
);
341 COMMAND_PARSE_NUMBER(uint
, str
, num
);
342 *nand
= get_nand_device_by_num(num
);
344 command_print(CMD_CTX
, "NAND flash device '%s' not found", str
);
345 return ERROR_INVALID_ARGUMENTS
;
350 static int nand_build_bbt(struct nand_device
*nand
, int first
, int last
)
356 if ((first
< 0) || (first
>= nand
->num_blocks
))
359 if ((last
>= nand
->num_blocks
) || (last
== -1))
360 last
= nand
->num_blocks
- 1;
362 for (i
= first
; i
< last
; i
++)
364 nand_read_page(nand
, page
, NULL
, 0, oob
, 6);
366 if (((nand
->device
->options
& NAND_BUSWIDTH_16
) && ((oob
[0] & oob
[1]) != 0xff))
367 || (((nand
->page_size
== 512) && (oob
[5] != 0xff)) ||
368 ((nand
->page_size
== 2048) && (oob
[0] != 0xff))))
370 LOG_WARNING("bad block: %i", i
);
371 nand
->blocks
[i
].is_bad
= 1;
375 nand
->blocks
[i
].is_bad
= 0;
378 page
+= (nand
->erase_size
/ nand
->page_size
);
384 int nand_read_status(struct nand_device
*nand
, uint8_t *status
)
387 return ERROR_NAND_DEVICE_NOT_PROBED
;
389 /* Send read status command */
390 nand
->controller
->command(nand
, NAND_CMD_STATUS
);
395 if (nand
->device
->options
& NAND_BUSWIDTH_16
)
398 nand
->controller
->read_data(nand
, &data
);
399 *status
= data
& 0xff;
403 nand
->controller
->read_data(nand
, status
);
409 static int nand_poll_ready(struct nand_device
*nand
, int timeout
)
413 nand
->controller
->command(nand
, NAND_CMD_STATUS
);
415 if (nand
->device
->options
& NAND_BUSWIDTH_16
) {
417 nand
->controller
->read_data(nand
, &data
);
418 status
= data
& 0xff;
420 nand
->controller
->read_data(nand
, &status
);
422 if (status
& NAND_STATUS_READY
)
427 return (status
& NAND_STATUS_READY
) != 0;
430 int nand_probe(struct nand_device
*nand
)
432 uint8_t manufacturer_id
, device_id
;
437 /* clear device data */
439 nand
->manufacturer
= NULL
;
441 /* clear device parameters */
443 nand
->address_cycles
= 0;
445 nand
->erase_size
= 0;
447 /* initialize controller (device parameters are zero, use controller default) */
448 if ((retval
= nand
->controller
->init(nand
) != ERROR_OK
))
452 case ERROR_NAND_OPERATION_FAILED
:
453 LOG_DEBUG("controller initialization failed");
454 return ERROR_NAND_OPERATION_FAILED
;
455 case ERROR_NAND_OPERATION_NOT_SUPPORTED
:
456 LOG_ERROR("BUG: controller reported that it doesn't support default parameters");
457 return ERROR_NAND_OPERATION_FAILED
;
459 LOG_ERROR("BUG: unknown controller initialization failure");
460 return ERROR_NAND_OPERATION_FAILED
;
464 nand
->controller
->command(nand
, NAND_CMD_RESET
);
465 nand
->controller
->reset(nand
);
467 nand
->controller
->command(nand
, NAND_CMD_READID
);
468 nand
->controller
->address(nand
, 0x0);
470 if (nand
->bus_width
== 8)
472 nand
->controller
->read_data(nand
, &manufacturer_id
);
473 nand
->controller
->read_data(nand
, &device_id
);
478 nand
->controller
->read_data(nand
, &data_buf
);
479 manufacturer_id
= data_buf
& 0xff;
480 nand
->controller
->read_data(nand
, &data_buf
);
481 device_id
= data_buf
& 0xff;
484 for (i
= 0; nand_flash_ids
[i
].name
; i
++)
486 if (nand_flash_ids
[i
].id
== device_id
)
488 nand
->device
= &nand_flash_ids
[i
];
493 for (i
= 0; nand_manuf_ids
[i
].name
; i
++)
495 if (nand_manuf_ids
[i
].id
== manufacturer_id
)
497 nand
->manufacturer
= &nand_manuf_ids
[i
];
502 if (!nand
->manufacturer
)
504 nand
->manufacturer
= &nand_manuf_ids
[0];
505 nand
->manufacturer
->id
= manufacturer_id
;
510 LOG_ERROR("unknown NAND flash device found, manufacturer id: 0x%2.2x device id: 0x%2.2x",
511 manufacturer_id
, device_id
);
512 return ERROR_NAND_OPERATION_FAILED
;
515 LOG_DEBUG("found %s (%s)", nand
->device
->name
, nand
->manufacturer
->name
);
517 /* initialize device parameters */
520 if (nand
->device
->options
& NAND_BUSWIDTH_16
)
521 nand
->bus_width
= 16;
525 /* Do we need extended device probe information? */
526 if (nand
->device
->page_size
== 0 ||
527 nand
->device
->erase_size
== 0)
529 if (nand
->bus_width
== 8)
531 nand
->controller
->read_data(nand
, id_buff
+ 3);
532 nand
->controller
->read_data(nand
, id_buff
+ 4);
533 nand
->controller
->read_data(nand
, id_buff
+ 5);
539 nand
->controller
->read_data(nand
, &data_buf
);
540 id_buff
[3] = data_buf
;
542 nand
->controller
->read_data(nand
, &data_buf
);
543 id_buff
[4] = data_buf
;
545 nand
->controller
->read_data(nand
, &data_buf
);
546 id_buff
[5] = data_buf
>> 8;
551 if (nand
->device
->page_size
== 0)
553 nand
->page_size
= 1 << (10 + (id_buff
[4] & 3));
555 else if (nand
->device
->page_size
== 256)
557 LOG_ERROR("NAND flashes with 256 byte pagesize are not supported");
558 return ERROR_NAND_OPERATION_FAILED
;
562 nand
->page_size
= nand
->device
->page_size
;
565 /* number of address cycles */
566 if (nand
->page_size
<= 512)
568 /* small page devices */
569 if (nand
->device
->chip_size
<= 32)
570 nand
->address_cycles
= 3;
571 else if (nand
->device
->chip_size
<= 8*1024)
572 nand
->address_cycles
= 4;
575 LOG_ERROR("BUG: small page NAND device with more than 8 GiB encountered");
576 nand
->address_cycles
= 5;
581 /* large page devices */
582 if (nand
->device
->chip_size
<= 128)
583 nand
->address_cycles
= 4;
584 else if (nand
->device
->chip_size
<= 32*1024)
585 nand
->address_cycles
= 5;
588 LOG_ERROR("BUG: large page NAND device with more than 32 GiB encountered");
589 nand
->address_cycles
= 6;
594 if (nand
->device
->erase_size
== 0)
596 switch ((id_buff
[4] >> 4) & 3) {
598 nand
->erase_size
= 64 << 10;
601 nand
->erase_size
= 128 << 10;
604 nand
->erase_size
= 256 << 10;
607 nand
->erase_size
=512 << 10;
613 nand
->erase_size
= nand
->device
->erase_size
;
616 /* initialize controller, but leave parameters at the controllers default */
617 if ((retval
= nand
->controller
->init(nand
) != ERROR_OK
))
621 case ERROR_NAND_OPERATION_FAILED
:
622 LOG_DEBUG("controller initialization failed");
623 return ERROR_NAND_OPERATION_FAILED
;
624 case ERROR_NAND_OPERATION_NOT_SUPPORTED
:
625 LOG_ERROR("controller doesn't support requested parameters (buswidth: %i, address cycles: %i, page size: %i)",
626 nand
->bus_width
, nand
->address_cycles
, nand
->page_size
);
627 return ERROR_NAND_OPERATION_FAILED
;
629 LOG_ERROR("BUG: unknown controller initialization failure");
630 return ERROR_NAND_OPERATION_FAILED
;
634 nand
->num_blocks
= (nand
->device
->chip_size
* 1024) / (nand
->erase_size
/ 1024);
635 nand
->blocks
= malloc(sizeof(struct nand_block
) * nand
->num_blocks
);
637 for (i
= 0; i
< nand
->num_blocks
; i
++)
639 nand
->blocks
[i
].size
= nand
->erase_size
;
640 nand
->blocks
[i
].offset
= i
* nand
->erase_size
;
641 nand
->blocks
[i
].is_erased
= -1;
642 nand
->blocks
[i
].is_bad
= -1;
648 static int nand_erase(struct nand_device
*nand
, int first_block
, int last_block
)
656 return ERROR_NAND_DEVICE_NOT_PROBED
;
658 if ((first_block
< 0) || (last_block
> nand
->num_blocks
))
659 return ERROR_INVALID_ARGUMENTS
;
661 /* make sure we know if a block is bad before erasing it */
662 for (i
= first_block
; i
<= last_block
; i
++)
664 if (nand
->blocks
[i
].is_bad
== -1)
666 nand_build_bbt(nand
, i
, last_block
);
671 for (i
= first_block
; i
<= last_block
; i
++)
673 /* Send erase setup command */
674 nand
->controller
->command(nand
, NAND_CMD_ERASE1
);
676 page
= i
* (nand
->erase_size
/ nand
->page_size
);
678 /* Send page address */
679 if (nand
->page_size
<= 512)
682 nand
->controller
->address(nand
, page
& 0xff);
683 nand
->controller
->address(nand
, (page
>> 8) & 0xff);
685 /* 3rd cycle only on devices with more than 32 MiB */
686 if (nand
->address_cycles
>= 4)
687 nand
->controller
->address(nand
, (page
>> 16) & 0xff);
689 /* 4th cycle only on devices with more than 8 GiB */
690 if (nand
->address_cycles
>= 5)
691 nand
->controller
->address(nand
, (page
>> 24) & 0xff);
696 nand
->controller
->address(nand
, page
& 0xff);
697 nand
->controller
->address(nand
, (page
>> 8) & 0xff);
699 /* 3rd cycle only on devices with more than 128 MiB */
700 if (nand
->address_cycles
>= 5)
701 nand
->controller
->address(nand
, (page
>> 16) & 0xff);
704 /* Send erase confirm command */
705 nand
->controller
->command(nand
, NAND_CMD_ERASE2
);
707 retval
= nand
->controller
->nand_ready
?
708 nand
->controller
->nand_ready(nand
, 1000) :
709 nand_poll_ready(nand
, 1000);
711 LOG_ERROR("timeout waiting for NAND flash block erase to complete");
712 return ERROR_NAND_OPERATION_TIMEOUT
;
715 if ((retval
= nand_read_status(nand
, &status
)) != ERROR_OK
)
717 LOG_ERROR("couldn't read status");
718 return ERROR_NAND_OPERATION_FAILED
;
723 LOG_ERROR("didn't erase %sblock %d; status: 0x%2.2x",
724 (nand
->blocks
[i
].is_bad
== 1)
727 /* continue; other blocks might still be erasable */
730 nand
->blocks
[i
].is_erased
= 1;
737 static int nand_read_plain(struct nand_device
*nand
, uint32_t address
, uint8_t *data
, uint32_t data_size
)
742 return ERROR_NAND_DEVICE_NOT_PROBED
;
744 if (address
% nand
->page_size
)
746 LOG_ERROR("reads need to be page aligned");
747 return ERROR_NAND_OPERATION_FAILED
;
750 page
= malloc(nand
->page_size
);
752 while (data_size
> 0)
754 uint32_t thisrun_size
= (data_size
> nand
->page_size
) ? nand
->page_size
: data_size
;
755 uint32_t page_address
;
758 page_address
= address
/ nand
->page_size
;
760 nand_read_page(nand
, page_address
, page
, nand
->page_size
, NULL
, 0);
762 memcpy(data
, page
, thisrun_size
);
764 address
+= thisrun_size
;
765 data
+= thisrun_size
;
766 data_size
-= thisrun_size
;
774 static int nand_write_plain(struct nand_device
*nand
, uint32_t address
, uint8_t *data
, uint32_t data_size
)
779 return ERROR_NAND_DEVICE_NOT_PROBED
;
781 if (address
% nand
->page_size
)
783 LOG_ERROR("writes need to be page aligned");
784 return ERROR_NAND_OPERATION_FAILED
;
787 page
= malloc(nand
->page_size
);
789 while (data_size
> 0)
791 uint32_t thisrun_size
= (data_size
> nand
->page_size
) ? nand
->page_size
: data_size
;
792 uint32_t page_address
;
794 memset(page
, 0xff, nand
->page_size
);
795 memcpy(page
, data
, thisrun_size
);
797 page_address
= address
/ nand
->page_size
;
799 nand_write_page(nand
, page_address
, page
, nand
->page_size
, NULL
, 0);
801 address
+= thisrun_size
;
802 data
+= thisrun_size
;
803 data_size
-= thisrun_size
;
812 int nand_write_page(struct nand_device
*nand
, uint32_t page
, uint8_t *data
, uint32_t data_size
, uint8_t *oob
, uint32_t oob_size
)
817 return ERROR_NAND_DEVICE_NOT_PROBED
;
819 block
= page
/ (nand
->erase_size
/ nand
->page_size
);
820 if (nand
->blocks
[block
].is_erased
== 1)
821 nand
->blocks
[block
].is_erased
= 0;
823 if (nand
->use_raw
|| nand
->controller
->write_page
== NULL
)
824 return nand_write_page_raw(nand
, page
, data
, data_size
, oob
, oob_size
);
826 return nand
->controller
->write_page(nand
, page
, data
, data_size
, oob
, oob_size
);
829 static int nand_read_page(struct nand_device
*nand
, uint32_t page
, uint8_t *data
, uint32_t data_size
, uint8_t *oob
, uint32_t oob_size
)
832 return ERROR_NAND_DEVICE_NOT_PROBED
;
834 if (nand
->use_raw
|| nand
->controller
->read_page
== NULL
)
835 return nand_read_page_raw(nand
, page
, data
, data_size
, oob
, oob_size
);
837 return nand
->controller
->read_page(nand
, page
, data
, data_size
, oob
, oob_size
);
840 int nand_read_page_raw(struct nand_device
*nand
, uint32_t page
, uint8_t *data
, uint32_t data_size
, uint8_t *oob
, uint32_t oob_size
)
845 return ERROR_NAND_DEVICE_NOT_PROBED
;
847 if (nand
->page_size
<= 512)
849 /* small page device */
851 nand
->controller
->command(nand
, NAND_CMD_READ0
);
853 nand
->controller
->command(nand
, NAND_CMD_READOOB
);
855 /* column (always 0, we start at the beginning of a page/OOB area) */
856 nand
->controller
->address(nand
, 0x0);
859 nand
->controller
->address(nand
, page
& 0xff);
860 nand
->controller
->address(nand
, (page
>> 8) & 0xff);
862 /* 4th cycle only on devices with more than 32 MiB */
863 if (nand
->address_cycles
>= 4)
864 nand
->controller
->address(nand
, (page
>> 16) & 0xff);
866 /* 5th cycle only on devices with more than 8 GiB */
867 if (nand
->address_cycles
>= 5)
868 nand
->controller
->address(nand
, (page
>> 24) & 0xff);
872 /* large page device */
873 nand
->controller
->command(nand
, NAND_CMD_READ0
);
875 /* column (0 when we start at the beginning of a page,
876 * or 2048 for the beginning of OOB area)
878 nand
->controller
->address(nand
, 0x0);
880 nand
->controller
->address(nand
, 0x0);
882 nand
->controller
->address(nand
, 0x8);
885 nand
->controller
->address(nand
, page
& 0xff);
886 nand
->controller
->address(nand
, (page
>> 8) & 0xff);
888 /* 5th cycle only on devices with more than 128 MiB */
889 if (nand
->address_cycles
>= 5)
890 nand
->controller
->address(nand
, (page
>> 16) & 0xff);
892 /* large page devices need a start command */
893 nand
->controller
->command(nand
, NAND_CMD_READSTART
);
896 if (nand
->controller
->nand_ready
) {
897 if (!nand
->controller
->nand_ready(nand
, 100))
898 return ERROR_NAND_OPERATION_TIMEOUT
;
905 if (nand
->controller
->read_block_data
!= NULL
)
906 (nand
->controller
->read_block_data
)(nand
, data
, data_size
);
909 for (i
= 0; i
< data_size
;)
911 if (nand
->device
->options
& NAND_BUSWIDTH_16
)
913 nand
->controller
->read_data(nand
, data
);
919 nand
->controller
->read_data(nand
, data
);
929 if (nand
->controller
->read_block_data
!= NULL
)
930 (nand
->controller
->read_block_data
)(nand
, oob
, oob_size
);
933 for (i
= 0; i
< oob_size
;)
935 if (nand
->device
->options
& NAND_BUSWIDTH_16
)
937 nand
->controller
->read_data(nand
, oob
);
943 nand
->controller
->read_data(nand
, oob
);
954 int nand_write_page_raw(struct nand_device
*nand
, uint32_t page
, uint8_t *data
, uint32_t data_size
, uint8_t *oob
, uint32_t oob_size
)
961 return ERROR_NAND_DEVICE_NOT_PROBED
;
963 nand
->controller
->command(nand
, NAND_CMD_SEQIN
);
965 if (nand
->page_size
<= 512)
967 /* column (always 0, we start at the beginning of a page/OOB area) */
968 nand
->controller
->address(nand
, 0x0);
971 nand
->controller
->address(nand
, page
& 0xff);
972 nand
->controller
->address(nand
, (page
>> 8) & 0xff);
974 /* 4th cycle only on devices with more than 32 MiB */
975 if (nand
->address_cycles
>= 4)
976 nand
->controller
->address(nand
, (page
>> 16) & 0xff);
978 /* 5th cycle only on devices with more than 8 GiB */
979 if (nand
->address_cycles
>= 5)
980 nand
->controller
->address(nand
, (page
>> 24) & 0xff);
984 /* column (0 when we start at the beginning of a page,
985 * or 2048 for the beginning of OOB area)
987 nand
->controller
->address(nand
, 0x0);
989 nand
->controller
->address(nand
, 0x0);
991 nand
->controller
->address(nand
, 0x8);
994 nand
->controller
->address(nand
, page
& 0xff);
995 nand
->controller
->address(nand
, (page
>> 8) & 0xff);
997 /* 5th cycle only on devices with more than 128 MiB */
998 if (nand
->address_cycles
>= 5)
999 nand
->controller
->address(nand
, (page
>> 16) & 0xff);
1004 if (nand
->controller
->write_block_data
!= NULL
)
1005 (nand
->controller
->write_block_data
)(nand
, data
, data_size
);
1008 for (i
= 0; i
< data_size
;)
1010 if (nand
->device
->options
& NAND_BUSWIDTH_16
)
1012 uint16_t data_buf
= le_to_h_u16(data
);
1013 nand
->controller
->write_data(nand
, data_buf
);
1019 nand
->controller
->write_data(nand
, *data
);
1029 if (nand
->controller
->write_block_data
!= NULL
)
1030 (nand
->controller
->write_block_data
)(nand
, oob
, oob_size
);
1033 for (i
= 0; i
< oob_size
;)
1035 if (nand
->device
->options
& NAND_BUSWIDTH_16
)
1037 uint16_t oob_buf
= le_to_h_u16(data
);
1038 nand
->controller
->write_data(nand
, oob_buf
);
1044 nand
->controller
->write_data(nand
, *oob
);
1052 nand
->controller
->command(nand
, NAND_CMD_PAGEPROG
);
1054 retval
= nand
->controller
->nand_ready
?
1055 nand
->controller
->nand_ready(nand
, 100) :
1056 nand_poll_ready(nand
, 100);
1058 return ERROR_NAND_OPERATION_TIMEOUT
;
1060 if ((retval
= nand_read_status(nand
, &status
)) != ERROR_OK
)
1062 LOG_ERROR("couldn't read status");
1063 return ERROR_NAND_OPERATION_FAILED
;
1066 if (status
& NAND_STATUS_FAIL
)
1068 LOG_ERROR("write operation didn't pass, status: 0x%2.2x", status
);
1069 return ERROR_NAND_OPERATION_FAILED
;
1075 COMMAND_HANDLER(handle_nand_list_command
)
1077 struct nand_device
*p
;
1082 command_print(CMD_CTX
, "no NAND flash devices configured");
1086 for (p
= nand_devices
, i
= 0; p
; p
= p
->next
, i
++)
1089 command_print(CMD_CTX
, "#%i: %s (%s) "
1090 "pagesize: %i, buswidth: %i,\n\t"
1091 "blocksize: %i, blocks: %i",
1092 i
, p
->device
->name
, p
->manufacturer
->name
,
1093 p
->page_size
, p
->bus_width
,
1094 p
->erase_size
, p
->num_blocks
);
1096 command_print(CMD_CTX
, "#%i: not probed", i
);
1102 COMMAND_HANDLER(handle_nand_info_command
)
1109 struct nand_device
*p
;
1110 int retval
= CALL_COMMAND_HANDLER(nand_command_get_device
, 0, &p
);
1111 if (ERROR_OK
!= retval
)
1116 return ERROR_COMMAND_SYNTAX_ERROR
;
1122 COMMAND_PARSE_NUMBER(int, CMD_ARGV
[1], i
);
1127 COMMAND_PARSE_NUMBER(int, CMD_ARGV
[1], first
);
1128 COMMAND_PARSE_NUMBER(int, CMD_ARGV
[2], last
);
1132 if (NULL
== p
->device
)
1134 command_print(CMD_CTX
, "#%s: not probed", CMD_ARGV
[0]);
1138 if (first
>= p
->num_blocks
)
1139 first
= p
->num_blocks
- 1;
1141 if (last
>= p
->num_blocks
)
1142 last
= p
->num_blocks
- 1;
1144 command_print(CMD_CTX
, "#%i: %s (%s) pagesize: %i, buswidth: %i, erasesize: %i",
1145 i
++, p
->device
->name
, p
->manufacturer
->name
, p
->page_size
, p
->bus_width
, p
->erase_size
);
1147 for (j
= first
; j
<= last
; j
++)
1149 char *erase_state
, *bad_state
;
1151 if (p
->blocks
[j
].is_erased
== 0)
1152 erase_state
= "not erased";
1153 else if (p
->blocks
[j
].is_erased
== 1)
1154 erase_state
= "erased";
1156 erase_state
= "erase state unknown";
1158 if (p
->blocks
[j
].is_bad
== 0)
1160 else if (p
->blocks
[j
].is_bad
== 1)
1161 bad_state
= " (marked bad)";
1163 bad_state
= " (block condition unknown)";
1165 command_print(CMD_CTX
,
1166 "\t#%i: 0x%8.8" PRIx32
" (%" PRId32
"kB) %s%s",
1168 p
->blocks
[j
].offset
,
1169 p
->blocks
[j
].size
/ 1024,
1177 COMMAND_HANDLER(handle_nand_probe_command
)
1181 return ERROR_COMMAND_SYNTAX_ERROR
;
1184 struct nand_device
*p
;
1185 int retval
= CALL_COMMAND_HANDLER(nand_command_get_device
, 0, &p
);
1186 if (ERROR_OK
!= retval
)
1189 if ((retval
= nand_probe(p
)) == ERROR_OK
)
1191 command_print(CMD_CTX
, "NAND flash device '%s' found", p
->device
->name
);
1193 else if (retval
== ERROR_NAND_OPERATION_FAILED
)
1195 command_print(CMD_CTX
, "probing failed for NAND flash device");
1199 command_print(CMD_CTX
, "unknown error when probing NAND flash device");
1205 COMMAND_HANDLER(handle_nand_erase_command
)
1207 if (CMD_ARGC
!= 1 && CMD_ARGC
!= 3)
1209 return ERROR_COMMAND_SYNTAX_ERROR
;
1213 struct nand_device
*p
;
1214 int retval
= CALL_COMMAND_HANDLER(nand_command_get_device
, 0, &p
);
1215 if (ERROR_OK
!= retval
)
1218 unsigned long offset
;
1219 unsigned long length
;
1221 /* erase specified part of the chip; or else everything */
1222 if (CMD_ARGC
== 3) {
1223 unsigned long size
= p
->erase_size
* p
->num_blocks
;
1225 COMMAND_PARSE_NUMBER(ulong
, CMD_ARGV
[1], offset
);
1226 if ((offset
% p
->erase_size
) != 0 || offset
>= size
)
1227 return ERROR_INVALID_ARGUMENTS
;
1229 COMMAND_PARSE_NUMBER(ulong
, CMD_ARGV
[2], length
);
1230 if ((length
== 0) || (length
% p
->erase_size
) != 0
1231 || (length
+ offset
) > size
)
1232 return ERROR_INVALID_ARGUMENTS
;
1234 offset
/= p
->erase_size
;
1235 length
/= p
->erase_size
;
1238 length
= p
->num_blocks
;
1241 retval
= nand_erase(p
, offset
, offset
+ length
- 1);
1242 if (retval
== ERROR_OK
)
1244 command_print(CMD_CTX
, "erased blocks %lu to %lu "
1245 "on NAND flash device #%s '%s'",
1246 offset
, offset
+ length
,
1247 CMD_ARGV
[0], p
->device
->name
);
1249 else if (retval
== ERROR_NAND_OPERATION_FAILED
)
1251 command_print(CMD_CTX
, "erase failed");
1255 command_print(CMD_CTX
, "unknown error when erasing NAND flash device");
1261 COMMAND_HANDLER(handle_nand_check_bad_blocks_command
)
1266 if ((CMD_ARGC
< 1) || (CMD_ARGC
> 3) || (CMD_ARGC
== 2))
1268 return ERROR_COMMAND_SYNTAX_ERROR
;
1272 struct nand_device
*p
;
1273 int retval
= CALL_COMMAND_HANDLER(nand_command_get_device
, 0, &p
);
1274 if (ERROR_OK
!= retval
)
1279 unsigned long offset
;
1280 unsigned long length
;
1282 COMMAND_PARSE_NUMBER(ulong
, CMD_ARGV
[1], offset
);
1283 if (offset
% p
->erase_size
)
1284 return ERROR_INVALID_ARGUMENTS
;
1285 offset
/= p
->erase_size
;
1287 COMMAND_PARSE_NUMBER(ulong
, CMD_ARGV
[2], length
);
1288 if (length
% p
->erase_size
)
1289 return ERROR_INVALID_ARGUMENTS
;
1292 length
/= p
->erase_size
;
1295 last
= offset
+ length
;
1298 retval
= nand_build_bbt(p
, first
, last
);
1299 if (retval
== ERROR_OK
)
1301 command_print(CMD_CTX
, "checked NAND flash device for bad blocks, "
1302 "use \"nand info\" command to list blocks");
1304 else if (retval
== ERROR_NAND_OPERATION_FAILED
)
1306 command_print(CMD_CTX
, "error when checking for bad blocks on "
1307 "NAND flash device");
1311 command_print(CMD_CTX
, "unknown error when checking for bad "
1312 "blocks on NAND flash device");
1318 struct nand_fileio_state
{
1325 enum oob_formats oob_format
;
1332 struct fileio fileio
;
1334 struct duration bench
;
1337 static void nand_fileio_init(struct nand_fileio_state
*state
)
1339 memset(state
, 0, sizeof(*state
));
1340 state
->oob_format
= NAND_OOB_NONE
;
1343 static int nand_fileio_start(struct command_context
*cmd_ctx
,
1344 struct nand_device
*nand
, const char *filename
, int filemode
,
1345 struct nand_fileio_state
*state
)
1347 if (state
->address
% nand
->page_size
)
1349 command_print(cmd_ctx
, "only page-aligned addresses are supported");
1350 return ERROR_COMMAND_SYNTAX_ERROR
;
1353 duration_start(&state
->bench
);
1355 if (NULL
!= filename
)
1357 int retval
= fileio_open(&state
->fileio
, filename
, filemode
, FILEIO_BINARY
);
1358 if (ERROR_OK
!= retval
)
1360 const char *msg
= (FILEIO_READ
== filemode
) ? "read" : "write";
1361 command_print(cmd_ctx
, "failed to open '%s' for %s access",
1365 state
->file_opened
= true;
1368 if (!(state
->oob_format
& NAND_OOB_ONLY
))
1370 state
->page_size
= nand
->page_size
;
1371 state
->page
= malloc(nand
->page_size
);
1374 if (state
->oob_format
& (NAND_OOB_RAW
| NAND_OOB_SW_ECC
| NAND_OOB_SW_ECC_KW
))
1376 if (nand
->page_size
== 512)
1378 state
->oob_size
= 16;
1379 state
->eccpos
= nand_oob_16
.eccpos
;
1381 else if (nand
->page_size
== 2048)
1383 state
->oob_size
= 64;
1384 state
->eccpos
= nand_oob_64
.eccpos
;
1386 state
->oob
= malloc(state
->oob_size
);
1391 static int nand_fileio_cleanup(struct nand_fileio_state
*state
)
1393 if (state
->file_opened
)
1394 fileio_close(&state
->fileio
);
1408 static int nand_fileio_finish(struct nand_fileio_state
*state
)
1410 nand_fileio_cleanup(state
);
1411 return duration_measure(&state
->bench
);
1414 static COMMAND_HELPER(nand_fileio_parse_args
, struct nand_fileio_state
*state
,
1415 struct nand_device
**dev
, enum fileio_access filemode
,
1416 bool need_size
, bool sw_ecc
)
1418 nand_fileio_init(state
);
1420 unsigned minargs
= need_size
? 4 : 3;
1421 if (CMD_ARGC
< minargs
)
1422 return ERROR_COMMAND_SYNTAX_ERROR
;
1424 struct nand_device
*nand
;
1425 int retval
= CALL_COMMAND_HANDLER(nand_command_get_device
, 0, &nand
);
1426 if (ERROR_OK
!= retval
)
1429 if (NULL
== nand
->device
)
1431 command_print(CMD_CTX
, "#%s: not probed", CMD_ARGV
[0]);
1435 COMMAND_PARSE_NUMBER(u32
, CMD_ARGV
[2], state
->address
);
1438 COMMAND_PARSE_NUMBER(u32
, CMD_ARGV
[3], state
->size
);
1439 if (state
->size
% nand
->page_size
)
1441 command_print(CMD_CTX
, "only page-aligned sizes are supported");
1442 return ERROR_COMMAND_SYNTAX_ERROR
;
1446 if (CMD_ARGC
> minargs
)
1448 for (unsigned i
= minargs
; i
< CMD_ARGC
; i
++)
1450 if (!strcmp(CMD_ARGV
[i
], "oob_raw"))
1451 state
->oob_format
|= NAND_OOB_RAW
;
1452 else if (!strcmp(CMD_ARGV
[i
], "oob_only"))
1453 state
->oob_format
|= NAND_OOB_RAW
| NAND_OOB_ONLY
;
1454 else if (sw_ecc
&& !strcmp(CMD_ARGV
[i
], "oob_softecc"))
1455 state
->oob_format
|= NAND_OOB_SW_ECC
;
1456 else if (sw_ecc
&& !strcmp(CMD_ARGV
[i
], "oob_softecc_kw"))
1457 state
->oob_format
|= NAND_OOB_SW_ECC_KW
;
1460 command_print(CMD_CTX
, "unknown option: %s", CMD_ARGV
[i
]);
1461 return ERROR_COMMAND_SYNTAX_ERROR
;
1466 retval
= nand_fileio_start(CMD_CTX
, nand
, CMD_ARGV
[1], filemode
, state
);
1467 if (ERROR_OK
!= retval
)
1471 state
->size
= state
->fileio
.size
;
1479 * @returns If no error occurred, returns number of bytes consumed;
1480 * otherwise, returns a negative error code.)
1482 static int nand_fileio_read(struct nand_device
*nand
,
1483 struct nand_fileio_state
*s
)
1485 size_t total_read
= 0;
1488 if (NULL
!= s
->page
)
1490 fileio_read(&s
->fileio
, s
->page_size
, s
->page
, &one_read
);
1491 if (one_read
< s
->page_size
)
1492 memset(s
->page
+ one_read
, 0xff, s
->page_size
- one_read
);
1493 total_read
+= one_read
;
1496 if (s
->oob_format
& NAND_OOB_SW_ECC
)
1499 memset(s
->oob
, 0xff, s
->oob_size
);
1500 for (uint32_t i
= 0, j
= 0; i
< s
->page_size
; i
+= 256)
1502 nand_calculate_ecc(nand
, s
->page
+ i
, ecc
);
1503 s
->oob
[s
->eccpos
[j
++]] = ecc
[0];
1504 s
->oob
[s
->eccpos
[j
++]] = ecc
[1];
1505 s
->oob
[s
->eccpos
[j
++]] = ecc
[2];
1508 else if (s
->oob_format
& NAND_OOB_SW_ECC_KW
)
1511 * In this case eccpos is not used as
1512 * the ECC data is always stored contigously
1513 * at the end of the OOB area. It consists
1514 * of 10 bytes per 512-byte data block.
1516 uint8_t *ecc
= s
->oob
+ s
->oob_size
- s
->page_size
/ 512 * 10;
1517 memset(s
->oob
, 0xff, s
->oob_size
);
1518 for (uint32_t i
= 0; i
< s
->page_size
; i
+= 512)
1520 nand_calculate_ecc_kw(nand
, s
->page
+ i
, ecc
);
1524 else if (NULL
!= s
->oob
)
1526 fileio_read(&s
->fileio
, s
->oob_size
, s
->oob
, &one_read
);
1527 if (one_read
< s
->oob_size
)
1528 memset(s
->oob
+ one_read
, 0xff, s
->oob_size
- one_read
);
1529 total_read
+= one_read
;
1534 COMMAND_HANDLER(handle_nand_write_command
)
1536 struct nand_device
*nand
= NULL
;
1537 struct nand_fileio_state s
;
1538 int retval
= CALL_COMMAND_HANDLER(nand_fileio_parse_args
,
1539 &s
, &nand
, FILEIO_READ
, false, true);
1540 if (ERROR_OK
!= retval
)
1543 uint32_t total_bytes
= s
.size
;
1546 int bytes_read
= nand_fileio_read(nand
, &s
);
1547 if (bytes_read
<= 0)
1549 command_print(CMD_CTX
, "error while reading file");
1550 return nand_fileio_cleanup(&s
);
1552 s
.size
-= bytes_read
;
1554 retval
= nand_write_page(nand
, s
.address
/ nand
->page_size
,
1555 s
.page
, s
.page_size
, s
.oob
, s
.oob_size
);
1556 if (ERROR_OK
!= retval
)
1558 command_print(CMD_CTX
, "failed writing file %s "
1559 "to NAND flash %s at offset 0x%8.8" PRIx32
,
1560 CMD_ARGV
[1], CMD_ARGV
[0], s
.address
);
1561 return nand_fileio_cleanup(&s
);
1563 s
.address
+= s
.page_size
;
1566 if (nand_fileio_finish(&s
))
1568 command_print(CMD_CTX
, "wrote file %s to NAND flash %s up to "
1569 "offset 0x%8.8" PRIx32
" in %fs (%0.3f kb/s)",
1570 CMD_ARGV
[1], CMD_ARGV
[0], s
.address
, duration_elapsed(&s
.bench
),
1571 duration_kbps(&s
.bench
, total_bytes
));
1576 COMMAND_HANDLER(handle_nand_verify_command
)
1578 struct nand_device
*nand
= NULL
;
1579 struct nand_fileio_state file
;
1580 int retval
= CALL_COMMAND_HANDLER(nand_fileio_parse_args
,
1581 &file
, &nand
, FILEIO_READ
, false, true);
1582 if (ERROR_OK
!= retval
)
1585 struct nand_fileio_state dev
;
1586 nand_fileio_init(&dev
);
1587 dev
.address
= file
.address
;
1588 dev
.size
= file
.size
;
1589 dev
.oob_format
= file
.oob_format
;
1590 retval
= nand_fileio_start(CMD_CTX
, nand
, NULL
, FILEIO_NONE
, &dev
);
1591 if (ERROR_OK
!= retval
)
1594 while (file
.size
> 0)
1596 int retval
= nand_read_page(nand
, dev
.address
/ dev
.page_size
,
1597 dev
.page
, dev
.page_size
, dev
.oob
, dev
.oob_size
);
1598 if (ERROR_OK
!= retval
)
1600 command_print(CMD_CTX
, "reading NAND flash page failed");
1601 nand_fileio_cleanup(&dev
);
1602 return nand_fileio_cleanup(&file
);
1605 int bytes_read
= nand_fileio_read(nand
, &file
);
1606 if (bytes_read
<= 0)
1608 command_print(CMD_CTX
, "error while reading file");
1609 nand_fileio_cleanup(&dev
);
1610 return nand_fileio_cleanup(&file
);
1613 if ((dev
.page
&& memcmp(dev
.page
, file
.page
, dev
.page_size
)) ||
1614 (dev
.oob
&& memcmp(dev
.oob
, file
.oob
, dev
.oob_size
)) )
1616 command_print(CMD_CTX
, "NAND flash contents differ "
1617 "at 0x%8.8" PRIx32
, dev
.address
);
1618 nand_fileio_cleanup(&dev
);
1619 return nand_fileio_cleanup(&file
);
1622 file
.size
-= bytes_read
;
1623 dev
.address
+= nand
->page_size
;
1626 if (nand_fileio_finish(&file
) == ERROR_OK
)
1628 command_print(CMD_CTX
, "verified file %s in NAND flash %s "
1629 "up to offset 0x%8.8" PRIx32
" in %fs (%0.3f kb/s)",
1630 CMD_ARGV
[1], CMD_ARGV
[0], dev
.address
, duration_elapsed(&file
.bench
),
1631 duration_kbps(&file
.bench
, dev
.size
));
1634 return nand_fileio_cleanup(&dev
);
1637 COMMAND_HANDLER(handle_nand_dump_command
)
1639 struct nand_device
*nand
= NULL
;
1640 struct nand_fileio_state s
;
1641 int retval
= CALL_COMMAND_HANDLER(nand_fileio_parse_args
,
1642 &s
, &nand
, FILEIO_WRITE
, true, false);
1643 if (ERROR_OK
!= retval
)
1648 size_t size_written
;
1649 int retval
= nand_read_page(nand
, s
.address
/ nand
->page_size
,
1650 s
.page
, s
.page_size
, s
.oob
, s
.oob_size
);
1651 if (ERROR_OK
!= retval
)
1653 command_print(CMD_CTX
, "reading NAND flash page failed");
1654 return nand_fileio_cleanup(&s
);
1658 fileio_write(&s
.fileio
, s
.page_size
, s
.page
, &size_written
);
1661 fileio_write(&s
.fileio
, s
.oob_size
, s
.oob
, &size_written
);
1663 s
.size
-= nand
->page_size
;
1664 s
.address
+= nand
->page_size
;
1667 if (nand_fileio_finish(&s
) == ERROR_OK
)
1669 command_print(CMD_CTX
, "dumped %zu bytes in %fs (%0.3f kb/s)",
1670 s
.fileio
.size
, duration_elapsed(&s
.bench
),
1671 duration_kbps(&s
.bench
, s
.fileio
.size
));
1676 COMMAND_HANDLER(handle_nand_raw_access_command
)
1678 if ((CMD_ARGC
< 1) || (CMD_ARGC
> 2))
1680 return ERROR_COMMAND_SYNTAX_ERROR
;
1683 struct nand_device
*p
;
1684 int retval
= CALL_COMMAND_HANDLER(nand_command_get_device
, 0, &p
);
1685 if (ERROR_OK
!= retval
)
1688 if (NULL
== p
->device
)
1690 command_print(CMD_CTX
, "#%s: not probed", CMD_ARGV
[0]);
1695 COMMAND_PARSE_ENABLE(CMD_ARGV
[1], p
->use_raw
);
1697 const char *msg
= p
->use_raw
? "enabled" : "disabled";
1698 command_print(CMD_CTX
, "raw access is %s", msg
);
1703 int nand_init(struct command_context
*cmd_ctx
)
1708 COMMAND_REGISTER(cmd_ctx
, nand_cmd
, "list",
1709 handle_nand_list_command
, COMMAND_EXEC
,
1710 "list configured NAND flash devices");
1711 COMMAND_REGISTER(cmd_ctx
, nand_cmd
, "info",
1712 handle_nand_info_command
, COMMAND_EXEC
,
1713 "print info about NAND flash device <num>");
1714 COMMAND_REGISTER(cmd_ctx
, nand_cmd
, "probe",
1715 handle_nand_probe_command
, COMMAND_EXEC
,
1716 "identify NAND flash device <num>");
1718 COMMAND_REGISTER(cmd_ctx
, nand_cmd
, "check_bad_blocks",
1719 handle_nand_check_bad_blocks_command
, COMMAND_EXEC
,
1720 "check NAND flash device <num> for bad blocks [<offset> <length>]");
1721 COMMAND_REGISTER(cmd_ctx
, nand_cmd
, "erase",
1722 handle_nand_erase_command
, COMMAND_EXEC
,
1723 "erase blocks on NAND flash device <num> [<offset> <length>]");
1724 COMMAND_REGISTER(cmd_ctx
, nand_cmd
, "dump",
1725 handle_nand_dump_command
, COMMAND_EXEC
,
1726 "dump from NAND flash device <num> <filename> "
1727 "<offset> <length> [oob_raw | oob_only]");
1728 COMMAND_REGISTER(cmd_ctx
, nand_cmd
, "verify",
1729 &handle_nand_verify_command
, COMMAND_EXEC
,
1730 "verify NAND flash device <num> <filename> <offset> "
1731 "[oob_raw | oob_only | oob_softecc | oob_softecc_kw]");
1732 COMMAND_REGISTER(cmd_ctx
, nand_cmd
, "write",
1733 handle_nand_write_command
, COMMAND_EXEC
,
1734 "write to NAND flash device <num> <filename> <offset> "
1735 "[oob_raw | oob_only | oob_softecc | oob_softecc_kw]");
1737 COMMAND_REGISTER(cmd_ctx
, nand_cmd
, "raw_access",
1738 handle_nand_raw_access_command
, COMMAND_EXEC
,
1739 "raw access to NAND flash device <num> ['enable'|'disable']");