1 /***************************************************************************
2 * Copyright (C) 2009 by Marvell Semiconductors, Inc. *
3 * Written by Nicolas Pitre <nico at marvell.com> *
5 * This program is free software; you can redistribute it and/or modify *
6 * it under the terms of the GNU General Public License as published by *
7 * the Free Software Foundation; either version 2 of the License, or *
8 * (at your option) any later version. *
10 * This program is distributed in the hope that it will be useful, *
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of *
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
13 * GNU General Public License for more details. *
15 * You should have received a copy of the GNU General Public License *
16 * along with this program; if not, write to the *
17 * Free Software Foundation, Inc., *
18 * 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. *
19 ***************************************************************************/
22 * NAND controller interface for Marvell Orion/Kirkwood SoCs.
31 #include <target/arm.h>
34 struct orion_nand_controller
36 struct arm_nand_data io
;
43 #define CHECK_HALTED \
45 if (target->state != TARGET_HALTED) { \
46 LOG_ERROR("NAND flash access requires halted target"); \
47 return ERROR_NAND_OPERATION_FAILED; \
51 static int orion_nand_command(struct nand_device
*nand
, uint8_t command
)
53 struct orion_nand_controller
*hw
= nand
->controller_priv
;
54 struct target
*target
= nand
->target
;
57 target_write_u8(target
, hw
->cmd
, command
);
61 static int orion_nand_address(struct nand_device
*nand
, uint8_t address
)
63 struct orion_nand_controller
*hw
= nand
->controller_priv
;
64 struct target
*target
= nand
->target
;
67 target_write_u8(target
, hw
->addr
, address
);
71 static int orion_nand_read(struct nand_device
*nand
, void *data
)
73 struct orion_nand_controller
*hw
= nand
->controller_priv
;
74 struct target
*target
= nand
->target
;
77 target_read_u8(target
, hw
->data
, data
);
81 static int orion_nand_write(struct nand_device
*nand
, uint16_t data
)
83 struct orion_nand_controller
*hw
= nand
->controller_priv
;
84 struct target
*target
= nand
->target
;
87 target_write_u8(target
, hw
->data
, data
);
91 static int orion_nand_slow_block_write(struct nand_device
*nand
, uint8_t *data
, int size
)
94 orion_nand_write(nand
, *data
++);
98 static int orion_nand_fast_block_write(struct nand_device
*nand
, uint8_t *data
, int size
)
100 struct orion_nand_controller
*hw
= nand
->controller_priv
;
103 hw
->io
.chunk_size
= nand
->page_size
;
105 retval
= arm_nandwrite(&hw
->io
, data
, size
);
106 if (retval
== ERROR_NAND_NO_BUFFER
)
107 retval
= orion_nand_slow_block_write(nand
, data
, size
);
112 static int orion_nand_reset(struct nand_device
*nand
)
114 return orion_nand_command(nand
, NAND_CMD_RESET
);
117 NAND_DEVICE_COMMAND_HANDLER(orion_nand_device_command
)
119 struct orion_nand_controller
*hw
;
124 LOG_ERROR("arguments must be: <target_id> <NAND_address>");
125 return ERROR_NAND_DEVICE_INVALID
;
128 hw
= calloc(1, sizeof(*hw
));
130 LOG_ERROR("no memory for nand controller");
131 return ERROR_NAND_DEVICE_INVALID
;
134 nand
->controller_priv
= hw
;
136 COMMAND_PARSE_NUMBER(u32
, CMD_ARGV
[2], base
);
141 hw
->cmd
= base
+ (1 << cle
);
142 hw
->addr
= base
+ (1 << ale
);
144 hw
->io
.target
= nand
->target
;
145 hw
->io
.data
= hw
->data
;
146 hw
->io
.op
= ARM_NAND_NONE
;
151 static int orion_nand_init(struct nand_device
*nand
)
156 struct nand_flash_controller orion_nand_controller
=
159 .command
= orion_nand_command
,
160 .address
= orion_nand_address
,
161 .read_data
= orion_nand_read
,
162 .write_data
= orion_nand_write
,
163 .write_block_data
= orion_nand_fast_block_write
,
164 .reset
= orion_nand_reset
,
165 .nand_device_command
= orion_nand_device_command
,
166 .init
= orion_nand_init
,
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