From 400dbedaeec230d9438d2c95a61ee63f2c15cc6d Mon Sep 17 00:00:00 2001 From: Michael Dietz Date: Mon, 30 May 2016 01:54:47 -0700 Subject: [PATCH] nRF51: Fix bug in Code memory size. MIME-Version: 1.0 Content-Type: text/plain; charset=utf8 Content-Transfer-Encoding: 8bit The code memory size was a bug and seemed to be working by accident since there happened to be 256 pages in the device that was tested on which corresponded to 256kb. Also don't fail if memory size != expected memory size based on hwid as this hwid is unstable and should be used only for debug/diagnostics. Change-Id: I4e98f7498a36c53fc51783eddfdaba704d30e3ca Signed-off-by: Michael Dietz Reviewed-on: http://openocd.zylin.com/3510 Tested-by: jenkins Reviewed-by: Jiří Pinkava Reviewed-by: Tomas Vanek --- src/flash/nor/nrf51.c | 21 ++++++++++----------- 1 file changed, 10 insertions(+), 11 deletions(-) diff --git a/src/flash/nor/nrf51.c b/src/flash/nor/nrf51.c index 69bf666163..60f6d3c6bb 100644 --- a/src/flash/nor/nrf51.c +++ b/src/flash/nor/nrf51.c @@ -108,7 +108,6 @@ enum nrf51_nvmc_config_bits { struct nrf51_info { uint32_t code_page_size; - uint32_t code_memory_size; struct { bool probed; @@ -641,29 +640,29 @@ static int nrf51_probe(struct flash_bank *bank) LOG_WARNING("Unknown device (HWID 0x%08" PRIx32 ")", hwid); } - if (bank->base == NRF51_FLASH_BASE) { + /* The value stored in NRF51_FICR_CODEPAGESIZE is the number of bytes in one page of FLASH. */ res = target_read_u32(chip->target, NRF51_FICR_CODEPAGESIZE, - &chip->code_page_size); + &chip->code_page_size); if (res != ERROR_OK) { LOG_ERROR("Couldn't read code page size"); return res; } + /* Note the register name is misleading, + * NRF51_FICR_CODESIZE is the number of pages in flash memory, not the number of bytes! */ res = target_read_u32(chip->target, NRF51_FICR_CODESIZE, - &chip->code_memory_size); + (uint32_t *) &bank->num_sectors); if (res != ERROR_OK) { LOG_ERROR("Couldn't read code memory size"); return res; } - if (spec && chip->code_memory_size != spec->flash_size_kb) { - LOG_ERROR("Chip's reported Flash capacity does not match expected one"); - return ERROR_FAIL; - } + bank->size = bank->num_sectors * chip->code_page_size; + + if (spec && bank->size / 1024 != spec->flash_size_kb) + LOG_WARNING("Chip's reported Flash capacity does not match expected one"); - bank->size = chip->code_memory_size * 1024; - bank->num_sectors = bank->size / chip->code_page_size; bank->sectors = calloc(bank->num_sectors, sizeof((bank->sectors)[0])); if (!bank->sectors) @@ -1272,7 +1271,7 @@ static int nrf51_info(struct flash_bank *bank, char *buf, int buf_size) "reset value for XTALFREQ: %"PRIx32"\n" "firmware id: 0x%04"PRIx32, ficr[0].value, - ficr[1].value, + (ficr[1].value * ficr[0].value) / 1024, (ficr[2].value == 0xFFFFFFFF) ? 0 : ficr[2].value / 1024, ((ficr[3].value & 0xFF) == 0x00) ? "present" : "not present", ficr[4].value, -- 2.30.2