From ce8937a987620cb32de0ccad60ea06c296850139 Mon Sep 17 00:00:00 2001 From: Christopher Head Date: Mon, 17 Sep 2018 15:49:24 -0700 Subject: [PATCH] target/cortex_m: fix typo The subunit of the debug unit is called the Flash Patch and Breakpoint unit, abbreviated (by ARM no less) as FPB, not FBP. Change-Id: Ia2f08470da705f0f1518feeca878f0f500507308 Signed-off-by: Christopher Head Reviewed-on: http://openocd.zylin.com/4675 Tested-by: jenkins Reviewed-by: Tomas Vanek Reviewed-by: Antonio Borneo --- src/target/cortex_m.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/src/target/cortex_m.c b/src/target/cortex_m.c index d1f7f3eea8..07fea51374 100644 --- a/src/target/cortex_m.c +++ b/src/target/cortex_m.c @@ -42,7 +42,7 @@ /* NOTE: most of this should work fine for the Cortex-M1 and * Cortex-M0 cores too, although they're ARMv6-M not ARMv7-M. - * Some differences: M0/M1 doesn't have FBP remapping or the + * Some differences: M0/M1 doesn't have FPB remapping or the * DWT tracing/profiling support. (So the cycle counter will * not be usable; the other stuff isn't currently used here.) * @@ -255,7 +255,7 @@ static int cortex_m_endreset_event(struct target *target) return retval; /* Paranoia: evidently some (early?) chips don't preserve all the - * debug state (including FBP, DWT, etc) across reset... + * debug state (including FPB, DWT, etc) across reset... */ /* Enable FPB */ @@ -1277,7 +1277,7 @@ int cortex_m_remove_breakpoint(struct target *target, struct breakpoint *breakpo { struct cortex_m_common *cortex_m = target_to_cm(target); - /* REVISIT why check? FBP can be updated with core running ... */ + /* REVISIT why check? FPB can be updated with core running ... */ if (target->state != TARGET_HALTED) { LOG_WARNING("target not halted"); return ERROR_TARGET_NOT_HALTED; -- 2.30.2