From bc91cdad3c894ae75e727ad89cf33333e14cb357 Mon Sep 17 00:00:00 2001 From: Andreas Fritiofson Date: Fri, 9 May 2014 22:49:21 +0200 Subject: [PATCH 1/1] swd: Fix park bit polarity according to ADIv5.1 Supplement Change-Id: I27293defd3f3c3bf37c9662f88689e85ba593d86 Signed-off-by: Andreas Fritiofson Reviewed-on: http://openocd.zylin.com/2131 Tested-by: jenkins Reviewed-by: Paul Fertser --- src/jtag/swd.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/jtag/swd.h b/src/jtag/swd.h index 5d00ab357c..2e676b50f4 100644 --- a/src/jtag/swd.h +++ b/src/jtag/swd.h @@ -31,7 +31,7 @@ #define SWD_CMD_A32 (3 << 3) /* bits A[3:2] of register addr */ #define SWD_CMD_PARITY (1 << 5) /* parity of APnDP|RnW|A32 */ #define SWD_CMD_STOP (0 << 6) /* always clear for synch SWD */ -#define SWD_CMD_PARK (0 << 7) /* not driven by host (pull high) */ +#define SWD_CMD_PARK (1 << 7) /* driven high by host */ /* followed by TRN, 3-bits of ACK, TRN */ /** -- 2.30.2