From 996ff5bcfc402227ac2f28601e931f30b62e393f Mon Sep 17 00:00:00 2001 From: Antonio Borneo Date: Tue, 7 May 2019 00:26:46 +0200 Subject: [PATCH] coding style: add arguments to function prototypes Issue identified by checkpatch script from Linux kernel v5.1 using the command find src/ -type f -exec ./tools/scripts/checkpatch.pl \ -q --types FUNCTION_ARGUMENTS -f {} \; This patch also fixes an incorrect function prototype in zy1000.c. ZY1000 minidriver implementation overrides the function arm11_run_instr_data_to_core_noack_inner(), but the prototype is not the same as in src/target/arm11_dbgtap.c and to avoid compile error it was changed also the prototype of the called function arm11_run_instr_data_to_core_noack_inner_default(). Change-Id: I476cda8cdb0e1e280795b3b43ca95c40d09e4a3d Signed-off-by: Antonio Borneo Reviewed-on: http://openocd.zylin.com/5630 Tested-by: jenkins Reviewed-by: Andreas Fritiofson --- src/jtag/jtag.h | 2 +- src/jtag/zy1000/zy1000.c | 6 +++--- src/server/server.h | 2 +- src/target/arm_dpm.h | 32 ++++++++++++++++---------------- src/target/armv8_dpm.h | 6 +++--- src/target/riscv/riscv.h | 6 +++--- 6 files changed, 27 insertions(+), 27 deletions(-) diff --git a/src/jtag/jtag.h b/src/jtag/jtag.h index 7f033e0e70..9350642ffe 100644 --- a/src/jtag/jtag.h +++ b/src/jtag/jtag.h @@ -392,7 +392,7 @@ typedef intptr_t jtag_callback_data_t; typedef void (*jtag_callback1_t)(jtag_callback_data_t data0); /** A simpler version of jtag_add_callback4(). */ -void jtag_add_callback(jtag_callback1_t, jtag_callback_data_t data0); +void jtag_add_callback(jtag_callback1_t f, jtag_callback_data_t data0); /** diff --git a/src/jtag/zy1000/zy1000.c b/src/jtag/zy1000/zy1000.c index 37af2f7ae4..669e6f45c4 100644 --- a/src/jtag/zy1000/zy1000.c +++ b/src/jtag/zy1000/zy1000.c @@ -674,7 +674,7 @@ void embeddedice_write_dcc(struct jtag_tap *tap, int arm11_run_instr_data_to_core_noack_inner(struct jtag_tap *tap, uint32_t opcode, - const uint32_t *data, + uint32_t *data, size_t count) { /* bypass bits before and after */ @@ -684,8 +684,8 @@ int arm11_run_instr_data_to_core_noack_inner(struct jtag_tap *tap, post_bits += 2; if ((pre_bits > 32) || (post_bits > 32)) { - int arm11_run_instr_data_to_core_noack_inner_default(struct jtag_tap *, - uint32_t, const uint32_t *, size_t); + int arm11_run_instr_data_to_core_noack_inner_default(struct jtag_tap *tap, + uint32_t opcode, uint32_t *data, size_t count); return arm11_run_instr_data_to_core_noack_inner_default(tap, opcode, data, count); } else { static const uint8_t zero; diff --git a/src/server/server.h b/src/server/server.h index f4cc39d3a7..ff2ada9cbe 100644 --- a/src/server/server.h +++ b/src/server/server.h @@ -87,7 +87,7 @@ int server_preinit(void); int server_init(struct command_context *cmd_ctx); int server_quit(void); void server_free(void); -void exit_on_signal(int); +void exit_on_signal(int sig); int server_loop(struct command_context *command_context); diff --git a/src/target/arm_dpm.h b/src/target/arm_dpm.h index d05c66c432..82707822b1 100644 --- a/src/target/arm_dpm.h +++ b/src/target/arm_dpm.h @@ -62,29 +62,29 @@ struct arm_dpm { uint64_t didr; /** Invoke before a series of instruction operations */ - int (*prepare)(struct arm_dpm *); + int (*prepare)(struct arm_dpm *dpm); /** Invoke after a series of instruction operations */ - int (*finish)(struct arm_dpm *); + int (*finish)(struct arm_dpm *dpm); /** Runs one instruction. */ - int (*instr_execute)(struct arm_dpm *, uint32_t opcode); + int (*instr_execute)(struct arm_dpm *dpm, uint32_t opcode); /* WRITE TO CPU */ /** Runs one instruction, writing data to DCC before execution. */ - int (*instr_write_data_dcc)(struct arm_dpm *, + int (*instr_write_data_dcc)(struct arm_dpm *dpm, uint32_t opcode, uint32_t data); - int (*instr_write_data_dcc_64)(struct arm_dpm *, + int (*instr_write_data_dcc_64)(struct arm_dpm *dpm, uint32_t opcode, uint64_t data); /** Runs one instruction, writing data to R0 before execution. */ - int (*instr_write_data_r0)(struct arm_dpm *, + int (*instr_write_data_r0)(struct arm_dpm *dpm, uint32_t opcode, uint32_t data); /** Runs one instruction, writing data to R0 before execution. */ - int (*instr_write_data_r0_64)(struct arm_dpm *, + int (*instr_write_data_r0_64)(struct arm_dpm *dpm, uint32_t opcode, uint64_t data); /** Optional core-specific operation invoked after CPSR writes. */ @@ -93,17 +93,17 @@ struct arm_dpm { /* READ FROM CPU */ /** Runs one instruction, reading data from dcc after execution. */ - int (*instr_read_data_dcc)(struct arm_dpm *, + int (*instr_read_data_dcc)(struct arm_dpm *dpm, uint32_t opcode, uint32_t *data); - int (*instr_read_data_dcc_64)(struct arm_dpm *, + int (*instr_read_data_dcc_64)(struct arm_dpm *dpm, uint32_t opcode, uint64_t *data); /** Runs one instruction, reading data from r0 after execution. */ - int (*instr_read_data_r0)(struct arm_dpm *, + int (*instr_read_data_r0)(struct arm_dpm *dpm, uint32_t opcode, uint32_t *data); - int (*instr_read_data_r0_64)(struct arm_dpm *, + int (*instr_read_data_r0_64)(struct arm_dpm *dpm, uint32_t opcode, uint64_t *data); struct reg *(*arm_reg_current)(struct arm *arm, @@ -117,7 +117,7 @@ struct arm_dpm { * must currently be disabled. Indices 0..15 are used for * breakpoints; indices 16..31 are for watchpoints. */ - int (*bpwp_enable)(struct arm_dpm *, unsigned index_value, + int (*bpwp_enable)(struct arm_dpm *dpm, unsigned index_value, uint32_t addr, uint32_t control); /** @@ -125,7 +125,7 @@ struct arm_dpm { * hardware control registers. Indices are the same ones * accepted by bpwp_enable(). */ - int (*bpwp_disable)(struct arm_dpm *, unsigned index_value); + int (*bpwp_disable)(struct arm_dpm *dpm, unsigned index_value); /* The breakpoint and watchpoint arrays are private to the * DPM infrastructure. There are nbp indices in the dbp @@ -153,12 +153,12 @@ int arm_dpm_setup(struct arm_dpm *dpm); int arm_dpm_initialize(struct arm_dpm *dpm); int arm_dpm_read_reg(struct arm_dpm *dpm, struct reg *r, unsigned regnum); -int arm_dpm_read_current_registers(struct arm_dpm *); +int arm_dpm_read_current_registers(struct arm_dpm *dpm); int arm_dpm_modeswitch(struct arm_dpm *dpm, enum arm_mode mode); -int arm_dpm_write_dirty_registers(struct arm_dpm *, bool bpwp); +int arm_dpm_write_dirty_registers(struct arm_dpm *dpm, bool bpwp); -void arm_dpm_report_wfar(struct arm_dpm *, uint32_t wfar); +void arm_dpm_report_wfar(struct arm_dpm *dpm, uint32_t wfar); /* DSCR bits; see ARMv7a arch spec section C10.3.1. * Not all v7 bits are valid in v6. diff --git a/src/target/armv8_dpm.h b/src/target/armv8_dpm.h index f40440370f..ee6f699de2 100644 --- a/src/target/armv8_dpm.h +++ b/src/target/armv8_dpm.h @@ -31,13 +31,13 @@ struct armv8_common; int armv8_dpm_setup(struct arm_dpm *dpm); int armv8_dpm_initialize(struct arm_dpm *dpm); -int armv8_dpm_read_current_registers(struct arm_dpm *); +int armv8_dpm_read_current_registers(struct arm_dpm *dpm); int armv8_dpm_modeswitch(struct arm_dpm *dpm, enum arm_mode mode); -int armv8_dpm_write_dirty_registers(struct arm_dpm *, bool bpwp); +int armv8_dpm_write_dirty_registers(struct arm_dpm *dpm, bool bpwp); -void armv8_dpm_report_wfar(struct arm_dpm *, uint64_t wfar); +void armv8_dpm_report_wfar(struct arm_dpm *dpm, uint64_t wfar); /* DSCR bits; see ARMv7a arch spec section C10.3.1. * Not all v7 bits are valid in v6. diff --git a/src/target/riscv/riscv.h b/src/target/riscv/riscv.h index 59414fc088..51cf7f9281 100644 --- a/src/target/riscv/riscv.h +++ b/src/target/riscv/riscv.h @@ -104,11 +104,11 @@ typedef struct { * implementations. */ int (*get_register)(struct target *target, riscv_reg_t *value, int hid, int rid); - int (*set_register)(struct target *, int hartid, int regid, + int (*set_register)(struct target *target, int hartid, int regid, uint64_t value); - int (*select_current_hart)(struct target *); + int (*select_current_hart)(struct target *target); bool (*is_halted)(struct target *target); - int (*halt_current_hart)(struct target *); + int (*halt_current_hart)(struct target *target); int (*resume_current_hart)(struct target *target); int (*step_current_hart)(struct target *target); int (*on_halt)(struct target *target); -- 2.30.2