From 53d605e12c3765aeedabf2bfe0c5cc338dc95d5a Mon Sep 17 00:00:00 2001 From: zwelch Date: Tue, 23 Jun 2009 22:38:12 +0000 Subject: [PATCH] - Fixes '!=' whitespace - Replace ')\(!=\)\(\w\)' with ') \1 \2'. - Replace '\(\w\)\(!=\)(' with '\1 \2 ('. - Replace '\(\w\)\(!=\)\(\w\)' with '\1 \2 \3'. git-svn-id: svn://svn.berlios.de/openocd/trunk@2363 b42882b7-edfa-0310-969c-e2dbd0fdcd60 --- src/flash/ecos.c | 8 ++-- src/flash/flash.c | 10 ++--- src/flash/lpc2000.c | 2 +- src/flash/ocl/at91sam7x/main.c | 2 +- src/flash/ocl/at91sam7x/samflash.c | 2 +- src/flash/pic32mx.c | 4 +- src/flash/stm32x.c | 4 +- src/flash/str9x.c | 26 ++++++------ src/helper/command.c | 12 +++--- src/helper/configuration.c | 2 +- src/helper/ioutil.c | 12 +++--- src/helper/jim.c | 6 +-- src/helper/log.c | 2 +- src/helper/replacements.c | 4 +- src/jtag/bitbang.c | 2 +- src/jtag/bitq.c | 8 ++-- src/jtag/core.c | 6 +-- src/jtag/driver.c | 4 +- src/jtag/ft2232.c | 2 +- src/jtag/jlink.c | 2 +- src/jtag/jtag.h | 2 +- src/jtag/presto.c | 4 +- src/jtag/tcl.c | 2 +- src/jtag/zy1000/jtag_minidriver.h | 6 +-- src/jtag/zy1000/zy1000.c | 12 +++--- src/openocd.c | 8 ++-- src/server/gdb_server.c | 14 +++---- src/server/httpd.c | 4 +- src/target/arm7_9_common.c | 20 ++++----- src/target/arm7tdmi.c | 6 +-- src/target/arm9tdmi.c | 6 +-- src/target/arm_adi_v5.c | 20 ++++----- src/target/arm_disassembler.c | 2 +- src/target/armv4_5.c | 6 +-- src/target/armv7m.c | 6 +-- src/target/breakpoints.c | 4 +- src/target/cortex_m3.c | 2 +- src/target/embeddedice.c | 4 +- src/target/etm.c | 2 +- src/target/feroceon.c | 2 +- src/target/image.c | 8 ++-- src/target/mips_m4k.c | 2 +- src/target/target.c | 20 ++++----- src/target/xscale.c | 66 +++++++++++++++--------------- 44 files changed, 174 insertions(+), 174 deletions(-) diff --git a/src/flash/ecos.c b/src/flash/ecos.c index e19ac9b091..5d1badd615 100644 --- a/src/flash/ecos.c +++ b/src/flash/ecos.c @@ -269,7 +269,7 @@ static int eCosBoard_erase(ecosflash_flash_bank_t *info, uint32_t address, uint3 int timeout = (len / 20480 + 1) * 1000; /*asume 20 KB/s*/ retval=loadDriver(info); - if (retval!=ERROR_OK) + if (retval != ERROR_OK) return retval; uint32_t flashErr; @@ -282,7 +282,7 @@ static int eCosBoard_erase(ecosflash_flash_bank_t *info, uint32_t address, uint3 &flashErr, timeout ); - if (retval!=ERROR_OK) + if (retval != ERROR_OK) return retval; if (flashErr != 0x0) @@ -302,7 +302,7 @@ static int eCosBoard_flash(ecosflash_flash_bank_t *info, void *data, uint32_t ad int timeout = (chunk / 20480 + 1) * 1000; /*asume 20 KB/s + 1 second*/ retval=loadDriver(info); - if (retval!=ERROR_OK) + if (retval != ERROR_OK) return retval; uint32_t buffer; @@ -314,7 +314,7 @@ static int eCosBoard_flash(ecosflash_flash_bank_t *info, void *data, uint32_t ad 0, &buffer, 1000); - if (retval!=ERROR_OK) + if (retval != ERROR_OK) return retval; diff --git a/src/flash/flash.c b/src/flash/flash.c index 796af71522..d5bdf60ec0 100644 --- a/src/flash/flash.c +++ b/src/flash/flash.c @@ -90,7 +90,7 @@ static int flash_driver_write(struct flash_bank_s *bank, uint8_t *buffer, uint32 int retval; retval=bank->driver->write(bank, buffer, offset, count); - if (retval!=ERROR_OK) + if (retval != ERROR_OK) { LOG_ERROR("error writing to flash at address 0x%08" PRIx32 " at offset 0x%8.8" PRIx32 " (%d)", bank->base, offset, retval); @@ -104,7 +104,7 @@ static int flash_driver_erase(struct flash_bank_s *bank, int first, int last) int retval; retval=bank->driver->erase(bank, first, last); - if (retval!=ERROR_OK) + if (retval != ERROR_OK) { LOG_ERROR("failed erasing sectors %d to %d (%d)", first, last, retval); } @@ -117,7 +117,7 @@ int flash_driver_protect(struct flash_bank_s *bank, int set, int first, int last int retval; retval=bank->driver->protect(bank, set, first, last); - if (retval!=ERROR_OK) + if (retval != ERROR_OK) { LOG_ERROR("failed setting protection for areas %d to %d (%d)", first, last, retval); } @@ -801,11 +801,11 @@ static int handle_flash_fill_command(struct command_context_s *cmd_ctx, char *cm return ERROR_FAIL; } err = flash_driver_write(bank, chunk, address - bank->base + wrote, cur_size); - if (err!=ERROR_OK) + if (err != ERROR_OK) return err; err = target_read_buffer(target, address + wrote, cur_size, readback); - if (err!=ERROR_OK) + if (err != ERROR_OK) return err; unsigned i; diff --git a/src/flash/lpc2000.c b/src/flash/lpc2000.c index 28fe087510..d352d26a89 100644 --- a/src/flash/lpc2000.c +++ b/src/flash/lpc2000.c @@ -526,7 +526,7 @@ static int lpc2000_write(struct flash_bank_s *bank, uint8_t *buffer, uint32_t of LOG_DEBUG("checksum: 0x%8.8" PRIx32, checksum); uint32_t original_value=buf_get_u32(buffer + (5 * 4), 0, 32); - if (original_value!=checksum) + if (original_value != checksum) { LOG_WARNING("Verification will fail since checksum in image(0x%8.8" PRIx32 ") written to flash was different from calculated vector checksum(0x%8.8" PRIx32 ").", original_value, checksum); diff --git a/src/flash/ocl/at91sam7x/main.c b/src/flash/ocl/at91sam7x/main.c index 2a4d28bba9..3d88d91a20 100644 --- a/src/flash/ocl/at91sam7x/main.c +++ b/src/flash/ocl/at91sam7x/main.c @@ -53,7 +53,7 @@ void cmd_flash(uint32 cmd) chksum=OCL_CHKS_INIT; for (bi=0; bi1024) result=flash_erase_plane(0x10); diff --git a/src/flash/pic32mx.c b/src/flash/pic32mx.c index 65bdef1c40..9ed1aef199 100644 --- a/src/flash/pic32mx.c +++ b/src/flash/pic32mx.c @@ -388,7 +388,7 @@ static int pic32mx_write_block(struct flash_bank_s *bank, uint8_t *buffer, uint3 return ERROR_TARGET_RESOURCE_NOT_AVAILABLE; }; - if ((retval=target_write_buffer(target, pic32mx_info->write_algorithm->address, sizeof(pic32mx_flash_write_code), pic32mx_flash_write_code))!=ERROR_OK) + if ((retval=target_write_buffer(target, pic32mx_info->write_algorithm->address, sizeof(pic32mx_flash_write_code), pic32mx_flash_write_code)) != ERROR_OK) return retval; #endif @@ -409,7 +409,7 @@ static int pic32mx_write_block(struct flash_bank_s *bank, uint8_t *buffer, uint3 { uint32_t status; - if ((retval = target_write_buffer(target, source->address, buffer_size, buffer))!=ERROR_OK) { + if ((retval = target_write_buffer(target, source->address, buffer_size, buffer)) != ERROR_OK) { LOG_ERROR("Failed to write row buffer (%d words) to RAM", (int)(buffer_size/4)); break; } diff --git a/src/flash/stm32x.c b/src/flash/stm32x.c index dd1c1d8c99..431d3b02c2 100644 --- a/src/flash/stm32x.c +++ b/src/flash/stm32x.c @@ -517,7 +517,7 @@ static int stm32x_write_block(struct flash_bank_s *bank, uint8_t *buffer, uint32 return ERROR_TARGET_RESOURCE_NOT_AVAILABLE; }; - if ((retval=target_write_buffer(target, stm32x_info->write_algorithm->address, sizeof(stm32x_flash_write_code), stm32x_flash_write_code))!=ERROR_OK) + if ((retval=target_write_buffer(target, stm32x_info->write_algorithm->address, sizeof(stm32x_flash_write_code), stm32x_flash_write_code)) != ERROR_OK) return retval; /* memory buffer */ @@ -547,7 +547,7 @@ static int stm32x_write_block(struct flash_bank_s *bank, uint8_t *buffer, uint32 { uint32_t thisrun_count = (count > (buffer_size / 2)) ? (buffer_size / 2) : count; - if ((retval = target_write_buffer(target, source->address, thisrun_count * 2, buffer))!=ERROR_OK) + if ((retval = target_write_buffer(target, source->address, thisrun_count * 2, buffer)) != ERROR_OK) break; buf_set_u32(reg_params[0].value, 0, 32, source->address); diff --git a/src/flash/str9x.c b/src/flash/str9x.c index 0a75c95388..19c0f1eff9 100644 --- a/src/flash/str9x.c +++ b/src/flash/str9x.c @@ -198,11 +198,11 @@ static int str9x_protect_check(struct flash_bank_s *bank) if (str9x_info->bank1) { adr = bank1start + 0x18; - if ((retval=target_write_u16(target, adr, 0x90))!=ERROR_OK) + if ((retval=target_write_u16(target, adr, 0x90)) != ERROR_OK) { return retval; } - if ((retval=target_read_u16(target, adr, &hstatus))!=ERROR_OK) + if ((retval=target_read_u16(target, adr, &hstatus)) != ERROR_OK) { return retval; } @@ -211,11 +211,11 @@ static int str9x_protect_check(struct flash_bank_s *bank) else { adr = bank1start + 0x14; - if ((retval=target_write_u16(target, adr, 0x90))!=ERROR_OK) + if ((retval=target_write_u16(target, adr, 0x90)) != ERROR_OK) { return retval; } - if ((retval=target_read_u32(target, adr, &status))!=ERROR_OK) + if ((retval=target_read_u32(target, adr, &status)) != ERROR_OK) { return retval; } @@ -224,11 +224,11 @@ static int str9x_protect_check(struct flash_bank_s *bank) else { adr = bank1start + 0x10; - if ((retval=target_write_u16(target, adr, 0x90))!=ERROR_OK) + if ((retval=target_write_u16(target, adr, 0x90)) != ERROR_OK) { return retval; } - if ((retval=target_read_u16(target, adr, &hstatus))!=ERROR_OK) + if ((retval=target_read_u16(target, adr, &hstatus)) != ERROR_OK) { return retval; } @@ -236,7 +236,7 @@ static int str9x_protect_check(struct flash_bank_s *bank) } /* read array command */ - if ((retval=target_write_u16(target, adr, 0xFF))!=ERROR_OK) + if ((retval=target_write_u16(target, adr, 0xFF)) != ERROR_OK) { return retval; } @@ -284,24 +284,24 @@ static int str9x_erase(struct flash_bank_s *bank, int first, int last) adr = bank->base + bank->sectors[i].offset; /* erase sectors */ - if ((retval=target_write_u16(target, adr, erase_cmd))!=ERROR_OK) + if ((retval=target_write_u16(target, adr, erase_cmd)) != ERROR_OK) { return retval; } - if ((retval=target_write_u16(target, adr, 0xD0))!=ERROR_OK) + if ((retval=target_write_u16(target, adr, 0xD0)) != ERROR_OK) { return retval; } /* get status */ - if ((retval=target_write_u16(target, adr, 0x70))!=ERROR_OK) + if ((retval=target_write_u16(target, adr, 0x70)) != ERROR_OK) { return retval; } int timeout; for (timeout=0; timeout<1000; timeout++) { - if ((retval=target_read_u8(target, adr, &status))!=ERROR_OK) + if ((retval=target_read_u8(target, adr, &status)) != ERROR_OK) { return retval; } @@ -316,13 +316,13 @@ static int str9x_erase(struct flash_bank_s *bank, int first, int last) } /* clear status, also clear read array */ - if ((retval=target_write_u16(target, adr, 0x50))!=ERROR_OK) + if ((retval=target_write_u16(target, adr, 0x50)) != ERROR_OK) { return retval; } /* read array command */ - if ((retval=target_write_u16(target, adr, 0xFF))!=ERROR_OK) + if ((retval=target_write_u16(target, adr, 0xFF)) != ERROR_OK) { return retval; } diff --git a/src/helper/command.c b/src/helper/command.c index 640568436e..f474756ad6 100644 --- a/src/helper/command.c +++ b/src/helper/command.c @@ -226,7 +226,7 @@ command_t* register_command(command_context_t *context, command_t *parent, char const char *t2=""; const char *t3=""; /* maximum of two levels :-) */ - if (c->parent!=NULL) + if (c->parent != NULL) { t1=c->parent->name; t2="_"; @@ -250,7 +250,7 @@ command_t* register_command(command_context_t *context, command_t *parent, char Jim_Obj *cmd_list=Jim_NewListObj(interp, NULL, 0); /* maximum of two levels :-) */ - if (c->parent!=NULL) + if (c->parent != NULL) { Jim_ListAppendElement(interp, cmd_list, Jim_NewStringObj(interp, c->parent->name, -1)); } @@ -420,7 +420,7 @@ int run_command(command_context_t *context, command_t *c, char *words[], int num const char *t2=""; const char *t3=""; /* maximum of two levels :-) */ - if (c->parent!=NULL) + if (c->parent != NULL) { t1=c->parent->name; t2=" "; @@ -473,7 +473,7 @@ int command_run_line(command_context_t *context, char *line) Jim_DeleteAssocData(interp, "context"); } if (retcode == JIM_ERR) { - if (retval!=ERROR_COMMAND_CLOSE_CONNECTION) + if (retval != ERROR_COMMAND_CLOSE_CONNECTION) { /* We do not print the connection closed error message */ Jim_PrintErrorMessage(interp); @@ -520,7 +520,7 @@ int command_run_linef(command_context_t *context, const char *format, ...) va_list ap; va_start(ap, format); string = alloc_vprintf(format, ap); - if (string!=NULL) + if (string != NULL) { retval=command_run_line(context, string); } @@ -809,7 +809,7 @@ int handle_sleep_command(struct command_context_s *cmd_ctx, int handle_fast_command(struct command_context_s *cmd_ctx, char *cmd, char **args, int argc) { - if (argc!=1) + if (argc != 1) return ERROR_COMMAND_SYNTAX_ERROR; fast_and_dangerous = strcmp("enable", args[0])==0; diff --git a/src/helper/configuration.c b/src/helper/configuration.c index d1395e6ad4..2f9d8066bc 100644 --- a/src/helper/configuration.c +++ b/src/helper/configuration.c @@ -116,7 +116,7 @@ int parse_config_file(struct command_context_s *cmd_ctx) while (*cfg) { retval=command_run_line(cmd_ctx, *cfg); - if (retval!=ERROR_OK) + if (retval != ERROR_OK) return retval; cfg++; } diff --git a/src/helper/ioutil.c b/src/helper/ioutil.c index 901cf2b49e..de4e880ace 100644 --- a/src/helper/ioutil.c +++ b/src/helper/ioutil.c @@ -89,7 +89,7 @@ int loadFile(const char *fileName, void **data, size_t *len) LOG_ERROR("Can't open %s\n", fileName); return ERROR_FAIL; } - if (fseek(pFile, 0, SEEK_END)!=0) + if (fseek(pFile, 0, SEEK_END) != 0) { LOG_ERROR("Can't open %s\n", fileName); fclose(pFile); @@ -104,7 +104,7 @@ int loadFile(const char *fileName, void **data, size_t *len) } *len = fsize; - if (fseek(pFile, 0, SEEK_SET)!=0) + if (fseek(pFile, 0, SEEK_SET) != 0) { LOG_ERROR("Can't open %s\n", fileName); fclose(pFile); @@ -225,11 +225,11 @@ int handle_append_command(struct command_context_s *cmd_ctx, char *cmd, for (i = 1; i < argc; i++) { - if (fwrite(args[i], 1, strlen(args[i]), config_file)!=strlen(args[i])) + if (fwrite(args[i], 1, strlen(args[i]), config_file) != strlen(args[i])) break; if (i != argc - 1) { - if (fwrite(" ", 1, 1, config_file)!=1) + if (fwrite(" ", 1, 1, config_file) != 1) break; } } @@ -274,7 +274,7 @@ int handle_cp_command(struct command_context_s *cmd_ctx, char *cmd, char **args, chunk = maxChunk; } - if ((retval==ERROR_OK)&&(fwrite(((char *)data)+pos, 1, chunk, f)!=chunk)) + if ((retval==ERROR_OK)&&(fwrite(((char *)data)+pos, 1, chunk, f) != chunk)) retval = ERROR_INVALID_ARGUMENTS; if (retval != ERROR_OK) @@ -613,7 +613,7 @@ static int zylinjtag_Jim_Command_mac(Jim_Interp *interp, int argc, { //if (ifr->ifr_addr.sa_family == AF_INET) { - if (strcmp("eth0", ifr->ifr_name)!=0) + if (strcmp("eth0", ifr->ifr_name) != 0) continue; strncpy(ifreq.ifr_name, ifr->ifr_name, sizeof(ifreq.ifr_name)); if (ioctl(SockFD, SIOCGIFHWADDR, &ifreq) < 0) diff --git a/src/helper/jim.c b/src/helper/jim.c index ab0b18c6c9..99d3779ebc 100644 --- a/src/helper/jim.c +++ b/src/helper/jim.c @@ -503,7 +503,7 @@ int Jim_StringToDouble(const char *str, double *doublePtr) static jim_wide JimPowWide(jim_wide b, jim_wide e) { jim_wide i, res = 1; - if ((b==0 && e!=0) || (e<0)) return 0; + if ((b==0 && e != 0) || (e<0)) return 0; for (i=0; i>wB; break; case JIM_EXPROP_NUMEQ: wC = wA==wB; break; - case JIM_EXPROP_NUMNE: wC = wA!=wB; break; + case JIM_EXPROP_NUMNE: wC = wA != wB; break; case JIM_EXPROP_BITAND: wC = wA&wB; break; case JIM_EXPROP_BITXOR: wC = wA^wB; break; case JIM_EXPROP_BITOR: wC = wA|wB; break; @@ -7063,7 +7063,7 @@ trydouble: case JIM_EXPROP_LTE: dC = dA<=dB; break; case JIM_EXPROP_GTE: dC = dA>=dB; break; case JIM_EXPROP_NUMEQ: dC = dA==dB; break; - case JIM_EXPROP_NUMNE: dC = dA!=dB; break; + case JIM_EXPROP_NUMNE: dC = dA != dB; break; case JIM_EXPROP_LOGICAND_LEFT: if (dA == 0) { i += (int)dB; diff --git a/src/helper/log.c b/src/helper/log.c index ac494da03d..b596075fba 100644 --- a/src/helper/log.c +++ b/src/helper/log.c @@ -89,7 +89,7 @@ static void log_puts(enum log_levels level, const char *file, int line, const ch if (f != NULL) file = f + 1; - if (strchr(string, '\n')!=NULL) + if (strchr(string, '\n') != NULL) { if (debug_level >= LOG_LVL_DEBUG) { diff --git a/src/helper/replacements.c b/src/helper/replacements.c index 6b367fa843..5705c03a60 100644 --- a/src/helper/replacements.c +++ b/src/helper/replacements.c @@ -35,7 +35,7 @@ void *clear_malloc(size_t size) { void *t = malloc(size); - if (t!=NULL) + if (t != NULL) { memset(t, 0x00, size); } @@ -45,7 +45,7 @@ void *clear_malloc(size_t size) void *fill_malloc(size_t size) { void *t = malloc(size); - if (t!=NULL) + if (t != NULL) { /* We want to initialize memory to some known bad state. */ /* 0 and 0xff yields 0 and -1 as integers, which often */ diff --git a/src/jtag/bitbang.c b/src/jtag/bitbang.c index f39859af6b..e3cd63bef2 100644 --- a/src/jtag/bitbang.c +++ b/src/jtag/bitbang.c @@ -204,7 +204,7 @@ static void bitbang_scan(bool ir_scan, enum scan_type type, uint8_t *buffer, int bitbang_interface->write(0, tms, tdi); - if (type!=SCAN_OUT) + if (type != SCAN_OUT) val=bitbang_interface->read(); bitbang_interface->write(1, tms, tdi); diff --git a/src/jtag/bitq.c b/src/jtag/bitq.c index be5e8c73c6..0648446887 100644 --- a/src/jtag/bitq.c +++ b/src/jtag/bitq.c @@ -72,7 +72,7 @@ void bitq_in_proc(void) if (field->num_bits>bitq_in_bufsize * 8) { /* buffer previously allocated? */ - if (bitq_in_buffer!=NULL) + if (bitq_in_buffer != NULL) { /* free it */ free(bitq_in_buffer); @@ -241,7 +241,7 @@ void bitq_scan_field(scan_field_t* field, int pause) out_ptr = field->out_value; for (bit_cnt = field->num_bits; bit_cnt>1; bit_cnt--) { - bitq_io(0, ( (*out_ptr) & out_mask )!=0, tdo_req); + bitq_io(0, ( (*out_ptr) & out_mask ) != 0, tdo_req); if (out_mask==0x80) { out_mask = 0x01; @@ -251,7 +251,7 @@ void bitq_scan_field(scan_field_t* field, int pause) out_mask <<= 1; } - bitq_io(pause, ( (*out_ptr) & out_mask )!=0, tdo_req); + bitq_io(pause, ( (*out_ptr) & out_mask ) != 0, tdo_req); } if (pause) @@ -382,7 +382,7 @@ int bitq_execute_queue(void) void bitq_cleanup(void) { - if (bitq_in_buffer!=NULL) + if (bitq_in_buffer != NULL) { free(bitq_in_buffer); bitq_in_buffer = NULL; diff --git a/src/jtag/core.c b/src/jtag/core.c index 6ebddfc78f..31909964fc 100644 --- a/src/jtag/core.c +++ b/src/jtag/core.c @@ -302,7 +302,7 @@ static void jtag_prelude(tap_state_t state) { jtag_checks(); - assert(state!=TAP_INVALID); + assert(state != TAP_INVALID); cmd_queue_cur_state = state; } @@ -676,7 +676,7 @@ tap_state_t jtag_set_end_state(tap_state_t state) LOG_ERROR("BUG: TAP_DRSHIFT/IRSHIFT can't be end state. Calling code should use a larger scan field"); } - if (state!=TAP_INVALID) + if (state != TAP_INVALID) cmd_queue_end_state = state; return cmd_queue_end_state; } @@ -1157,7 +1157,7 @@ static int jtag_init_inner(struct command_context_s *cmd_ctx) } jtag_add_tlr(); - if ((retval=jtag_execute_queue())!=ERROR_OK) + if ((retval=jtag_execute_queue()) != ERROR_OK) return retval; /* examine chain first, as this could discover the real chain layout */ diff --git a/src/jtag/driver.c b/src/jtag/driver.c index 0e352b05bd..1e9af54b8f 100644 --- a/src/jtag/driver.c +++ b/src/jtag/driver.c @@ -493,10 +493,10 @@ int interface_jtag_execute_queue(void) if (retval == ERROR_OK) { struct jtag_callback_entry *entry; - for (entry=jtag_callback_queue_head; entry!=NULL; entry=entry->next) + for (entry=jtag_callback_queue_head; entry != NULL; entry=entry->next) { retval=entry->callback(entry->data0, entry->data1, entry->data2, entry->data3); - if (retval!=ERROR_OK) + if (retval != ERROR_OK) break; } } diff --git a/src/jtag/ft2232.c b/src/jtag/ft2232.c index c38d7d4744..14ee7d1426 100644 --- a/src/jtag/ft2232.c +++ b/src/jtag/ft2232.c @@ -52,7 +52,7 @@ #if (BUILD_FT2232_FTD2XX==1 && BUILD_FT2232_LIBFTDI==1) #error "BUILD_FT2232_FTD2XX && BUILD_FT2232_LIBFTDI are mutually exclusive" -#elif (BUILD_FT2232_FTD2XX!=1 && BUILD_FT2232_LIBFTDI!=1) +#elif (BUILD_FT2232_FTD2XX != 1 && BUILD_FT2232_LIBFTDI != 1) #error "BUILD_FT2232_FTD2XX || BUILD_FT2232_LIBFTDI must be chosen" #endif diff --git a/src/jtag/jlink.c b/src/jtag/jlink.c index 283260eeb7..97a8e48577 100644 --- a/src/jtag/jlink.c +++ b/src/jtag/jlink.c @@ -751,7 +751,7 @@ static void jlink_tap_append_scan(int length, uint8_t *buffer, scan_command_t *c for (i = 0; i < length; i++) { int tms = (i < (length - 1)) ? 0 : 1; - int tdi = (buffer[i / 8] & (1 << (i % 8)))!=0; + int tdi = (buffer[i / 8] & (1 << (i % 8))) != 0; jlink_tap_append_step(tms, tdi); } pending_scan_results_length++; diff --git a/src/jtag/jtag.h b/src/jtag/jtag.h index 951a25dae3..37adac7654 100644 --- a/src/jtag/jtag.h +++ b/src/jtag/jtag.h @@ -614,7 +614,7 @@ void jtag_add_clocks(int num_cycles); * matter if the operation was executed *before* jtag_execute_queue(), * jtag_execute_queue() will still return an error code. * - * All jtag_add_xxx() calls that have in_handler!=NULL will have been + * All jtag_add_xxx() calls that have in_handler != NULL will have been * executed when this fn returns, but if what has been queued only * clocks data out, without reading anything back, then JTAG could * be running *after* jtag_execute_queue() returns. The API does diff --git a/src/jtag/presto.c b/src/jtag/presto.c index 1331f2af84..bd1cc5d441 100644 --- a/src/jtag/presto.c +++ b/src/jtag/presto.c @@ -279,7 +279,7 @@ static int presto_open_ftd2xx(char *req_serial) if ((presto->status = FT_Read(presto->handle, &presto_data, 1, &ftbytes)) != FT_OK) return ERROR_JTAG_DEVICE_ERROR; - if (ftbytes!=1) + if (ftbytes != 1) { LOG_DEBUG("PRESTO reset"); @@ -313,7 +313,7 @@ static int presto_open_ftd2xx(char *req_serial) if ((presto->status = FT_Read(presto->handle, &presto_data, 1, &ftbytes)) != FT_OK) return ERROR_JTAG_DEVICE_ERROR; - if (ftbytes!=1) + if (ftbytes != 1) { LOG_DEBUG("PRESTO not responding"); return ERROR_JTAG_DEVICE_ERROR; diff --git a/src/jtag/tcl.c b/src/jtag/tcl.c index d09e78123b..2be7f87b6c 100644 --- a/src/jtag/tcl.c +++ b/src/jtag/tcl.c @@ -1262,7 +1262,7 @@ static int Jim_Command_drscan(Jim_Interp *interp, int argc, Jim_Obj *const *args * args[N-2] = "-endstate" * args[N-1] = statename */ - if ((argc < 4) || ((argc % 2)!=0)) + if ((argc < 4) || ((argc % 2) != 0)) { Jim_WrongNumArgs(interp, 1, args, "wrong arguments"); return JIM_ERR; diff --git a/src/jtag/zy1000/jtag_minidriver.h b/src/jtag/zy1000/jtag_minidriver.h index 496dfd2026..22307aa9df 100644 --- a/src/jtag/zy1000/jtag_minidriver.h +++ b/src/jtag/zy1000/jtag_minidriver.h @@ -79,7 +79,7 @@ static void setCurrentState(enum tap_state state) } /* - * Enter state and cause repeat transitions *out* of that state. So if the endState!=state, then + * Enter state and cause repeat transitions *out* of that state. So if the endState != state, then * the transition from state to endState counts as a transition out of state. */ static __inline__ void shiftValueInner(const enum tap_state state, const enum tap_state endState, int repeat, cyg_uint32 value) @@ -92,7 +92,7 @@ static __inline__ void shiftValueInner(const enum tap_state state, const enum ta ZY1000_POKE(ZY1000_JTAG_BASE+0xc, value); #if 1 #if TEST_MANUAL() - if ((state==TAP_DRSHIFT)&&(endState!=TAP_DRSHIFT)) + if ((state==TAP_DRSHIFT)&&(endState != TAP_DRSHIFT)) { int i; setCurrentState(state); @@ -100,7 +100,7 @@ static __inline__ void shiftValueInner(const enum tap_state state, const enum ta { int tms; tms=0; - if ((i==repeat-1)&&(state!=endState)) + if ((i==repeat-1)&&(state != endState)) { tms=1; } diff --git a/src/jtag/zy1000/zy1000.c b/src/jtag/zy1000/zy1000.c index 8f9b774f8c..d31b433660 100644 --- a/src/jtag/zy1000/zy1000.c +++ b/src/jtag/zy1000/zy1000.c @@ -133,7 +133,7 @@ void zy1000_reset(int trst, int srst) } else { - /* Danger!!! if clk!=0 when in + /* Danger!!! if clk != 0 when in * idle in TAP_IDLE, reset halt on str912 will fail. */ ZY1000_POKE(ZY1000_JTAG_BASE+0x10, 0x00000001); @@ -309,7 +309,7 @@ zylinjtag_Jim_Command_powerstatus(Jim_Interp *interp, cyg_uint32 status; ZY1000_PEEK(ZY1000_JTAG_BASE+0x10, status); - Jim_SetResult(interp, Jim_NewIntObj(interp, (status&0x80)!=0)); + Jim_SetResult(interp, Jim_NewIntObj(interp, (status&0x80) != 0)); return JIM_OK; } @@ -363,7 +363,7 @@ int interface_jtag_execute_queue(void) /* clear JTAG error register */ ZY1000_POKE(ZY1000_JTAG_BASE+0x14, 0x400); - if ((empty&0x400)!=0) + if ((empty&0x400) != 0) { LOG_WARNING("RCLK timeout"); /* the error is informative only as we don't want to break the firmware if there @@ -427,7 +427,7 @@ static __inline void scanFields(int num_fields, const scan_field_t *fields, tap_ // figure out where to store the input data int num_bits=fields[i].num_bits; - if (fields[i].in_value!=NULL) + if (fields[i].in_value != NULL) { inBuffer=fields[i].in_value; } @@ -453,7 +453,7 @@ static __inline void scanFields(int num_fields, const scan_field_t *fields, tap_ // we have (num_bits+7)/8 bytes of bits to toggle out. // bits are pushed out LSB to MSB value=0; - if (fields[i].out_value!=NULL) + if (fields[i].out_value != NULL) { for (l=0; lfd, &read_fds)!=0; + *got_data=FD_ISSET(connection->fd, &read_fds) != 0; return ERROR_OK; } @@ -313,7 +313,7 @@ int gdb_put_packet_inner(connection_t *connection, char *buffer, int len) int gotdata; for (;;) { - if ((retval=check_pending(connection, 0, &gotdata))!=ERROR_OK) + if ((retval=check_pending(connection, 0, &gotdata)) != ERROR_OK) return retval; if (!gotdata) break; @@ -600,11 +600,11 @@ int gdb_get_packet_inner(connection_t *connection, char *buffer, int *len) */ if (gdb_con->noack_mode) { - if ((retval=fetch_packet(connection, &checksum_ok, 1, len, buffer))!=ERROR_OK) + if ((retval=fetch_packet(connection, &checksum_ok, 1, len, buffer)) != ERROR_OK) return retval; } else { - if ((retval=fetch_packet(connection, &checksum_ok, 0, len, buffer))!=ERROR_OK) + if ((retval=fetch_packet(connection, &checksum_ok, 0, len, buffer)) != ERROR_OK) return retval; } @@ -1190,7 +1190,7 @@ int gdb_read_memory_packet(connection_t *connection, target_t *target, char *pac retval = target_read_buffer(target, addr, len, buffer); - if ((retval!=ERROR_OK)&&!gdb_report_data_abort) + if ((retval != ERROR_OK)&&!gdb_report_data_abort) { /* TODO : Here we have to lie and send back all zero's lest stack traces won't work. * At some point this might be fixed in GDB, in which case this code can be removed. @@ -1738,7 +1738,7 @@ int gdb_query_packet(connection_t *connection, target_t *target, char *packet, i p->base, p->size, blocksize); ram_start=p->base+p->size; } - if (ram_start!=0) + if (ram_start != 0) { xml_printf(&retval, &xml, &pos, &size, "\n", ram_start, 0-ram_start); @@ -2109,7 +2109,7 @@ int gdb_input_inner(connection_t *connection) log_add_callback(gdb_log_callback, connection); target_call_event_callbacks(target, TARGET_EVENT_GDB_START); int retval=gdb_step_continue_packet(connection, target, packet, packet_size); - if (retval!=ERROR_OK) + if (retval != ERROR_OK) { /* we'll never receive a halted condition... issue a false one.. */ gdb_frontend_halted(target, connection); diff --git a/src/server/httpd.c b/src/server/httpd.c index 2005a296a3..c19dc2b35c 100644 --- a/src/server/httpd.c +++ b/src/server/httpd.c @@ -142,7 +142,7 @@ httpd_Jim_Command_formfetch(Jim_Interp *interp, int argc, Jim_Obj *const *argv) { - if (argc!=2) + if (argc != 2) { Jim_WrongNumArgs(interp, 1, argv, "method ?args ...?"); return JIM_ERR; @@ -202,7 +202,7 @@ static void append_key(struct httpd_request *r, const char *key, Jim_Obj *dict = Jim_GetVariableStr(interp, "httppostdata", 0); - if (dict!=NULL) + if (dict != NULL) { if (Jim_DictKey(interp, dict, keyObj, &value, 0) != JIM_OK) { diff --git a/src/target/arm7_9_common.c b/src/target/arm7_9_common.c index 48ba007e6f..50b6d6a894 100644 --- a/src/target/arm7_9_common.c +++ b/src/target/arm7_9_common.c @@ -263,7 +263,7 @@ int arm7_9_set_breakpoint(struct target_s *target, breakpoint_t *breakpoint) } else if (breakpoint->type == BKPT_SOFT) { - if ((retval=arm7_9_set_software_breakpoints(arm7_9))!=ERROR_OK) + if ((retval=arm7_9_set_software_breakpoints(arm7_9)) != ERROR_OK) return retval; /* did we already set this breakpoint? */ @@ -922,7 +922,7 @@ int arm7_9_poll(target_t *target) { reg_t *reg = register_get_by_name(target->reg_cache, "pc", 1); uint32_t t=*((uint32_t *)reg->value); - if (t!=0) + if (t != 0) { LOG_ERROR("PC was not 0. Does this target need srst_pulls_trst?"); } @@ -1050,19 +1050,19 @@ int arm7_9_deassert_reset(target_t *target) jtag_add_reset(0, 0); enum reset_types jtag_reset_config = jtag_get_reset_config(); - if (target->reset_halt&&(jtag_reset_config & RESET_SRST_PULLS_TRST)!=0) + if (target->reset_halt&&(jtag_reset_config & RESET_SRST_PULLS_TRST) != 0) { LOG_WARNING("srst pulls trst - can not reset into halted mode. Issuing halt after reset."); /* set up embedded ice registers again */ if ((retval = target_examine_one(target)) != ERROR_OK) return retval; - if ((retval=target_poll(target))!=ERROR_OK) + if ((retval=target_poll(target)) != ERROR_OK) { return retval; } - if ((retval=target_halt(target))!=ERROR_OK) + if ((retval=target_halt(target)) != ERROR_OK) { return retval; } @@ -1147,7 +1147,7 @@ int arm7_9_soft_reset_halt(struct target_s *target) int i; int retval; - if ((retval=target_halt(target))!=ERROR_OK) + if ((retval=target_halt(target)) != ERROR_OK) return retval; long long then=timeval_ms(); @@ -1157,7 +1157,7 @@ int arm7_9_soft_reset_halt(struct target_s *target) if (buf_get_u32(dbg_stat->value, EICE_DBG_STATUS_DBGACK, 1) != 0) break; embeddedice_read_reg(dbg_stat); - if ((retval=jtag_execute_queue())!=ERROR_OK) + if ((retval=jtag_execute_queue()) != ERROR_OK) return retval; if (debug_level>=3) { @@ -2576,7 +2576,7 @@ static int arm7_9_dcc_completion(struct target_s *target, uint32_t exit_point, i armv4_5_common_t *armv4_5 = target->arch_info; arm7_9_common_t *arm7_9 = armv4_5->arch_info; - if ((retval=target_wait_state(target, TARGET_DEBUG_RUNNING, 500))!=ERROR_OK) + if ((retval=target_wait_state(target, TARGET_DEBUG_RUNNING, 500)) != ERROR_OK) return retval; int little=target->endianness==TARGET_LITTLE_ENDIAN; @@ -2677,7 +2677,7 @@ int arm7_9_bulk_write_memory(target_t *target, uint32_t address, uint32_t count, if (retval==ERROR_OK) { uint32_t endaddress=buf_get_u32(reg_params[0].value, 0, 32); - if (endaddress!=(address+count*4)) + if (endaddress != (address+count*4)) { LOG_ERROR("DCC write failed, expected end address 0x%08" PRIx32 " got 0x%0" PRIx32 "", (address+count*4), endaddress); retval=ERROR_FAIL; @@ -2734,7 +2734,7 @@ int arm7_9_checksum_memory(struct target_s *target, uint32_t address, uint32_t c /* convert flash writing code into a buffer in target endianness */ for (i = 0; i < (sizeof(arm7_9_crc_code)/sizeof(uint32_t)); i++) { - if ((retval=target_write_u32(target, crc_algorithm->address + i*sizeof(uint32_t), arm7_9_crc_code[i]))!=ERROR_OK) + if ((retval=target_write_u32(target, crc_algorithm->address + i*sizeof(uint32_t), arm7_9_crc_code[i])) != ERROR_OK) { return retval; } diff --git a/src/target/arm7tdmi.c b/src/target/arm7tdmi.c index 32f1830972..21fa108308 100644 --- a/src/target/arm7tdmi.c +++ b/src/target/arm7tdmi.c @@ -739,13 +739,13 @@ int arm7tdmi_examine(struct target_s *target) } target_set_examined(target); } - if ((retval=embeddedice_setup(target))!=ERROR_OK) + if ((retval=embeddedice_setup(target)) != ERROR_OK) return retval; - if ((retval=arm7_9_setup(target))!=ERROR_OK) + if ((retval=arm7_9_setup(target)) != ERROR_OK) return retval; if (arm7_9->etm_ctx) { - if ((retval=etm_setup(target))!=ERROR_OK) + if ((retval=etm_setup(target)) != ERROR_OK) return retval; } return ERROR_OK; diff --git a/src/target/arm9tdmi.c b/src/target/arm9tdmi.c index 07146c51cb..75ae3e8b78 100644 --- a/src/target/arm9tdmi.c +++ b/src/target/arm9tdmi.c @@ -831,13 +831,13 @@ int arm9tdmi_examine(struct target_s *target) } target_set_examined(target); } - if ((retval=embeddedice_setup(target))!=ERROR_OK) + if ((retval=embeddedice_setup(target)) != ERROR_OK) return retval; - if ((retval=arm7_9_setup(target))!=ERROR_OK) + if ((retval=arm7_9_setup(target)) != ERROR_OK) return retval; if (arm7_9->etm_ctx) { - if ((retval=etm_setup(target))!=ERROR_OK) + if ((retval=etm_setup(target)) != ERROR_OK) return retval; } return ERROR_OK; diff --git a/src/target/arm_adi_v5.c b/src/target/arm_adi_v5.c index c7d3bc4ae7..2584dbc6f2 100644 --- a/src/target/arm_adi_v5.c +++ b/src/target/arm_adi_v5.c @@ -195,7 +195,7 @@ int swjdp_transaction_endcheck(swjdp_common_t *swjdp) https://lists.berlios.de/pipermail/openocd-development/2008-September/003107.html */ - if ((retval=jtag_execute_queue())!=ERROR_OK) + if ((retval=jtag_execute_queue()) != ERROR_OK) { LOG_ERROR("BUG: Why does this fail the first time????"); } @@ -203,7 +203,7 @@ int swjdp_transaction_endcheck(swjdp_common_t *swjdp) #endif scan_inout_check_u32(swjdp, DAP_IR_DPACC, DP_CTRL_STAT, DPAP_READ, 0, &ctrlstat); - if ((retval=jtag_execute_queue())!=ERROR_OK) + if ((retval=jtag_execute_queue()) != ERROR_OK) return retval; swjdp->ack = swjdp->ack & 0x7; @@ -228,7 +228,7 @@ int swjdp_transaction_endcheck(swjdp_common_t *swjdp) } scan_inout_check_u32(swjdp, DAP_IR_DPACC, DP_CTRL_STAT, DPAP_READ, 0, &ctrlstat); - if ((retval=jtag_execute_queue())!=ERROR_OK) + if ((retval=jtag_execute_queue()) != ERROR_OK) return retval; swjdp->ack = swjdp->ack & 0x7; } @@ -261,19 +261,19 @@ int swjdp_transaction_endcheck(swjdp_common_t *swjdp) /* Clear Sticky Error Bits */ scan_inout_check_u32(swjdp, DAP_IR_DPACC, DP_CTRL_STAT, DPAP_WRITE, swjdp->dp_ctrl_stat | SSTICKYORUN | SSTICKYERR, NULL); scan_inout_check_u32(swjdp, DAP_IR_DPACC, DP_CTRL_STAT, DPAP_READ, 0, &ctrlstat); - if ((retval=jtag_execute_queue())!=ERROR_OK) + if ((retval=jtag_execute_queue()) != ERROR_OK) return retval; LOG_DEBUG("swjdp: status 0x%" PRIx32 "", ctrlstat); dap_ap_read_reg_u32(swjdp, AP_REG_CSW, &mem_ap_csw); dap_ap_read_reg_u32(swjdp, AP_REG_TAR, &mem_ap_tar); - if ((retval=jtag_execute_queue())!=ERROR_OK) + if ((retval=jtag_execute_queue()) != ERROR_OK) return retval; LOG_ERROR("Read MEM_AP_CSW 0x%" PRIx32 ", MEM_AP_TAR 0x%" PRIx32 "", mem_ap_csw, mem_ap_tar); } - if ((retval=jtag_execute_queue())!=ERROR_OK) + if ((retval=jtag_execute_queue()) != ERROR_OK) return retval; return ERROR_JTAG_DEVICE_ERROR; } @@ -971,7 +971,7 @@ int ahbap_debugport_init(swjdp_common_t *swjdp) dap_dp_write_reg(swjdp, swjdp->dp_ctrl_stat, DP_CTRL_STAT); dap_dp_read_reg(swjdp, &ctrlstat, DP_CTRL_STAT); - if ((retval=jtag_execute_queue())!=ERROR_OK) + if ((retval=jtag_execute_queue()) != ERROR_OK) return retval; /* Check that we have debug power domains activated */ @@ -979,7 +979,7 @@ int ahbap_debugport_init(swjdp_common_t *swjdp) { LOG_DEBUG("swjdp: wait CDBGPWRUPACK"); dap_dp_read_reg(swjdp, &ctrlstat, DP_CTRL_STAT); - if ((retval=jtag_execute_queue())!=ERROR_OK) + if ((retval=jtag_execute_queue()) != ERROR_OK) return retval; alive_sleep(10); } @@ -988,7 +988,7 @@ int ahbap_debugport_init(swjdp_common_t *swjdp) { LOG_DEBUG("swjdp: wait CSYSPWRUPACK"); dap_dp_read_reg(swjdp, &ctrlstat, DP_CTRL_STAT); - if ((retval=jtag_execute_queue())!=ERROR_OK) + if ((retval=jtag_execute_queue()) != ERROR_OK) return retval; alive_sleep(10); } @@ -1027,7 +1027,7 @@ int dap_info_command(struct command_context_s *cmd_ctx, swjdp_common_t *swjdp, i dap_ap_read_reg_u32(swjdp, 0xFC, &apid); swjdp_transaction_endcheck(swjdp); /* Now we read ROM table ID registers, ref. ARM IHI 0029B sec */ - mem_ap = ((apid&0x10000)&&((apid&0x0F)!=0)); + mem_ap = ((apid&0x10000)&&((apid&0x0F) != 0)); command_print(cmd_ctx, "ap identification register 0x%8.8" PRIx32 "", apid); if (apid) { diff --git a/src/target/arm_disassembler.c b/src/target/arm_disassembler.c index 9396ee0c2f..90442ea8a9 100644 --- a/src/target/arm_disassembler.c +++ b/src/target/arm_disassembler.c @@ -1435,7 +1435,7 @@ int evaluate_shift_imm_thumb(uint16_t opcode, uint32_t address, arm_instruction_ break; } - if ((imm==0) && (opc!=0)) + if ((imm==0) && (opc != 0)) imm = 32; instruction->info.data_proc.Rd = Rd; diff --git a/src/target/armv4_5.c b/src/target/armv4_5.c index 1817a3c985..b88cdc8c63 100644 --- a/src/target/armv4_5.c +++ b/src/target/armv4_5.c @@ -501,9 +501,9 @@ static int armv4_5_run_algorithm_completion(struct target_s *target, uint32_t ex } if (target->state != TARGET_HALTED) { - if ((retval=target_halt(target))!=ERROR_OK) + if ((retval=target_halt(target)) != ERROR_OK) return retval; - if ((retval=target_wait_state(target, TARGET_HALTED, 500))!=ERROR_OK) + if ((retval=target_wait_state(target, TARGET_HALTED, 500)) != ERROR_OK) { return retval; } @@ -618,7 +618,7 @@ int armv4_5_run_algorithm_inner(struct target_s *target, int num_mem_params, mem breakpoint_remove(target, exit_point); - if (retval!=ERROR_OK) + if (retval != ERROR_OK) return retval; for (i = 0; i < num_mem_params; i++) diff --git a/src/target/armv7m.c b/src/target/armv7m.c index eef9b50010..3e59040c5c 100644 --- a/src/target/armv7m.c +++ b/src/target/armv7m.c @@ -304,9 +304,9 @@ static int armv7m_run_and_wait(struct target_s *target, uint32_t entry_point, in /* If the target fails to halt due to the breakpoint, force a halt */ if (retval != ERROR_OK || target->state != TARGET_HALTED) { - if ((retval=target_halt(target))!=ERROR_OK) + if ((retval=target_halt(target)) != ERROR_OK) return retval; - if ((retval=target_wait_state(target, TARGET_HALTED, 500))!=ERROR_OK) + if ((retval=target_wait_state(target, TARGET_HALTED, 500)) != ERROR_OK) { return retval; } @@ -356,7 +356,7 @@ int armv7m_run_algorithm(struct target_s *target, int num_mem_params, mem_param_ for (i = 0; i < num_mem_params; i++) { - if ((retval=target_write_buffer(target, mem_params[i].address, mem_params[i].size, mem_params[i].value))!=ERROR_OK) + if ((retval=target_write_buffer(target, mem_params[i].address, mem_params[i].size, mem_params[i].value)) != ERROR_OK) return retval; } diff --git a/src/target/breakpoints.c b/src/target/breakpoints.c index b1faf5ad38..cffe1cb860 100644 --- a/src/target/breakpoints.c +++ b/src/target/breakpoints.c @@ -141,7 +141,7 @@ void breakpoint_remove(target_t *target, uint32_t address) void breakpoint_clear_target(target_t *target) { breakpoint_t *breakpoint; - while ((breakpoint = target->breakpoints)!=NULL) + while ((breakpoint = target->breakpoints) != NULL) { breakpoint_free(target, breakpoint); } @@ -260,7 +260,7 @@ void watchpoint_remove(target_t *target, uint32_t address) void watchpoint_clear_target(target_t *target) { watchpoint_t *watchpoint; - while ((watchpoint = target->watchpoints)!=NULL) + while ((watchpoint = target->watchpoints) != NULL) { watchpoint_free(target, watchpoint); } diff --git a/src/target/cortex_m3.c b/src/target/cortex_m3.c index 94fd687185..644f68161f 100644 --- a/src/target/cortex_m3.c +++ b/src/target/cortex_m3.c @@ -852,7 +852,7 @@ int cortex_m3_assert_reset(target_t *target) if (target->reset_halt) { int retval; - if ((retval = target_halt(target))!=ERROR_OK) + if ((retval = target_halt(target)) != ERROR_OK) return retval; } diff --git a/src/target/embeddedice.c b/src/target/embeddedice.c index acb4b6181d..92e322bd02 100644 --- a/src/target/embeddedice.c +++ b/src/target/embeddedice.c @@ -125,7 +125,7 @@ reg_cache_t* embeddedice_build_reg_cache(target_t *target, arm7_9_common_t *arm7 /* identify EmbeddedICE version by reading DCC control register */ embeddedice_read_reg(®_list[EICE_COMMS_CTRL]); - if ((retval=jtag_execute_queue())!=ERROR_OK) + if ((retval=jtag_execute_queue()) != ERROR_OK) { for (i = 0; i < num_regs; i++) { @@ -204,7 +204,7 @@ int embeddedice_setup(target_t *target) reg_t *dbg_ctrl = &arm7_9->eice_cache->reg_list[EICE_DBG_CTRL]; embeddedice_read_reg(dbg_ctrl); - if ((retval=jtag_execute_queue())!=ERROR_OK) + if ((retval=jtag_execute_queue()) != ERROR_OK) return retval; buf_set_u32(dbg_ctrl->value, 4, 1, 0); embeddedice_set_reg_w_exec(dbg_ctrl, dbg_ctrl->value); diff --git a/src/target/etm.c b/src/target/etm.c index 11cb4781e8..342ff91862 100644 --- a/src/target/etm.c +++ b/src/target/etm.c @@ -282,7 +282,7 @@ int etm_setup(target_t *target) buf_set_u32(etm_ctrl_reg->value, 0, etm_ctrl_reg->size, etm_ctrl_value); etm_store_reg(etm_ctrl_reg); - if ((retval=jtag_execute_queue())!=ERROR_OK) + if ((retval=jtag_execute_queue()) != ERROR_OK) return retval; if ((retval=etm_ctx->capture_driver->init(etm_ctx)) != ERROR_OK) diff --git a/src/target/feroceon.c b/src/target/feroceon.c index 0dc26dc0a6..b9339bf3c3 100644 --- a/src/target/feroceon.c +++ b/src/target/feroceon.c @@ -688,7 +688,7 @@ int feroceon_examine(struct target_s *target) int retval; retval = arm9tdmi_examine(target); - if (retval!=ERROR_OK) + if (retval != ERROR_OK) return retval; armv4_5 = target->arch_info; diff --git a/src/target/image.c b/src/target/image.c index d6042e46b8..66bcc95f37 100644 --- a/src/target/image.c +++ b/src/target/image.c @@ -64,7 +64,7 @@ static int autodetect_image_type(image_t *image, char *url) } fileio_close(&fileio); - if (retval!=ERROR_OK) + if (retval != ERROR_OK) return retval; /* check header against known signatures */ @@ -362,7 +362,7 @@ static int image_elf_read_headers(image_t *image) return ERROR_FILEIO_OPERATION_FAILED; } - if (strncmp((char*)elf->header->e_ident,ELFMAG,SELFMAG)!=0) + if (strncmp((char*)elf->header->e_ident,ELFMAG,SELFMAG) != 0) { LOG_ERROR("invalid ELF file, bad magic number"); return ERROR_IMAGE_FORMAT_ERROR; @@ -374,8 +374,8 @@ static int image_elf_read_headers(image_t *image) } elf->endianness = elf->header->e_ident[EI_DATA]; - if ((elf->endianness!=ELFDATA2LSB) - &&(elf->endianness!=ELFDATA2MSB)) + if ((elf->endianness != ELFDATA2LSB) + &&(elf->endianness != ELFDATA2MSB)) { LOG_ERROR("invalid ELF file, unknown endianess setting"); return ERROR_IMAGE_FORMAT_ERROR; diff --git a/src/target/mips_m4k.c b/src/target/mips_m4k.c index e4259ae631..f4c23d3407 100644 --- a/src/target/mips_m4k.c +++ b/src/target/mips_m4k.c @@ -314,7 +314,7 @@ int mips_m4k_assert_reset(target_t *target) if (target->reset_halt) { int retval; - if ((retval = target_halt(target))!=ERROR_OK) + if ((retval = target_halt(target)) != ERROR_OK) return retval; } diff --git a/src/target/target.c b/src/target/target.c index 7c2f8c5a31..5ff223242e 100644 --- a/src/target/target.c +++ b/src/target/target.c @@ -1088,7 +1088,7 @@ int target_arch_state(struct target_s *target) LOG_USER("target state: %s", Jim_Nvp_value2name_simple(nvp_target_state,target->state)->name); - if (target->state!=TARGET_HALTED) + if (target->state != TARGET_HALTED) return ERROR_OK; retval=target->type->arch_state(target); @@ -1584,7 +1584,7 @@ static int sense_handler(void) static int prevPowerdropout = 0; int retval; - if ((retval=jtag_power_dropout(&powerDropout))!=ERROR_OK) + if ((retval=jtag_power_dropout(&powerDropout)) != ERROR_OK) return retval; int powerRestored; @@ -1603,7 +1603,7 @@ static int sense_handler(void) lastPower = current; } - if ((retval=jtag_srst_asserted(&srstAsserted))!=ERROR_OK) + if ((retval=jtag_srst_asserted(&srstAsserted)) != ERROR_OK) return retval; int srstDeasserted; @@ -1909,7 +1909,7 @@ int target_wait_state(target_t *target, enum target_state state, int ms) for (;;) { - if ((retval=target_poll(target))!=ERROR_OK) + if ((retval=target_poll(target)) != ERROR_OK) return retval; if (target->state == state) { @@ -2872,7 +2872,7 @@ static void writeGmon(uint32_t *samples, uint32_t sampleNum, char *filename) /*append binary memory gmon.out profile_hist_data (profile_hist_data + profile_hist_hdr.hist_size) */ char *data=malloc(2*length); - if (data!=NULL) + if (data != NULL) { for (i=0; iname, Jim_GetString( teap->body, NULL ) ); - if (Jim_EvalObj( interp, teap->body )!=JIM_OK) + if (Jim_EvalObj( interp, teap->body ) != JIM_OK) { Jim_PrintErrorMessage(interp); } @@ -4386,7 +4386,7 @@ static struct FastLoad *fastload; static void free_fastload(void) { - if (fastload!=NULL) + if (fastload != NULL) { int i; for (i=0; ihigh_vectors[i]); if (retval == ERROR_TARGET_TIMEOUT) return retval; - if (retval!=ERROR_OK) + if (retval != ERROR_OK) { /* Some of these reads will fail as part of normal execution */ xscale->high_vectors[i] = ARMV4_5_B(0xfffffe, 0); @@ -908,7 +908,7 @@ int xscale_update_vectors(target_t *target) retval=target_read_u32(target, 0x0 + 4*i, &xscale->low_vectors[i]); if (retval == ERROR_TARGET_TIMEOUT) return retval; - if (retval!=ERROR_OK) + if (retval != ERROR_OK) { /* Some of these reads will fail as part of normal execution */ xscale->low_vectors[i] = ARMV4_5_B(0xfffffe, 0); @@ -1028,11 +1028,11 @@ int xscale_debug_entry(target_t *target) /* clear external dbg break (will be written on next DCSR read) */ xscale->external_debug_break = 0; - if ((retval=xscale_read_dcsr(target))!=ERROR_OK) + if ((retval=xscale_read_dcsr(target)) != ERROR_OK) return retval; /* get r0, pc, r1 to r7 and cpsr */ - if ((retval=xscale_receive(target, buffer, 10))!=ERROR_OK) + if ((retval=xscale_receive(target, buffer, 10)) != ERROR_OK) return retval; /* move r0 from buffer to register cache */ @@ -1253,7 +1253,7 @@ int xscale_enable_single_step(struct target_s *target, uint32_t next_pc) } } - if ((retval=xscale_set_reg_u32(ibcr0, next_pc | 0x1))!=ERROR_OK) + if ((retval=xscale_set_reg_u32(ibcr0, next_pc | 0x1)) != ERROR_OK) return retval; return ERROR_OK; @@ -1266,7 +1266,7 @@ int xscale_disable_single_step(struct target_s *target) reg_t *ibcr0 = &xscale->reg_cache->reg_list[XSCALE_IBCR0]; int retval; - if ((retval=xscale_set_reg_u32(ibcr0, 0x0))!=ERROR_OK) + if ((retval=xscale_set_reg_u32(ibcr0, 0x0)) != ERROR_OK) return retval; return ERROR_OK; @@ -1297,7 +1297,7 @@ int xscale_resume(struct target_s *target, int current, uint32_t address, int ha } /* update vector tables */ - if ((retval=xscale_update_vectors(target))!=ERROR_OK) + if ((retval=xscale_update_vectors(target)) != ERROR_OK) return retval; /* current = 1: continue on current pc, otherwise continue at
*/ @@ -1451,56 +1451,56 @@ static int xscale_step_inner(struct target_s *target, int current, uint32_t addr } LOG_DEBUG("enable single-step"); - if ((retval=xscale_enable_single_step(target, next_pc))!=ERROR_OK) + if ((retval=xscale_enable_single_step(target, next_pc)) != ERROR_OK) return retval; /* restore banked registers */ - if ((retval=xscale_restore_context(target))!=ERROR_OK) + if ((retval=xscale_restore_context(target)) != ERROR_OK) return retval; /* send resume request (command 0x30 or 0x31) * clean the trace buffer if it is to be enabled (0x62) */ if (xscale->trace.buffer_enabled) { - if ((retval=xscale_send_u32(target, 0x62))!=ERROR_OK) + if ((retval=xscale_send_u32(target, 0x62)) != ERROR_OK) return retval; - if ((retval=xscale_send_u32(target, 0x31))!=ERROR_OK) + if ((retval=xscale_send_u32(target, 0x31)) != ERROR_OK) return retval; } else - if ((retval=xscale_send_u32(target, 0x30))!=ERROR_OK) + if ((retval=xscale_send_u32(target, 0x30)) != ERROR_OK) return retval; /* send CPSR */ - if ((retval=xscale_send_u32(target, buf_get_u32(armv4_5->core_cache->reg_list[ARMV4_5_CPSR].value, 0, 32)))!=ERROR_OK) + if ((retval=xscale_send_u32(target, buf_get_u32(armv4_5->core_cache->reg_list[ARMV4_5_CPSR].value, 0, 32))) != ERROR_OK) return retval; LOG_DEBUG("writing cpsr with value 0x%8.8" PRIx32 "", buf_get_u32(armv4_5->core_cache->reg_list[ARMV4_5_CPSR].value, 0, 32)); for (i = 7; i >= 0; i--) { /* send register */ - if ((retval=xscale_send_u32(target, buf_get_u32(armv4_5->core_cache->reg_list[i].value, 0, 32)))!=ERROR_OK) + if ((retval=xscale_send_u32(target, buf_get_u32(armv4_5->core_cache->reg_list[i].value, 0, 32))) != ERROR_OK) return retval; LOG_DEBUG("writing r%i with value 0x%8.8" PRIx32 "", i, buf_get_u32(armv4_5->core_cache->reg_list[i].value, 0, 32)); } /* send PC */ - if ((retval=xscale_send_u32(target, buf_get_u32(armv4_5->core_cache->reg_list[15].value, 0, 32)))!=ERROR_OK) + if ((retval=xscale_send_u32(target, buf_get_u32(armv4_5->core_cache->reg_list[15].value, 0, 32))) != ERROR_OK) return retval; LOG_DEBUG("writing PC with value 0x%8.8" PRIx32, buf_get_u32(armv4_5->core_cache->reg_list[15].value, 0, 32)); target_call_event_callbacks(target, TARGET_EVENT_RESUMED); /* registers are now invalid */ - if ((retval=armv4_5_invalidate_core_regs(target))!=ERROR_OK) + if ((retval=armv4_5_invalidate_core_regs(target)) != ERROR_OK) return retval; /* wait for and process debug entry */ - if ((retval=xscale_debug_entry(target))!=ERROR_OK) + if ((retval=xscale_debug_entry(target)) != ERROR_OK) return retval; LOG_DEBUG("disable single-step"); - if ((retval=xscale_disable_single_step(target))!=ERROR_OK) + if ((retval=xscale_disable_single_step(target)) != ERROR_OK) return retval; target_call_event_callbacks(target, TARGET_EVENT_HALTED); @@ -1531,7 +1531,7 @@ int xscale_step(struct target_s *target, int current, uint32_t address, int hand /* if we're at the reset vector, we have to simulate the step */ if (current_pc == 0x0) { - if ((retval=arm_simulate_step(target, NULL))!=ERROR_OK) + if ((retval=arm_simulate_step(target, NULL)) != ERROR_OK) return retval; current_pc = buf_get_u32(armv4_5->core_cache->reg_list[15].value, 0, 32); @@ -1545,7 +1545,7 @@ int xscale_step(struct target_s *target, int current, uint32_t address, int hand if (handle_breakpoints) if ((breakpoint = breakpoint_find(target, buf_get_u32(armv4_5->core_cache->reg_list[15].value, 0, 32)))) { - if ((retval=xscale_unset_breakpoint(target, breakpoint))!=ERROR_OK) + if ((retval=xscale_unset_breakpoint(target, breakpoint)) != ERROR_OK) return retval; } @@ -1597,7 +1597,7 @@ int xscale_assert_reset(target_t *target) if (target->reset_halt) { int retval; - if ((retval = target_halt(target))!=ERROR_OK) + if ((retval = target_halt(target)) != ERROR_OK) return retval; } @@ -1930,20 +1930,20 @@ int xscale_read_memory(struct target_s *target, uint32_t address, uint32_t size, return ERROR_TARGET_UNALIGNED_ACCESS; /* send memory read request (command 0x1n, n: access size) */ - if ((retval=xscale_send_u32(target, 0x10 | size))!=ERROR_OK) + if ((retval=xscale_send_u32(target, 0x10 | size)) != ERROR_OK) return retval; /* send base address for read request */ - if ((retval=xscale_send_u32(target, address))!=ERROR_OK) + if ((retval=xscale_send_u32(target, address)) != ERROR_OK) return retval; /* send number of requested data words */ - if ((retval=xscale_send_u32(target, count))!=ERROR_OK) + if ((retval=xscale_send_u32(target, count)) != ERROR_OK) return retval; /* receive data from target (count times 32-bit words in host endianness) */ buf32 = malloc(4 * count); - if ((retval=xscale_receive(target, buf32, count))!=ERROR_OK) + if ((retval=xscale_receive(target, buf32, count)) != ERROR_OK) return retval; /* extract data from host-endian buffer into byte stream */ @@ -1971,12 +1971,12 @@ int xscale_read_memory(struct target_s *target, uint32_t address, uint32_t size, free(buf32); /* examine DCSR, to see if Sticky Abort (SA) got set */ - if ((retval=xscale_read_dcsr(target))!=ERROR_OK) + if ((retval=xscale_read_dcsr(target)) != ERROR_OK) return retval; if (buf_get_u32(xscale->reg_cache->reg_list[XSCALE_DCSR].value, 5, 1) == 1) { /* clear SA bit */ - if ((retval=xscale_send_u32(target, 0x60))!=ERROR_OK) + if ((retval=xscale_send_u32(target, 0x60)) != ERROR_OK) return retval; return ERROR_TARGET_DATA_ABORT; @@ -2007,15 +2007,15 @@ int xscale_write_memory(struct target_s *target, uint32_t address, uint32_t size return ERROR_TARGET_UNALIGNED_ACCESS; /* send memory write request (command 0x2n, n: access size) */ - if ((retval=xscale_send_u32(target, 0x20 | size))!=ERROR_OK) + if ((retval=xscale_send_u32(target, 0x20 | size)) != ERROR_OK) return retval; /* send base address for read request */ - if ((retval=xscale_send_u32(target, address))!=ERROR_OK) + if ((retval=xscale_send_u32(target, address)) != ERROR_OK) return retval; /* send number of requested data words to be written*/ - if ((retval=xscale_send_u32(target, count))!=ERROR_OK) + if ((retval=xscale_send_u32(target, count)) != ERROR_OK) return retval; /* extract data from host-endian buffer into byte stream */ @@ -2045,16 +2045,16 @@ int xscale_write_memory(struct target_s *target, uint32_t address, uint32_t size } } #endif - if ((retval=xscale_send(target, buffer, count, size))!=ERROR_OK) + if ((retval=xscale_send(target, buffer, count, size)) != ERROR_OK) return retval; /* examine DCSR, to see if Sticky Abort (SA) got set */ - if ((retval=xscale_read_dcsr(target))!=ERROR_OK) + if ((retval=xscale_read_dcsr(target)) != ERROR_OK) return retval; if (buf_get_u32(xscale->reg_cache->reg_list[XSCALE_DCSR].value, 5, 1) == 1) { /* clear SA bit */ - if ((retval=xscale_send_u32(target, 0x60))!=ERROR_OK) + if ((retval=xscale_send_u32(target, 0x60)) != ERROR_OK) return retval; return ERROR_TARGET_DATA_ABORT; -- 2.30.2