From 1fafb669c99744b986d85b5c4a4e276767898654 Mon Sep 17 00:00:00 2001 From: Spencer Oliver Date: Thu, 28 Oct 2010 09:19:37 +0100 Subject: [PATCH] contrib: add ram loader src code Add src code for ram loaders to contrib directory. Signed-off-by: Spencer Oliver --- contrib/loaders/README | 33 +++++++ contrib/loaders/checksum/armv4_5_crc.s | 58 +++++++++++ contrib/loaders/checksum/armv7m_crc.s | 66 +++++++++++++ contrib/loaders/checksum/mips32.s | 72 ++++++++++++++ contrib/loaders/flash/pic32mx.s | 131 +++++++++++++++++++++++++ contrib/loaders/flash/stellaris.s | 66 +++++++++++++ contrib/loaders/flash/stm32x.s | 52 ++++++++++ contrib/loaders/flash/str7x.s | 57 +++++++++++ contrib/loaders/flash/str9x.s | 54 ++++++++++ 9 files changed, 589 insertions(+) create mode 100644 contrib/loaders/README create mode 100644 contrib/loaders/checksum/armv4_5_crc.s create mode 100644 contrib/loaders/checksum/armv7m_crc.s create mode 100644 contrib/loaders/checksum/mips32.s create mode 100644 contrib/loaders/flash/pic32mx.s create mode 100644 contrib/loaders/flash/stellaris.s create mode 100644 contrib/loaders/flash/stm32x.s create mode 100644 contrib/loaders/flash/str7x.s create mode 100644 contrib/loaders/flash/str9x.s diff --git a/contrib/loaders/README b/contrib/loaders/README new file mode 100644 index 0000000000..2b123cf681 --- /dev/null +++ b/contrib/loaders/README @@ -0,0 +1,33 @@ +Included in these directories are the src to the various ram loaders used +within openocd. + +** target checksum loaders ** + +checksum/armv4_5_crc.s : + - ARMv4 and ARMv5 checksum loader : see target/arm_crc_code.c:arm_crc_code + +checksum/armv7m_crc.s : + - ARMv7m checksum loader : see target/armv7m.c:cortex_m3_crc_code + +checksum/mips32.s : + - MIPS32 checksum loader : see target/mips32.c:mips_crc_code + +** target flash loaders ** + +flash/pic32mx.s : + - Microchip PIC32 flash loader : see flash/nor/pic32mx.c:pic32mx_flash_write_code + +flash/stellaris.s : + - TI Stellaris flash loader : see flash/nor/stellaris.c:stellaris_write_code + +flash/stm32x.s : + - ST STM32 flash loader : see flash/nor/stm32x.c:stm32x_flash_write_code + +flash/str7x.s : + - ST STR7 flash loader : see flash/nor/str7x.c:str7x_flash_write_code + +flash/str9x.s : + - ST STR9 flash loader : see flash/nor/str9x.c:str9x_flash_write_code + +Spencer Oliver +spen@spen-soft.co.uk diff --git a/contrib/loaders/checksum/armv4_5_crc.s b/contrib/loaders/checksum/armv4_5_crc.s new file mode 100644 index 0000000000..950a8d0ed2 --- /dev/null +++ b/contrib/loaders/checksum/armv4_5_crc.s @@ -0,0 +1,58 @@ +/*************************************************************************** + * Copyright (C) 2010 by Spencer Oliver * + * spen@spen-soft.co.uk * + * * + * This program is free software; you can redistribute it and/or modify * + * it under the terms of the GNU General Public License as published by * + * the Free Software Foundation; either version 2 of the License, or * + * (at your option) any later version. * + * * + * This program is distributed in the hope that it will be useful, * + * but WITHOUT ANY WARRANTY; without even the implied warranty of * + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * + * GNU General Public License for more details. * + * * + * You should have received a copy of the GNU General Public License * + * along with this program; if not, write to the * + * Free Software Foundation, Inc., * + * 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. * + ***************************************************************************/ + +/* + r0 - address in - crc out + r1 - char count +*/ + + .text + .arm + +_start: +main: + mov r2, r0 + mov r0, #0xffffffff /* crc */ + mov r3, r1 + mov r4, #0 + b ncomp +nbyte: + ldrb r1, [r2, r4] + ldr r7, CRC32XOR + eor r0, r0, r1, asl #24 + mov r5, #0 +loop: + cmp r0, #0 + mov r6, r0, asl #1 + add r5, r5, #1 + mov r0, r6 + eorlt r0, r6, r7 + cmp r5, #8 + bne loop + add r4, r4, #1 +ncomp: + cmp r4, r3 + bne nbyte +end: + bkpt #0 + +CRC32XOR: .word 0x04c11db7 + + .end diff --git a/contrib/loaders/checksum/armv7m_crc.s b/contrib/loaders/checksum/armv7m_crc.s new file mode 100644 index 0000000000..e50db0a7bd --- /dev/null +++ b/contrib/loaders/checksum/armv7m_crc.s @@ -0,0 +1,66 @@ +/*************************************************************************** + * Copyright (C) 2010 by Spencer Oliver * + * spen@spen-soft.co.uk * + * * + * This program is free software; you can redistribute it and/or modify * + * it under the terms of the GNU General Public License as published by * + * the Free Software Foundation; either version 2 of the License, or * + * (at your option) any later version. * + * * + * This program is distributed in the hope that it will be useful, * + * but WITHOUT ANY WARRANTY; without even the implied warranty of * + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * + * GNU General Public License for more details. * + * * + * You should have received a copy of the GNU General Public License * + * along with this program; if not, write to the * + * Free Software Foundation, Inc., * + * 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. * + ***************************************************************************/ + +/* + parameters: + r0 - address in - crc out + r1 - char count +*/ + + .text + .syntax unified + .cpu cortex-m3 + .thumb + .thumb_func + + .align 2 + +_start: +main: + mov r2, r0 + mov r0, #0xffffffff /* crc */ + mov r3, r1 + mov r4, #0 + b ncomp +nbyte: + ldrb r1, [r2, r4] + + ldr r7, CRC32XOR + eor r0, r0, r1, asl #24 + mov r5, #0 +loop: + cmp r0, #0 + mov r6, r0, asl #1 + add r5, r5, #1 + mov r0, r6 + it lt + eorlt r0, r6, r7 + cmp r5, #8 + bne loop + + add r4, r4, #1 +ncomp: + cmp r4, r3 + bne nbyte + bkpt #0 + +CRC32XOR: .word 0x04c11db7 + + .end diff --git a/contrib/loaders/checksum/mips32.s b/contrib/loaders/checksum/mips32.s new file mode 100644 index 0000000000..f8f08a2306 --- /dev/null +++ b/contrib/loaders/checksum/mips32.s @@ -0,0 +1,72 @@ +/*************************************************************************** + * Copyright (C) 2010 by Spencer Oliver * + * spen@spen-soft.co.uk * + * * + * This program is free software; you can redistribute it and/or modify * + * it under the terms of the GNU General Public License as published by * + * the Free Software Foundation; either version 2 of the License, or * + * (at your option) any later version. * + * * + * This program is distributed in the hope that it will be useful, * + * but WITHOUT ANY WARRANTY; without even the implied warranty of * + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * + * GNU General Public License for more details. * + * * + * You should have received a copy of the GNU General Public License * + * along with this program; if not, write to the * + * Free Software Foundation, Inc., * + * 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. * + ***************************************************************************/ + + .global main + .text + .set noreorder + +/* params: + * $a0 address in + * $a1 byte count + * vars + * $a0 crc + * $a1 crc data byte + * temps: + * t3 v0 a3 a2 t0 v1 + */ + +.ent main +main: + addiu $t4, $a0, 0 /* address in */ + addiu $t2, $a1, 0 /* count */ + + addiu $a0, $zero, 0xffffffff /* a0 crc - result */ + + beq $zero, $zero, ncomp + addiu $t3, $zero, 0 /* clear bytes read */ + +nbyte: + lb $a1, ($t4) /* load byte from source address */ + addi $t4, $t4, 1 /* inc byte count */ + +crc: + sll $a1, $a1, 24 + lui $v0, 0x04c1 + xor $a0, $a0, $a1 + ori $a3, $v0, 0x1db7 + addu $a2, $zero, $zero /* clear bit count */ +loop: + sll $t0, $a0, 1 + addiu $a2, $a2, 1 /* inc bit count */ + slti $a0, $a0, 0 + xor $t1, $t0, $a3 + movn $t0, $t1, $a0 + slti $v1, $a2, 8 /* 8bits processed */ + bne $v1, $zero, loop + addu $a0, $t0, $zero + +ncomp: + bne $t2, $t3, nbyte /* all bytes processed */ + addiu $t3, $t3, 1 + +wait: + sdbbp + +.end main diff --git a/contrib/loaders/flash/pic32mx.s b/contrib/loaders/flash/pic32mx.s new file mode 100644 index 0000000000..b26ff61134 --- /dev/null +++ b/contrib/loaders/flash/pic32mx.s @@ -0,0 +1,131 @@ +/*************************************************************************** + * Copyright (C) 2010 by Spencer Oliver * + * spen@spen-soft.co.uk * + * * + * This program is free software; you can redistribute it and/or modify * + * it under the terms of the GNU General Public License as published by * + * the Free Software Foundation; either version 2 of the License, or * + * (at your option) any later version. * + * * + * This program is distributed in the hope that it will be useful, * + * but WITHOUT ANY WARRANTY; without even the implied warranty of * + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * + * GNU General Public License for more details. * + * * + * You should have received a copy of the GNU General Public License * + * along with this program; if not, write to the * + * Free Software Foundation, Inc., * + * 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. * + ***************************************************************************/ + + .text + .set noreorder + .set noat + +/* params: + * $a0 src adr - ram + result + * $a1 dest adr - flash + * $a2 count (32bit words) + * vars + * + * temps: + * $t0, $t1, $t2, $t3, $t4, $t5 + * $s0, $s1, $s3, $s4, $s5 + */ + + .type main, @function + .global main + +.ent main +main: + /* setup constants */ + lui $t0, 0xaa99 + ori $t0, 0x6655 /* NVMKEY1 */ + lui $t1, 0x5566 + ori $t1, 0x99AA /* NVMKEY2 */ + lui $t2, 0xBF80 + ori $t2, 0xF400 /* NVMCON */ + ori $t3, $zero, 0x4003 /* NVMCON row write cmd */ + ori $t4, $zero, 0x8000 /* NVMCON start cmd */ + +write_row: + /* can we perform a row write: 128 32bit words */ + sltiu $s3, $a2, 128 + bne $s3, $zero, write_word + ori $t5, $zero, 0x4000 /* NVMCON clear cmd */ + + /* perform row write 512 bytes */ + sw $a1, 32($t2) /* set NVMADDR with dest addr - real addr */ + sw $a0, 64($t2) /* set NVMSRCADDR with src addr - real addr */ + + bal progflash + addiu $a0, $a0, 512 + addiu $a1, $a1, 512 + beq $zero, $zero, write_row + addiu $a2, $a2, -128 + +write_word: + /* write 32bit words */ + lui $s5, 0xa000 + ori $s5, 0x0000 + or $a0, $a0, $s5 /* convert to virtual addr */ + + beq $zero, $zero, next_word + ori $t3, $zero, 0x4001 /* NVMCON word write cmd */ + +prog_word: + lw $s4, 0($a0) /* load data - from virtual addr */ + sw $s4, 48($t2) /* set NVMDATA with data */ + sw $a1, 32($t2) /* set NVMADDR with dest addr - real addr */ + + bal progflash + addiu $a0, $a0, 4 + addiu $a1, $a1, 4 + addiu $a2, $a2, -1 +next_word: + bne $a2, $zero, prog_word + nop + +done: + beq $zero, $zero, exit + addiu $a0, $zero, 0 + +error: + /* save result to $a0 */ + addiu $a0, $s1, 0 + +exit: + sdbbp +.end main + + .type progflash, @function + .global progflash + +.ent progflash +progflash: + sw $t3, 0($t2) /* set NVMWREN */ + sw $t0, 16($t2) /* write NVMKEY1 */ + sw $t1, 16($t2) /* write NVMKEY2 */ + sw $t4, 8($t2) /* start operation */ + +waitflash: + lw $s0, 0($t2) + and $s0, $s0, $t4 + bne $s0, $zero, waitflash + nop + + /* following is to comply with errata #34 + * 500ns delay required */ + nop + nop + nop + nop + /* check for errors */ + lw $s1, 0($t2) + andi $s1, $zero, 0x3000 + bne $s1, $zero, error + sw $t5, 4($t2) /* clear NVMWREN */ + jr $ra + nop + +.end progflash diff --git a/contrib/loaders/flash/stellaris.s b/contrib/loaders/flash/stellaris.s new file mode 100644 index 0000000000..166dd52ac8 --- /dev/null +++ b/contrib/loaders/flash/stellaris.s @@ -0,0 +1,66 @@ +/*************************************************************************** + * Copyright (C) 2006 by Magnus Lundin * + * lundin@mlu.mine.nu * + * * + * Copyright (C) 2008 by Spencer Oliver * + * spen@spen-soft.co.uk * + * * + * This program is free software; you can redistribute it and/or modify * + * it under the terms of the GNU General Public License as published by * + * the Free Software Foundation; either version 2 of the License, or * + * (at your option) any later version. * + * * + * This program is distributed in the hope that it will be useful, * + * but WITHOUT ANY WARRANTY; without even the implied warranty of * + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * + * GNU General Public License for more details. * + * * + * You should have received a copy of the GNU General Public License * + * along with this program; if not, write to the * + * Free Software Foundation, Inc., * + * 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. * + ***************************************************************************/ + + .text + .syntax unified + .cpu cortex-m3 + .thumb + .thumb_func + .align 2 + +/* + Call with : + r0 = buffer address + r1 = destination address + r2 = bytecount (in) - endaddr (work) + + Used registers: + r3 = pFLASH_CTRL_BASE + r4 = FLASHWRITECMD + r5 = #1 + r6 = bytes written + r7 = temp reg +*/ + +write: + ldr r3,pFLASH_CTRL_BASE + ldr r4,FLASHWRITECMD + movs r5, 1 + movs r6, #0 +mainloop: + str r1, [r3, #0] + ldr r7, [r0, r6] + str r7, [r3, #4] + str r4, [r3, #8] +waitloop: + ldr r7, [r3, #8] + tst r7, r5 + bne waitloop + adds r1, r1, #4 + adds r6, r6, #4 + cmp r6, r2 + bne mainloop + bkpt #0 + +pFLASH_CTRL_BASE: .word 0x400FD000 +FLASHWRITECMD: .word 0xA4420001 diff --git a/contrib/loaders/flash/stm32x.s b/contrib/loaders/flash/stm32x.s new file mode 100644 index 0000000000..dcf2b83ccc --- /dev/null +++ b/contrib/loaders/flash/stm32x.s @@ -0,0 +1,52 @@ +/*************************************************************************** + * Copyright (C) 2010 by Spencer Oliver * + * spen@spen-soft.co.uk * + * * + * This program is free software; you can redistribute it and/or modify * + * it under the terms of the GNU General Public License as published by * + * the Free Software Foundation; either version 2 of the License, or * + * (at your option) any later version. * + * * + * This program is distributed in the hope that it will be useful, * + * but WITHOUT ANY WARRANTY; without even the implied warranty of * + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * + * GNU General Public License for more details. * + * * + * You should have received a copy of the GNU General Public License * + * along with this program; if not, write to the * + * Free Software Foundation, Inc., * + * 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. * + ***************************************************************************/ + + .text + .arm + +/* + r0 - source address + r1 - target address + r2 - count (halfword-16bit) + r3 - result + r4 - temp + r5 - temp +*/ + +write: + ldr r4, STM32_FLASH_CR + ldr r5, STM32_FLASH_SR + mov r3, #1 + str r3, [r4, #0] + ldrh r3, [r0], #2 + strh r3, [r1], #2 +busy: + ldr r3, [r5, #0] + tst r3, #0x01 + beq busy + tst r3, #0x14 + bne exit + subs r2, r2, #1 + bne write +exit: + bkpt #0 + +STM32_FLASH_CR: .word 0x40022010 +STM32_FLASH_SR: .word 0x4002200C diff --git a/contrib/loaders/flash/str7x.s b/contrib/loaders/flash/str7x.s new file mode 100644 index 0000000000..fcdb007d88 --- /dev/null +++ b/contrib/loaders/flash/str7x.s @@ -0,0 +1,57 @@ +/*************************************************************************** + * Copyright (C) 2010 by Spencer Oliver * + * spen@spen-soft.co.uk * + * * + * This program is free software; you can redistribute it and/or modify * + * it under the terms of the GNU General Public License as published by * + * the Free Software Foundation; either version 2 of the License, or * + * (at your option) any later version. * + * * + * This program is distributed in the hope that it will be useful, * + * but WITHOUT ANY WARRANTY; without even the implied warranty of * + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * + * GNU General Public License for more details. * + * * + * You should have received a copy of the GNU General Public License * + * along with this program; if not, write to the * + * Free Software Foundation, Inc., * + * 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. * + ***************************************************************************/ + + .text + .arm + .section .init +/* + r0 source address + r1 address + r2 FLASH_CR0 + r3 dword count + r4 result + r5 busy mask +*/ + +write: + mov r4, #0x10000000 /* set DWPG bit */ + str r4, [r2, #0x0] /* FLASH_CR0 */ + str r1, [r2, #0x10] /* FLASH_AR */ + ldr r4, [r0], #4 /* load data */ + str r4, [r2, #0x8] /* FLASH_DR0 */ + ldr r4, [r0], #4 /* load data */ + str r4, [r2, #0xc] /* FLASH_DR1 */ + mov r4, #0x90000000 /* set DWPG and WMS bits */ + str r4, [r2, #0x0] /* FLASH_CR0 */ +busy: + ldr r4, [r2, #0x0] /* FLASH_CR0 */ + tst r4, r5 + bne busy + ldr r4, [r2, #0x14] /* FLASH_ER */ + tst r4, #0xff /* do we have errors */ + tsteq r4, #0x100 /* write protection set */ + bne exit + add r1, r1, #0x8 /* next 8 bytes */ + subs r3, r3, #1 /* decremment dword count */ + bne write +exit: + b exit + + .end diff --git a/contrib/loaders/flash/str9x.s b/contrib/loaders/flash/str9x.s new file mode 100644 index 0000000000..9b15b3dedd --- /dev/null +++ b/contrib/loaders/flash/str9x.s @@ -0,0 +1,54 @@ +/*************************************************************************** + * Copyright (C) 2010 by Spencer Oliver * + * spen@spen-soft.co.uk * + * * + * This program is free software; you can redistribute it and/or modify * + * it under the terms of the GNU General Public License as published by * + * the Free Software Foundation; either version 2 of the License, or * + * (at your option) any later version. * + * * + * This program is distributed in the hope that it will be useful, * + * but WITHOUT ANY WARRANTY; without even the implied warranty of * + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * + * GNU General Public License for more details. * + * * + * You should have received a copy of the GNU General Public License * + * along with this program; if not, write to the * + * Free Software Foundation, Inc., * + * 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. * + ***************************************************************************/ + + .text + .arm + .section .init +/* + r0 source address (in) + r1 target address (in) + r2 word count (in) + r3 result (out) +*/ + +write: + bic r4, r1, #3 /* word address */ + mov r3, #0x40 /* write command */ + strh r3, [r4, #0] + ldrh r3, [r0], #2 /* read data */ + strh r3, [r1], #2 /* write data */ + mov r3, #0x70 /* status command */ + strh r3, [r4, #0] +busy: + ldrb r3, [r4, #0] /* status */ + tst r3, #0x80 + beq busy + mov r5, #0x50 /* clear status command */ + strh r5, [r4, #0] + mov r5, #0xFF /* read array */ + strh r5, [r4, #0] + tst r3, #0x12 + bne exit + subs r2, r2, #1 /* decremment word count */ + bne write +exit: + bkpt #0 + + .end -- 2.30.2