From 111dcbeb1a54f629866449efe0c3b17ec1ab8957 Mon Sep 17 00:00:00 2001 From: Tomas Vanek Date: Mon, 8 Nov 2021 15:40:24 +0100 Subject: [PATCH] target/cortex_m: use cortex_m->dcb_dhcsr in cortex_m_soft_reset_halt() cortex_m->dcb_dhcsr caches status of DHCSR register. Use it instead of local variable in cortex_m_soft_reset_halt() like in other code. Extracted from [1]. [1] Antonio Borneo: 6207: cortex_m: rework handling of dcb_dhcsr Link: https://review.openocd.org/c/openocd/+/6207 Change-Id: I9a0aeba0b6b0b4969f05f4a32fc2fc8d244f56ca Signed-off-by: Tomas Vanek Reviewed-on: https://review.openocd.org/c/openocd/+/6677 Tested-by: jenkins Reviewed-by: Antonio Borneo Reviewed-by: Tarek BOCHKATI --- src/target/cortex_m.c | 15 ++++++--------- 1 file changed, 6 insertions(+), 9 deletions(-) diff --git a/src/target/cortex_m.c b/src/target/cortex_m.c index f682606038..d4affa6831 100644 --- a/src/target/cortex_m.c +++ b/src/target/cortex_m.c @@ -776,7 +776,6 @@ static int cortex_m_soft_reset_halt(struct target *target) { struct cortex_m_common *cortex_m = target_to_cm(target); struct armv7m_common *armv7m = &cortex_m->armv7m; - uint32_t dcb_dhcsr = 0; int retval, timeout = 0; /* on single cortex_m MCU soft_reset_halt should be avoided as same functionality @@ -812,25 +811,23 @@ static int cortex_m_soft_reset_halt(struct target *target) register_cache_invalidate(cortex_m->armv7m.arm.core_cache); while (timeout < 100) { - retval = mem_ap_read_atomic_u32(armv7m->debug_ap, DCB_DHCSR, &dcb_dhcsr); + retval = mem_ap_read_atomic_u32(armv7m->debug_ap, DCB_DHCSR, &cortex_m->dcb_dhcsr); if (retval == ERROR_OK) { retval = mem_ap_read_atomic_u32(armv7m->debug_ap, NVIC_DFSR, &cortex_m->nvic_dfsr); if (retval != ERROR_OK) return retval; - if ((dcb_dhcsr & S_HALT) + if ((cortex_m->dcb_dhcsr & S_HALT) && (cortex_m->nvic_dfsr & DFSR_VCATCH)) { - LOG_DEBUG("system reset-halted, DHCSR 0x%08x, " - "DFSR 0x%08x", - (unsigned) dcb_dhcsr, - (unsigned) cortex_m->nvic_dfsr); + LOG_DEBUG("system reset-halted, DHCSR 0x%08" PRIx32 ", DFSR 0x%08" PRIx32, + cortex_m->dcb_dhcsr, cortex_m->nvic_dfsr); cortex_m_poll(target); /* FIXME restore user's vector catch config */ return ERROR_OK; } else LOG_DEBUG("waiting for system reset-halt, " - "DHCSR 0x%08x, %d ms", - (unsigned) dcb_dhcsr, timeout); + "DHCSR 0x%08" PRIx32 ", %d ms", + cortex_m->dcb_dhcsr, timeout); } timeout++; alive_sleep(1); -- 2.30.2