From 0118dc5e47da98cfd082d1b109ed995dcb779510 Mon Sep 17 00:00:00 2001 From: Marc Schink Date: Tue, 26 Feb 2019 14:08:42 +0100 Subject: [PATCH] target/arm_semihosting: Use 'bool' data type Change-Id: I05245b7dc9c37ea8e0e40672070fb3e87cb7683f Signed-off-by: Marc Schink Reviewed-on: http://openocd.zylin.com/4965 Tested-by: jenkins Reviewed-by: Antonio Borneo --- src/target/arm_semihosting.c | 12 ++++++------ 1 file changed, 6 insertions(+), 6 deletions(-) diff --git a/src/target/arm_semihosting.c b/src/target/arm_semihosting.c index 9117a74426..61f1e7801f 100644 --- a/src/target/arm_semihosting.c +++ b/src/target/arm_semihosting.c @@ -94,12 +94,12 @@ static int post_result(struct target *target) /* return value in R0 */ buf_set_u32(arm->core_cache->reg_list[0].value, 0, 32, target->semihosting->result); - arm->core_cache->reg_list[0].dirty = 1; + arm->core_cache->reg_list[0].dirty = true; /* LR --> PC */ buf_set_u32(arm->core_cache->reg_list[15].value, 0, 32, buf_get_u32(arm_reg_current(arm, 14)->value, 0, 32)); - arm->core_cache->reg_list[15].dirty = 1; + arm->core_cache->reg_list[15].dirty = true; /* saved PSR --> current PSR */ spsr = buf_get_u32(arm->spsr->value, 0, 32); @@ -109,7 +109,7 @@ static int post_result(struct target *target) */ buf_set_u32(arm->cpsr->value, 0, 32, spsr); - arm->cpsr->dirty = 1; + arm->cpsr->dirty = true; arm->core_mode = spsr & 0x1f; if (spsr & 0x20) arm->core_state = ARM_STATE_THUMB; @@ -118,11 +118,11 @@ static int post_result(struct target *target) if (arm->core_state == ARM_STATE_AARCH64) { /* return value in R0 */ buf_set_u64(arm->core_cache->reg_list[0].value, 0, 64, target->semihosting->result); - arm->core_cache->reg_list[0].dirty = 1; + arm->core_cache->reg_list[0].dirty = true; uint64_t pc = buf_get_u64(arm->core_cache->reg_list[32].value, 0, 64); buf_set_u64(arm->pc->value, 0, 64, pc + 4); - arm->pc->dirty = 1; + arm->pc->dirty = true; } } else { /* resume execution, this will be pc+2 to skip over the @@ -130,7 +130,7 @@ static int post_result(struct target *target) /* return result in R0 */ buf_set_u32(arm->core_cache->reg_list[0].value, 0, 32, target->semihosting->result); - arm->core_cache->reg_list[0].dirty = 1; + arm->core_cache->reg_list[0].dirty = true; } return ERROR_OK; -- 2.30.2