From 613f1c6abbc92aff22ef1731469626759f91ebaa Mon Sep 17 00:00:00 2001 From: Antonio Borneo Date: Sat, 15 Jan 2022 18:34:21 +0100 Subject: [PATCH] arm_adi_v5: let dap_lookup_cs_component() to get AP dbgbase Simplify the code in cortex_a and aarch64 by moving the call to dap_get_debugbase() inside dap_lookup_cs_component(). This has the further effects: - dap_get_debugbase() is not referenced outside arm_adi_v5.c and becomes static; - dap_lookup_cs_component() looses one parameter; - the coreid parameter 'idx' is passed as value; - the caller in aarch64 don't have and don't print the irrelevant value of AP register APID; - fixes the debug message in the caller in aarch64 to print the coreid value instead of always zero. Change-Id: Ic7f0f643fdf067c059c8f2455a02ff18a3fed054 Signed-off-by: Antonio Borneo Reviewed-on: https://review.openocd.org/c/openocd/+/6823 Tested-by: jenkins --- src/target/aarch64.c | 15 ++++----------- src/target/arm_adi_v5.c | 20 +++++++++++++++++--- src/target/arm_adi_v5.h | 6 +----- src/target/cortex_a.c | 11 ++--------- 4 files changed, 24 insertions(+), 28 deletions(-) diff --git a/src/target/aarch64.c b/src/target/aarch64.c index 8838da9273..d8a9664d72 100644 --- a/src/target/aarch64.c +++ b/src/target/aarch64.c @@ -2574,20 +2574,13 @@ static int aarch64_examine_first(struct target *target) armv8->debug_ap->memaccess_tck = 10; if (!target->dbgbase_set) { - target_addr_t dbgbase; - /* Get ROM Table base */ - uint32_t apid; - int32_t coreidx = target->coreid; - retval = dap_get_debugbase(armv8->debug_ap, &dbgbase, &apid); - if (retval != ERROR_OK) - return retval; /* Lookup Processor DAP */ - retval = dap_lookup_cs_component(armv8->debug_ap, dbgbase, ARM_CS_C9_DEVTYPE_CORE_DEBUG, - &armv8->debug_base, &coreidx); + retval = dap_lookup_cs_component(armv8->debug_ap, ARM_CS_C9_DEVTYPE_CORE_DEBUG, + &armv8->debug_base, target->coreid); if (retval != ERROR_OK) return retval; - LOG_DEBUG("Detected core %" PRId32 " dbgbase: " TARGET_ADDR_FMT - " apid: %08" PRIx32, coreidx, armv8->debug_base, apid); + LOG_DEBUG("Detected core %" PRId32 " dbgbase: " TARGET_ADDR_FMT, + target->coreid, armv8->debug_base); } else armv8->debug_base = target->dbgbase; diff --git a/src/target/arm_adi_v5.c b/src/target/arm_adi_v5.c index 54d04abd62..d9544e9ebc 100644 --- a/src/target/arm_adi_v5.c +++ b/src/target/arm_adi_v5.c @@ -1002,7 +1002,7 @@ int dap_find_ap(struct adiv5_dap *dap, enum ap_type type_to_find, struct adiv5_a return ERROR_FAIL; } -int dap_get_debugbase(struct adiv5_ap *ap, +static int dap_get_debugbase(struct adiv5_ap *ap, target_addr_t *dbgbase, uint32_t *apid) { struct adiv5_dap *dap = ap->dap; @@ -1038,7 +1038,7 @@ int dap_get_debugbase(struct adiv5_ap *ap, return ERROR_OK; } -int dap_lookup_cs_component(struct adiv5_ap *ap, +static int _dap_lookup_cs_component(struct adiv5_ap *ap, target_addr_t dbgbase, uint8_t type, target_addr_t *addr, int32_t *idx) { uint32_t romentry, entry_offset = 0, devtype; @@ -1066,7 +1066,7 @@ int dap_lookup_cs_component(struct adiv5_ap *ap, } unsigned int class = (c_cid1 & ARM_CS_CIDR1_CLASS_MASK) >> ARM_CS_CIDR1_CLASS_SHIFT; if (class == ARM_CS_CLASS_0X1_ROM_TABLE) { - retval = dap_lookup_cs_component(ap, component_base, + retval = _dap_lookup_cs_component(ap, component_base, type, addr, idx); if (retval == ERROR_OK) break; @@ -1094,6 +1094,20 @@ int dap_lookup_cs_component(struct adiv5_ap *ap, return ERROR_OK; } +int dap_lookup_cs_component(struct adiv5_ap *ap, uint8_t type, + target_addr_t *addr, int32_t core_id) +{ + int32_t idx = core_id; + target_addr_t dbgbase; + uint32_t apid; + + int retval = dap_get_debugbase(ap, &dbgbase, &apid); + if (retval != ERROR_OK) + return retval; + + return _dap_lookup_cs_component(ap, dbgbase, type, addr, &idx); +} + /** Holds registers and coordinates of a CoreSight component */ struct cs_component_vals { struct adiv5_ap *ap; diff --git a/src/target/arm_adi_v5.h b/src/target/arm_adi_v5.h index 5c598f16e3..8c9a60f254 100644 --- a/src/target/arm_adi_v5.h +++ b/src/target/arm_adi_v5.h @@ -619,10 +619,6 @@ int mem_ap_init(struct adiv5_ap *ap); /* Invalidate cached DP select and cached TAR and CSW of all APs */ void dap_invalidate_cache(struct adiv5_dap *dap); -/* Probe the AP for ROM Table location */ -int dap_get_debugbase(struct adiv5_ap *ap, - target_addr_t *dbgbase, uint32_t *apid); - /* Probe Access Ports to find a particular type */ int dap_find_ap(struct adiv5_dap *dap, enum ap_type type_to_find, @@ -641,7 +637,7 @@ static inline bool dap_is_multidrop(struct adiv5_dap *dap) /* Lookup CoreSight component */ int dap_lookup_cs_component(struct adiv5_ap *ap, - target_addr_t dbgbase, uint8_t type, target_addr_t *addr, int32_t *idx); + uint8_t type, target_addr_t *addr, int32_t idx); struct target; diff --git a/src/target/cortex_a.c b/src/target/cortex_a.c index 2dc1091081..20b2e51731 100644 --- a/src/target/cortex_a.c +++ b/src/target/cortex_a.c @@ -2905,18 +2905,11 @@ static int cortex_a_examine_first(struct target *target) armv7a->debug_ap->memaccess_tck = 80; if (!target->dbgbase_set) { - target_addr_t dbgbase; - /* Get ROM Table base */ - uint32_t apid; - int32_t coreidx = target->coreid; LOG_DEBUG("%s's dbgbase is not set, trying to detect using the ROM table", target->cmd_name); - retval = dap_get_debugbase(armv7a->debug_ap, &dbgbase, &apid); - if (retval != ERROR_OK) - return retval; /* Lookup Processor DAP */ - retval = dap_lookup_cs_component(armv7a->debug_ap, dbgbase, ARM_CS_C9_DEVTYPE_CORE_DEBUG, - &armv7a->debug_base, &coreidx); + retval = dap_lookup_cs_component(armv7a->debug_ap, ARM_CS_C9_DEVTYPE_CORE_DEBUG, + &armv7a->debug_base, target->coreid); if (retval != ERROR_OK) { LOG_ERROR("Can't detect %s's dbgbase from the ROM table; you need to specify it explicitly.", target->cmd_name); -- 2.30.2