openocd.git
2 years agoflash Kinetis: add KL8x family, fix erase check 98/3898/2
Tomas Vanek [Fri, 2 Dec 2016 14:47:01 +0000 (15:47 +0100)]
flash Kinetis: add KL8x family, fix erase check

Secure devices KL81Z7 and KL82Z7 have no SERIESID field in ID register
so they have to be decoded in Kx branch (not KLx).

The flash controller in KL8x and also in K8x devices does not implement
FTFx_CMD_BLOCKSTAT command. Fix kinetis_blank_check() to work properly
using FTFx_CMD_SECTSTAT command only.
Introduce a new flag FS_NO_CMD_BLOCKSTAT to avoid use of FTFx_CMD_BLOCKSTAT
on these devices.

Change-Id: I3ff58718480acd8cce69f618f71667b6b1d9c4f3
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/3898
Tested-by: jenkins
Reviewed-by: Joakim Nohlgård <joakim.nohlgard@eistec.se>
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
2 years agotcl/target: make sure kex.cfg is not used for Kinetis KE1x families 97/3897/2
Tomas Vanek [Fri, 2 Dec 2016 17:09:27 +0000 (18:09 +0100)]
tcl/target: make sure kex.cfg is not used for Kinetis KE1x families

Config file renamed to ke0x.cfg and a notice added to texi.

While on ke0x.cfg CPUTAPID setting fixed: device has SWD port only, no JTAG.

Removed per device configs as they set CHIPNAME and nothing more.
Let's use reasonably universal chip name 'ke' set in family config.

Change-Id: I313db87a59f25f968eb3c27df155780b67becee8
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/3897
Tested-by: jenkins
Reviewed-by: Ivan Meleca <ivan@artekit.eu>
Reviewed-by: Joakim Nohlgård <joakim.nohlgard@eistec.se>
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
2 years agoflash Kinetis: add KE1xZ and KE1xF families 96/3896/4
Tomas Vanek [Wed, 30 Nov 2016 20:48:59 +0000 (21:48 +0100)]
flash Kinetis: add KE1xZ and KE1xF families

The new Kinetis KE1x families use FTFE flash controller unlike KE0x.
Also SDID coding corresponds to new K, KL and KV families.
That's why KE1x is handled by kinetis driver instead of kinetis_ke

Change-Id: Ibb73e28e41dfbb086e761e1f006b089825dab854
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/3896
Tested-by: jenkins
Reviewed-by: Joakim Nohlgård <joakim.nohlgard@eistec.se>
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
2 years agoflash/nor: at91samd modified to use real erase sector size 46/3546/5
Tomas Vanek [Thu, 14 Jul 2016 18:52:13 +0000 (20:52 +0200)]
flash/nor: at91samd modified to use real erase sector size

Before this change SAMD driver defined "sector" equal to a flash
protection block. Oversize sectors (16kB for the biggest flash size)
made problems for flashing firmware split to two or more parts.

Removed superfluous test of sector protection before erase.

Change-Id: I8e6a6bda6ccd91eda2df67ec48270c69faa1bdd1
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/3546
Tested-by: jenkins
Reviewed-by: Stian Skjelstad <stian@nixia.no>
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
2 years agoflash/nor/at91sam4: remove FWS=6, rename at91samg to atsamg 26/3926/2
Tomas Vanek [Mon, 26 Dec 2016 21:53:44 +0000 (22:53 +0100)]
flash/nor/at91sam4: remove FWS=6, rename at91samg to atsamg

FWS=6 workaround removed, as this appears to be a copy-paste error
from the SAM3X family. Originally addressed in http://openocd.zylin.com/3837
but not all occurences were removed.

Atmel changed chip naming and removed 91 prefix for atsamg, samd...

Change-Id: Ia2b43da82b2ff9b1c85fdb456a0a198ab095243d
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/3926
Tested-by: jenkins
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
2 years agoflash: nor: ath79: fix build failure due to recent MIPS changes 51/4151/7
Paul Fertser [Wed, 31 May 2017 13:57:34 +0000 (16:57 +0300)]
flash: nor: ath79: fix build failure due to recent MIPS changes

Change-Id: I7139b0658f048afea2d16216c93e8946356a630d
Signed-off-by: Paul Fertser <fercerpav@gmail.com>
Reviewed-on: http://openocd.zylin.com/4151
Tested-by: jenkins
Reviewed-by: Salvador Arroyo <sarroyofdez@yahoo.es>
2 years agoflash: Add support for Atheros (ath79) SPI interface 12/3612/12
Tobias Diedrich [Mon, 1 Aug 2016 13:57:20 +0000 (15:57 +0200)]
flash: Add support for Atheros (ath79) SPI interface

Supported SoCs: AR71xx, AR724x, AR91xx, AR93xx, QCA9558

Extended and revised version of my original patch submitted by Dmytro
here: http://openocd.zylin.com/#/c/3390

This driver is using pure SPI mode, so the flash base address is not
used except some flash commands (e.g. "flash program") need it to
distinguish the banks.

Example config with all 3 chip selects:
flash bank flash0 ath79 0 0 0 0 $_TARGETNAME cs0
flash bank flash1 ath79 0x10000000 0 0 0 $_TARGETNAME cs1
flash bank flash2 ath79 0x20000000 0 0 0 $_TARGETNAME cs2

Example usage:
> flash probe flash0
Found flash device 'win w25q128fv' (ID 0x001840ef)
flash 'ath79' found at 0x00000000
> flash probe flash1
No SPI flash found
> flash probe flash2
No SPI flash found
> flash banks
> flash read_bank flash0 /tmp/test.bin 0x00000000 0x1000
reading 4096 bytes from flash @0x00000000
wrote 4096 bytes to file /tmp/test.bin from flash bank 0 at offset
0x00000000 in 28.688066s (0.139 KiB/s)

Change-Id: I5feb697722c07e83a9c1b361a9db7b06bc699aa8
Signed-off-by: Tobias Diedrich <ranma+openocd@tdiedrich.de>
Reviewed-on: http://openocd.zylin.com/3612
Tested-by: jenkins
Reviewed-by: Dmytro <dioptimizer@hotmail.com>
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
2 years agoimx_gpio: add mmap based jtag interface for IMX processors 06/4106/8
Grzegorz Kostka [Tue, 18 Apr 2017 14:12:58 +0000 (16:12 +0200)]
imx_gpio: add mmap based jtag interface for IMX processors

For some targets (like nrf51) sysfs driver is too slow. This
patch implements memory maped driver for IMX processors.
Mostly based on bcm2835gpio. Tested on imx6ul CPU. However, it should
work on any NXP IMX CPU.

Change-Id: Idace4c98181c6e9c64dd158bfa52631204b5c4a7
Signed-off-by: Grzegorz Kostka <kostka.grzegorz@gmail.com>
Reviewed-on: http://openocd.zylin.com/4106
Tested-by: jenkins
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
3 years agojtag/drivers: Add Cypress KitProg driver 21/3221/48
Forest Crossman [Sat, 30 Jan 2016 05:23:49 +0000 (00:23 -0500)]
jtag/drivers: Add Cypress KitProg driver

This patch adds a driver for the SWD-only Cypress KitProg
programmer/debugger.

Change-Id: I3a9a8011a762781d560ebb305597e782a4f9a8e5
Signed-off-by: Forest Crossman <cyrozap@gmail.com>
Reviewed-on: http://openocd.zylin.com/3221
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
3 years agotcl/cpld: add config file for Altera 5M570Z CPLD (MAXV family) 09/4109/2
Moritz Fischer [Wed, 26 Apr 2017 05:18:49 +0000 (22:18 -0700)]
tcl/cpld: add config file for Altera 5M570Z CPLD (MAXV family)

Change-Id: I229c746be27b7c4fa01f48a6ed54ab2679b50ab1
Signed-off-by: Moritz Fischer <moritz.fischer@ettus.com>
Reviewed-on: http://openocd.zylin.com/4109
Tested-by: jenkins
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
3 years agostm32l4: support flashing L45x/46x devices 22/4122/2
Juha Niskanen [Thu, 4 May 2017 10:43:08 +0000 (13:43 +0300)]
stm32l4: support flashing L45x/46x devices

Also fixes incorrect comment about MSI range.

Change-Id: If1339a00e50db44195dfcd5c767ba3f5d9035451
Signed-off-by: Juha Niskanen <juha.niskanen@haltian.com>
Reviewed-on: http://openocd.zylin.com/4122
Tested-by: jenkins
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
3 years agomips32, use scan32 function for reading impcode/idcode. 03/4003/3
Salvador Arroyo [Mon, 20 Feb 2017 19:45:37 +0000 (20:45 +0100)]
mips32, use scan32 function for reading impcode/idcode.

There is no need to implement scan code in functions
mips_ejtag_get_idcode/impcode(), use mips_ejtag_drscan_32().
Impcode/idcode saved in ejtag.info.
Reorder the code in the callers of this functions.

Change-Id: Ia829c783a0b24c6a65cade736113fa6f67b0a170
Signed-off-by: Salvador Arroyo <salvador@telecable.es>
Reviewed-on: http://openocd.zylin.com/4003
Tested-by: jenkins
Reviewed-by: Peter Mamonov <pmamonov@gmail.com>
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
3 years agomips32: add micromips breakpoints support 24/4124/2
Salvador Arroyo [Mon, 8 May 2017 07:44:50 +0000 (09:44 +0200)]
mips32: add micromips breakpoints support

Breakpoint setting based on length (kind) only.
Added 16bit aligned 32bit software breakpoints
support and same filtering before setting
breakpoint.
Set the required isa bit in hardware breakpoints.
Drop the isa bit in software breakpoints.

Change-Id: I7020f27be16015194b76f385d9b8e5af496d0dfc
Signed-off-by: Salvador Arroyo <sarroyofdez@yahoo.es>
Reviewed-on: http://openocd.zylin.com/4124
Tested-by: jenkins
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
3 years agomips32: add micromips isa handling 23/4123/2
Salvador Arroyo [Sun, 7 May 2017 16:39:17 +0000 (18:39 +0200)]
mips32: add micromips isa handling

Read and save configuration registers, up to 4.
Config3 holds the micromips implementation info.
Added isa implementation info to mips32_common.
Added isa filter to avoid common mistakes, but only
if one isa mode is implemented.
When resuming the isa requested is set if more than
one isa mode is implemented.

Change-Id: I1d6526c5525bffac8d75e031b842b2edc6310e28
Signed-off-by: Salvador Arroyo <sarroyofdez@yahoo.es>
Reviewed-on: http://openocd.zylin.com/4123
Tested-by: jenkins
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
3 years agomips32, convert miniprograms with code definition 33/4033/3
Salvador Arroyo [Sun, 7 May 2017 11:36:12 +0000 (13:36 +0200)]
mips32, convert miniprograms with code definition

Needed to run in micromips mode. Seems that if an isa
is supported in debug mode it also supported in kernel
mode. The contrary is not true.

Change-Id: I1feb8e2c376f4db97089f05c20bc0cd177208fb3
Signed-off-by: Salvador Arroyo <sarroyofdez@yahoo.es>
Reviewed-on: http://openocd.zylin.com/4033
Tested-by: jenkins
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
3 years agomips32, add support for micromips in debug mode 32/4032/4
Salvador Arroyo [Sun, 7 May 2017 09:58:25 +0000 (11:58 +0200)]
mips32, add support for micromips in debug mode

Micromips is 16bit oriented, branch and jumps are
16 bit based. The upper half 16bits of a 32bit instruction
with the major opcode, must go first in the instruction
stream, hence the SWAP16 macro and swap16 array function,
needed if the code is written as 32 bit word in little endian
cores. Endianess info added to ejtag_iinfo. Pointer to
ejtag_info and isa field added to pracc context.
MIPS32 code are renamed to MIPS32_ISA_...
To select the isa, the new code has an additional isa parameter
(1 for micromips, 0 for mips32).
In JR instruction the isa bit must be set to execute
micromips code.
The suffix u is added to the OP codes to avoid signed/unsigned
comparison errors and to make sure the right shift is
performed logically.
The isa in debug mode is updated in the poll function.
Code for miniprograms, in kernel mode, need to be converted.
CFI code only for mips32.

Change-Id: I79a8b637d49b0e2d92b6dd5eb5aa8aa0520bf938
Signed-off-by: Salvador Arroyo <sarroyofdez@yahoo.es>
Reviewed-on: http://openocd.zylin.com/4032
Tested-by: jenkins
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
3 years agomips32, add microMips instruction subset 22/4022/3
Salvador Arroyo [Mon, 27 Feb 2017 12:06:46 +0000 (13:06 +0100)]
mips32, add microMips instruction subset

Only reencoded MIPS32 instructions. Added some instructions
for crc code. Micromips isa in debug mode is only needed for
pic32mm cores. Pic32mz seems that only works with MIPS32
isa when in debug mode.

Change-Id: I07059e153a7000ea9204f20b6b37edf6a7623455
Signed-off-by: Salvador Arroyo <sarroyofdez@yahoo.es>
Reviewed-on: http://openocd.zylin.com/4022
Tested-by: jenkins
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
3 years agomips32, add option to avoid check in last instruction 21/4021/2
Salvador Arroyo [Mon, 27 Feb 2017 11:25:49 +0000 (12:25 +0100)]
mips32, add option to avoid check in last instruction

This option is needed, for example, when exiting
debug mode in bmips targets. The last instruction
is a NOP, not a DERET. When working in async mode
this check is not done, mips32_pracc_queue_exec() pass
the parameter to mips32_pracc_exec() and never use it.

Change-Id: I4c7ed4feb1588b62e2645b955b501b6671113b36
Signed-off-by: Salvador Arroyo <sarroyofdez@yahoo.es>
Reviewed-on: http://openocd.zylin.com/4021
Tested-by: jenkins
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
3 years agomips32, add realloc code 20/4020/5
Salvador Arroyo [Sun, 26 Feb 2017 19:35:01 +0000 (20:35 +0100)]
mips32, add realloc code

If max_code is reached realloc memory. If fails to realloc
the error is propagated and every call to pracc_add() returns
immediately. The exec function logs the error.

Change-Id: Idd4ed9d9b8b19b7d6842d0bc5ebb05f943726705
Signed-off-by: Salvador Arroyo <sarroyofdez@yahoo.es>
Reviewed-on: http://openocd.zylin.com/4020
Tested-by: jenkins
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
3 years agomips32, change in pracc_list for dynamic allocation 19/4019/3
Salvador Arroyo [Sun, 26 Feb 2017 08:11:02 +0000 (09:11 +0100)]
mips32, change in pracc_list for dynamic allocation

pracc_list points to an array with code in the lower half
and addr in the upper half. Change it to a struct with
an instruction field and an address field.
Requiered to make reallocation easier.
As a side effect the code is less quirky.

Change-Id: Ibf904a33a2f35a7f69284d2a2114f4b4ae79219f
Signed-off-by: Salvador Arroyo <sarroyofdez@yahoo.es>
Reviewed-on: http://openocd.zylin.com/4019
Tested-by: jenkins
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
3 years agoFix compile failure on MacOSX 18/4118/4
Matthias Welwarsky [Tue, 2 May 2017 14:47:21 +0000 (16:47 +0200)]
Fix compile failure on MacOSX

MacOSX tool chain defines __unused in "sys/cdefs.h", causing a collision.
Remove the local define to avoid polluting the compilers internal
symbol namespace.

Change-Id: I16370c4518e6aeec482dd689e7db80628f846ee3
Signed-off-by: Matthias Welwarsky <matthias.welwarsky@sysgo.com>
Reviewed-on: http://openocd.zylin.com/4118
Reviewed-by: Steven Stallion <sstallion@gmail.com>
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Tested-by: jenkins
3 years agomips32, write handler code in a more compact way 18/4018/2
Salvador Arroyo [Fri, 24 Feb 2017 22:39:39 +0000 (23:39 +0100)]
mips32, write handler code in a more compact way

Less code and probably cleaner.
Don't check if it is ever ERROR_OK.

Change-Id: I1045b58fd4542ec24430332f49679364ae97b1dc
Signed-off-by: Salvador Arroyo <sarroyofdez@yahoo.es>
Reviewed-on: http://openocd.zylin.com/4018
Tested-by: jenkins
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
3 years agomips32, implement assembler li instruction 17/4017/2
Salvador Arroyo [Fri, 24 Feb 2017 15:44:12 +0000 (16:44 +0100)]
mips32, implement assembler li instruction

Implement it as a function, the code was already in. Added optimize
option.

Change-Id: Ib9ad3f00d6c4f0b91c4e4960a50ec8d102f4e333
Signed-off-by: Salvador Arroyo <sarroyofdez@yahoo.es>
Reviewed-on: http://openocd.zylin.com/4017
Tested-by: jenkins
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
3 years agomips32, in wait_for_pracc_rw() use ejtag_info->pa_ctrl 11/4011/5
Salvador Arroyo [Thu, 23 Feb 2017 21:55:34 +0000 (22:55 +0100)]
mips32, in wait_for_pracc_rw() use ejtag_info->pa_ctrl

Makes code shorter
In fasdata transfer fuction declare variables locally.
Avoid cast.

Change-Id: I0367b66339560fc20521a0598488e7ff9076808e
Signed-off-by: Salvador Arroyo <sarroyofdez@yahoo.es>
Reviewed-on: http://openocd.zylin.com/4011
Tested-by: jenkins
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
3 years agomips32, mips32_pracc_finish() queued only 10/4010/3
Salvador Arroyo [Thu, 23 Feb 2017 14:14:46 +0000 (15:14 +0100)]
mips32, mips32_pracc_finish() queued only

In most of the cases there is no need to request execution,
the check for a new pracc access already does it.
Requesting execution if not needed makes execution slower and
code larger due the additional checks.
Reduce code in fasdata transfer function.
Call for execution when exiting debug.

Change-Id: I3b45f6d1f62da5fad3e3db84f82a9299b16e1bd9
Signed-off-by: Salvador Arroyo <sarroyofdez@yahoo.es>
Reviewed-on: http://openocd.zylin.com/4010
Tested-by: jenkins
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
3 years agomips32, drop unnecessary code in mips32_pracc.c 07/4007/3
Salvador Arroyo [Wed, 22 Feb 2017 22:14:36 +0000 (23:14 +0100)]
mips32, drop unnecessary code in mips32_pracc.c

Struct mips32_pracc_context no more in use.
In current code cp0 reg/sel do not requires special handling.
In sync mode ctx.store_count not used, drop check.
In fasdata transfer function use mips32_pracc_read_ctrl_addr()
to reduce code.

Change-Id: Ibd4cfa5a44ebc106ed0db042f4e54a2e0b3d43cb
Signed-off-by: Salvador Arroyo <sarroyofdez@yahoo.es>
Reviewed-on: http://openocd.zylin.com/4007
Tested-by: jenkins
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
3 years agomips32, homogenize code in the scan functions 06/4006/6
Salvador Arroyo [Mon, 20 Feb 2017 22:48:40 +0000 (23:48 +0100)]
mips32, homogenize code in the scan functions

Change-Id: I32fed3332857737048dd12da94fcaba140acb726
Signed-off-by: Salvador Arroyo <sarroyofdez@yahoo.es>
Reviewed-on: http://openocd.zylin.com/4006
Tested-by: jenkins
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
3 years agoserver/telnet: Remove exit() call 24/3224/2
Marc Schink [Fri, 29 Jan 2016 22:35:40 +0000 (23:35 +0100)]
server/telnet: Remove exit() call

Change-Id: I8ce99d7d62dfe3cad63cf6bc68f2faf2234e395c
Signed-off-by: Marc Schink <openocd-dev@marcschink.de>
Reviewed-on: http://openocd.zylin.com/3224
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
3 years agoserver/server: Remove all exit() calls 23/3223/6
Marc Schink [Sun, 24 Jan 2016 19:58:24 +0000 (20:58 +0100)]
server/server: Remove all exit() calls

With this patch OpenOCD shuts down properly when errors occur in the
server instead of just calling exit().

Change-Id: I2ae1a6153dafc88667951cab9152941cb487be85
Signed-off-by: Marc Schink <openocd-dev@marcschink.de>
Reviewed-on: http://openocd.zylin.com/3223
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
Tested-by: jenkins
3 years agostm32l4: support flashing L496 devices 08/4108/2
Juha Niskanen [Tue, 25 Apr 2017 06:07:58 +0000 (09:07 +0300)]
stm32l4: support flashing L496 devices

Change-Id: I3effc5b675c853433170391c5eaf46edc067b6e7
Signed-off-by: Juha Niskanen <juha.niskanen@haltian.com>
Reviewed-on: http://openocd.zylin.com/4108
Tested-by: jenkins
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
3 years agomips32, add generic scan 32 function 05/4005/3
Salvador Arroyo [Mon, 20 Feb 2017 22:05:38 +0000 (23:05 +0100)]
mips32, add generic scan 32 function

Will be used later, allow queuing all needed scans in a pracc
access. This makes faster execution with ftdi based adapters
working in sync with pracc.
Added now because the overall code is shorter.

Change-Id: Ib32b89307b75785f88870db8d7c9255dc5bbd426
Signed-off-by: Salvador Arroyo <sarroyofdez@yahoo.es>
Reviewed-on: http://openocd.zylin.com/4005
Tested-by: jenkins
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
3 years agomips32, pic32 use uint8_t in 8 bit scan function 04/4004/4
Salvador Arroyo [Mon, 20 Feb 2017 21:19:15 +0000 (22:19 +0100)]
mips32, pic32 use uint8_t in 8 bit scan function

Makes code shorter.

Change-Id: I6cc01adffbea063ccb071ddf3a3e3d81727b29ce
Signed-off-by: Salvador Arroyo <sarroyofdez@yahoo.es>
Reviewed-on: http://openocd.zylin.com/4004
Tested-by: jenkins
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
3 years agotcl/board: Add STMicroelectronics STM32F7 Nucleo config 16/3516/2
Marc Schink [Thu, 26 May 2016 14:02:27 +0000 (16:02 +0200)]
tcl/board: Add STMicroelectronics STM32F7 Nucleo config

Tested with STM32F746ZG Nucleo development board.

Change-Id: Ia97b774b996a3be03e8e84342b93659c3632c18f
Signed-off-by: Marc Schink <openocd-dev@marcschink.de>
Reviewed-on: http://openocd.zylin.com/3516
Tested-by: jenkins
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
3 years agoudev: Add rules for Ambiq Micro EVK's. 80/3980/2
Karl Palsson [Fri, 17 Feb 2017 10:38:26 +0000 (10:38 +0000)]
udev: Add rules for Ambiq Micro EVK's.

Udev rules for Ambiq Micro ftdi based EVK's.
Two new vid:pid's: 2AEC:6010, and 2AEC:6011.

Udev rule for multi-target Debug board 2AEC:1106

Change-Id: Id7430d0c70647752375230f4024be9f7a2ba95ce
Signed-off-by: Rick Foos <rfoos@solengtech.com>
Signed-off-by: Karl Palsson <karlp@tweak.net.au>
Reviewed-on: http://openocd.zylin.com/3980
Tested-by: jenkins
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
3 years agoAdded 512K flashing support for em3587 95/3795/4
Byron Kubert [Mon, 26 Sep 2016 21:05:52 +0000 (15:05 -0600)]
Added 512K flashing support for em3587

The Silicon Labs EM3587 and EM3588 may have 512K of flash.
This fix allows for 512K to be specifiied on the command line
when flashing a device.

Change-Id: I18cc4bd0d14e1f2069066734a7396bcccf3de941
Signed-off-by: Byron Kubert <byronk@google.com>
Reviewed-on: http://openocd.zylin.com/3795
Tested-by: jenkins
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
3 years agolibusb: Add transfer type filter to get correct ep 18/3218/12
Hellosun Wu [Tue, 26 Jan 2016 05:36:49 +0000 (13:36 +0800)]
libusb: Add transfer type filter to get correct ep

The need for this due to AICE having 3 interfaces
(EP1 IN-Interrupt, EP2 OUT-Bulk, EP6 IN-Bulk).
Without it, the function will choose first two endpoint as
read_ep/write_ep. This filter will check transfer types
when get endpoint-id. Without this patch, AICE will not
get correct endpoint.

Change-Id: I4da93c7de41cd19e5095b4bfb42078b21f40b678
Signed-off-by: Hellosun Wu <wujiheng.tw@gmail.com>
Reviewed-on: http://openocd.zylin.com/3218
Tested-by: jenkins
Reviewed-by: Hsiangkai Wang <hsiangkai@gmail.com>
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
3 years agoflash/nor/tcl: Make verify_bank parameter optional 58/3858/2
Marc Schink [Fri, 4 Nov 2016 07:09:56 +0000 (08:09 +0100)]
flash/nor/tcl: Make verify_bank parameter optional

Make the 'offset' parameter optional, if omitted simply start at the
beginning of the flash bank.

Additionally, check if the argument is out of bounds of the flash bank.

Change-Id: Id1959eee5c395666c35f26342c3c50134dd564e5
Signed-off-by: Marc Schink <openocd-dev@marcschink.de>
Reviewed-on: http://openocd.zylin.com/3858
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
3 years agoflash/nor/tcl: Fix some format specifiers 57/3857/2
Marc Schink [Tue, 16 Aug 2016 07:39:36 +0000 (09:39 +0200)]
flash/nor/tcl: Fix some format specifiers

Change-Id: I2255aede9713cb7ef538d7433dd900d8da7a51ad
Signed-off-by: Marc Schink <openocd-dev@marcschink.de>
Reviewed-on: http://openocd.zylin.com/3857
Tested-by: jenkins
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
3 years agotcl STM32L0xx - add support for dual banked targets and for Nucleo-64 STM32L073 57/3957/7
Jan Čapek [Wed, 25 Jan 2017 09:11:48 +0000 (10:11 +0100)]
tcl STM32L0xx - add support for dual banked targets and for Nucleo-64 STM32L073

- stm32l0_dual_bank.cfg - implement dual bank configuration

- st_nucleo_l073rz.cfg - implement new board script

Change-Id: Ie8063e5bec45069a63d414d81b2068fe3cc7e4d7
Signed-off-by: Jan Čapek <jan.capek@braiins.cz>
Reviewed-on: http://openocd.zylin.com/3957
Reviewed-by: Cezary Gapiński <cezary.gapinski@gmail.com>
Reviewed-by: Karl Palsson <karlp@tweak.net.au>
Tested-by: jenkins
Reviewed-by: Aurelio Lucchesi <me@0rel.com>
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
3 years agostm32lx: fix dual-bank configuration for Cat.5 and Cat.6 devices 74/4074/5
CezaryGapinski [Mon, 20 Mar 2017 11:33:05 +0000 (12:33 +0100)]
stm32lx: fix dual-bank configuration for Cat.5 and Cat.6 devices

Default values for .first_bank_size_kb and .has_dual_banks fields
described in stm32lx_parts[] do not fully describe
the real device memory layouts.

Basing on:
STM32L0x1 RM0377
STM32L0x2 RM0376
STM32L0x3 RM0367
STM32Lxxxx RM0038

correct values for memory layouts were selected:
id = 0x447 STM32L0xx (Cat.5) <- dual bank flash
for size 192 or 128 KBytes, single bank for 64 KBytes
id = 0x436 STM32L1xx (Cat.4 / Cat.3 - Medium + /
High Density) <- only one size of the bank,
default values are correct
id = 0x437 STM32L1xx (Cat.5 / Cat.6) <- always dual bank,
but size of the bank can be different

For that reason .part_info field in struct stm32lx_flash_bank
is a dynamic field with fields copied from stm32lx_parts[]
and overwriten to correct values
for specific chips and memory sizes.

Change-Id: If638cb0a9916097bfd4eda77d64feaf1ef2d2147
Signed-off-by: Cezary Gapiński <cezary.gapinski@gmail.com>
Reviewed-on: http://openocd.zylin.com/4074
Tested-by: jenkins
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
3 years agoFix flash writing on stm32l0 36/4036/2
Armin van der Togt [Thu, 2 Mar 2017 16:31:14 +0000 (17:31 +0100)]
Fix flash writing on stm32l0

Fix "couldn't use loader, falling back to page memory writes" error on
stm32l0 which was caused by the use of cortex-m3 instructions in the
flash loader code. The loader is rewritten using cortex-m0 compatible
instructions

Signed-off-by: Armin van der Togt <armin@otheruse.nl>
Change-Id: If23027b8e09f74e45129e1f8452a04bb994c424e
Reviewed-on: http://openocd.zylin.com/4036
Tested-by: jenkins
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
3 years agoflash/nor/at91samd: fix chip erase of a secured device 43/4043/3
Tomas Vanek [Fri, 3 Mar 2017 16:52:00 +0000 (17:52 +0100)]
flash/nor/at91samd: fix chip erase of a secured device

'at91samd chip-erase' command did not work on secured device.

Fix it changing address of DSU.CTRL register
(see Atmel SAM D21 datasheet, 13.9. Intellectual Property Protection).

While on it check error return of DSU.CTRL write.

Change-Id: I83155a634a5458cdc0cc16c99c0e155eb1d8b3d6
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reported-by: Thomas Irmen <tirmen@gmx.net>
Reviewed-on: http://openocd.zylin.com/4043
Tested-by: jenkins
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
3 years agojtag/drivers cmsis-dap: do not limit speed so strictly 45/3945/3
Tomas Vanek [Mon, 9 Jan 2017 16:06:52 +0000 (17:06 +0100)]
jtag/drivers cmsis-dap: do not limit speed so strictly

Adapter clock frequency is set by 32-bit number and most adapters
limit the highest speed safely. There is no reason to impose strict
limit of 5000 kHz if some adapters can do more.

While on it give informative error message in case of zero adapter_khz.

Change-Id: I45c9804678e24496ea769ea9ca6036701b04dde9
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/3945
Tested-by: jenkins
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
3 years agoAdd support for the ATMEL SAM G55 Xplained Pro board and CPU. 22/3922/5
Jerome Lambourg [Wed, 6 Apr 2016 15:16:41 +0000 (17:16 +0200)]
Add support for the ATMEL SAM G55 Xplained Pro board and CPU.

Change-Id: Iffe59dcf9f2cb1f5949c37d11fe0d2141a47f8da
Signed-off-by: Paul Fertser <fercerpav@gmail.com>
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/3922
Tested-by: jenkins
Reviewed-by: Leo Zhang <liang.zhang@microchip.com>
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
3 years agohelp/log.c: better error handling for "log_output" 78/3878/4
Girts [Sat, 5 Nov 2016 21:38:55 +0000 (14:38 -0700)]
help/log.c: better error handling for "log_output"

* Close previous log file if one was opened before.
* Return error if opening file fails.

Change-Id: I103025cd86bcac785fe39e13bc7d5f79d78e38e7
Signed-off-by: Girts Folkmanis <opensource@girts.me>
Reviewed-on: http://openocd.zylin.com/3878
Tested-by: jenkins
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
3 years agohelper/options.c: fail if unexpected cmdline arguments are present 79/3879/3
Girts [Sat, 5 Nov 2016 21:38:55 +0000 (14:38 -0700)]
helper/options.c: fail if unexpected cmdline arguments are present

Previously openocd would silently ignore any incorrect arguments.

Change-Id: Ibb40b57b8a9e07d191215486f3b3c4920a9963c7
Signed-off-by: Girts Folkmanis <opensource@girts.me>
Reviewed-on: http://openocd.zylin.com/3879
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
3 years agohelp/options.c: add error handling for -d arg 80/3880/3
Girts [Sat, 5 Nov 2016 21:38:55 +0000 (14:38 -0700)]
help/options.c: add error handling for -d arg

Fail if we fail to set debug level. Also, clarify in usage string that
-d<n> doesn't accept spaces.

Change-Id: I9ea9945dc068e3e7cfd18b16ffa2a29366d6e4d1
Signed-off-by: Girts Folkmanis <opensource@girts.me>
Reviewed-on: http://openocd.zylin.com/3880
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
3 years agoboard: introduce base config for TI BeagleBone family boards 99/3099/6
Matthias Welwarsky [Wed, 4 Nov 2015 10:25:51 +0000 (11:25 +0100)]
board: introduce base config for TI BeagleBone family boards

This patch adds the file ti_beaglebone-base.cfg as the common base
configuration for all TI BeagleBone derived boards. It also modifies
ti_beaglebone.cfg to source the base board and only add the on-board
JTAG adapter. Lastly, it adds a file ti_beaglebone_black.cfg with
a suitable configuraton for the BeagleBone "Black" variant.

Change-Id: I40cacb8abed7bdb308929713891f7b5e5b685c95
Signed-off-by: Matthias Welwarsky <matthias@welwarsky.de>
Reviewed-on: http://openocd.zylin.com/3099
Tested-by: jenkins
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
3 years agonrf51: Add new HWID 0x008F 91/4091/2
Damyan Mitev [Tue, 4 Apr 2017 07:12:44 +0000 (10:12 +0300)]
nrf51: Add new HWID 0x008F

Add new entry in nrf51_known_devices_table for nRF51822 chip found on
chinese Core51822 dev board. The chp has markings N51822 / QFAAH1 / 1630FW
Nordic Semiconductor nRF51 Series Compatibility matrix confirms that this chip
has 256K Flash and 16K RAM.

Change-Id: I571d15913c6f6e02a6f09c883d7dfc5a66b57c28
Signed-off-by: Damyan Mitev <damyan_mitev@mail.bg>
Reviewed-on: http://openocd.zylin.com/4091
Tested-by: jenkins
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
3 years agotools/scripts/checkpatch.pl: fix unescaped brace 02/4102/2
Chengyu Zheng [Sun, 9 Apr 2017 16:55:02 +0000 (18:55 +0200)]
tools/scripts/checkpatch.pl: fix unescaped brace

Change-Id: If1d0fbe95223351ea098504cf24f076784b26a9c
Signed-off-by: Chengyu Zheng <chengyu.zheng@polimi.it>
Reviewed-on: http://openocd.zylin.com/4102
Tested-by: jenkins
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
3 years agoadded interface config file for In-Circuit's ICprog OpenOCD JTAG adapter 07/4107/3
Matthias Bock [Wed, 19 Apr 2017 12:53:05 +0000 (14:53 +0200)]
added interface config file for In-Circuit's ICprog OpenOCD JTAG adapter

Change-Id: I9f9758d3a30bbcca9f750f604e011e5cc25809c5
Signed-off-by: Matthias Bock <mail@matthiasbock.net>
Reviewed-on: http://openocd.zylin.com/4107
Tested-by: jenkins
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
3 years agojtag/drivers cmsis-dap: fix speed setting on Atmel EDBG 44/3944/2
Tomas Vanek [Mon, 9 Jan 2017 14:30:21 +0000 (15:30 +0100)]
jtag/drivers cmsis-dap: fix speed setting on Atmel EDBG

Without the change Atmel EDBG uses default clock freq about 168 kHz
instead adapter_khz configured before interface init.
Changing adapter speed after init works as expected.

Testing shows the EDBG firmware resets speed to default during DAP_SWJ_Sequence.
Tested with fw versions 03.1F.01AE and 02.09.0169

This change repeats the DAP_SWJ_Clock command after sending a SWJ sequence.

Change-Id: Ic70457c5df635f47cad5e70b0dc83a083ea1b3a3
Reported-by: Ladislav Laska <laska@kam.mff.cuni.cz>
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/3944
Tested-by: jenkins
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
3 years agoflash Kinetis: reduce a flash write message severity to info 05/4105/2
Joakim Nohlgård [Wed, 12 Apr 2017 08:27:28 +0000 (10:27 +0200)]
flash Kinetis: reduce a flash write message severity to info

There is nothing the user can do if their device does not support sector
programming, there is no reason to have this message at warning level.

Change-Id: Ic9b7386e59b64fece7fbfdc543bdfeeed3eae73d
Signed-off-by: Joakim Nohlgård <joakim.nohlgard@eistec.se>
Reviewed-on: http://openocd.zylin.com/4105
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
Tested-by: jenkins
3 years agotarget: Fix memory leak 48/4048/2
Marc Schink [Sun, 8 Jan 2017 19:19:29 +0000 (20:19 +0100)]
target: Fix memory leak

Change-Id: Ib23dfd653d8edacb890a46179e9d437c027d58e8
Signed-off-by: Marc Schink <openocd-dev@marcschink.de>
Reviewed-on: http://openocd.zylin.com/4048
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-by: Chengyu Zheng <chengyu.zheng@polimi.it>
Reviewed-by: Andreas Färber <afaerber@suse.de>
3 years agostlink: increase trace buffer size to maximum allowed on st-link v2 firmware 85/4085/2
Austin Morton [Wed, 29 Mar 2017 03:22:44 +0000 (23:22 -0400)]
stlink: increase trace buffer size to maximum allowed on st-link v2 firmware

Increasing the trace buffer size on the st-link itself gives openocd a greater
chance of avoiding trace data overflowing within the st-link between polls
when there is a large amount of data being sent over the trace port

The st-link appears to split the given buffer size in half
while one half is awaiting transfer over USB, the other half is being
filled by DMA transfer.  If you do not poll frequently enough, the DMA
transfer will overflow back to the start of its current buffer, resulting in
corrupted output

Buffer size of 4096 bytes is the maximum allowed by the st-link v2

Change-Id: I169189b021c34f8d18de1601d78b8c5890367d68
Signed-off-by: Austin Morton <austinpmorton@gmail.com>
Reviewed-on: http://openocd.zylin.com/4085
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>
3 years agoaarch64: add some documentation 08/4008/8
Matthias Welwarsky [Thu, 23 Feb 2017 13:17:15 +0000 (14:17 +0100)]
aarch64: add some documentation

document aarch64 specific commands and common ARMv7 and v8 DAP commands

Change-Id: Icbb76209735ec734f2e67f82bfc7270edb40ad0b
Signed-off-by: Matthias Welwarsky <matthias.welwarsky@sysgo.com>
Reviewed-on: http://openocd.zylin.com/4008
Tested-by: jenkins
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
3 years agoaarch64: clear CTI halt event early at debug entry 30/4030/2
Matthias Welwarsky [Wed, 1 Mar 2017 15:15:33 +0000 (16:15 +0100)]
aarch64: clear CTI halt event early at debug entry

The halt event was left pending in the CTI, better to clear it immediately
after debug entry.

Change-Id: I6002f862681baf98769e3c73332a7f7f0ef938c1
Signed-off-by: Matthias Welwarsky <matthias.welwarsky@sysgo.com>
Reviewed-on: http://openocd.zylin.com/4030
Tested-by: jenkins
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
3 years agonrf51: Remove pointer cast 30/3930/2
Andreas Fritiofson [Thu, 29 Dec 2016 11:19:11 +0000 (12:19 +0100)]
nrf51: Remove pointer cast

Int may not be 32 bit long.

Change-Id: I420f7efeb484eb35c1d7c20e1575b0b31ed8c9ff
Signed-off-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Reviewed-on: http://openocd.zylin.com/3930
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
3 years agoarm_dpm: fix dpm setup 42/4042/3
Girts Folkmanis [Fri, 3 Mar 2017 17:49:58 +0000 (09:49 -0800)]
arm_dpm: fix dpm setup

When ARM64 support was being merged, a comparison ended up being
inverted. This causes NULL pointer access when target attempts to
use core cache.

Change-Id: Ic8873ddd13dbdd8100856a71b4717f44cd336e23
Signed-off-by: Girts Folkmanis <opensource@girts.me>
Signed-off-by: Matthias Welwarsky <matthias.welwarsky@sysgo.com>
Reviewed-on: http://openocd.zylin.com/4042
Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
Tested-by: jenkins
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
3 years agotcl: add Hi6220 target and LeMaker HiKey board config 09/4009/2
Matthias Welwarsky [Thu, 23 Feb 2017 13:52:45 +0000 (14:52 +0100)]
tcl: add Hi6220 target and LeMaker HiKey board config

configuration covers all 8 Cortex-A53 cores and auxiliary Cortex-M3
used for power management.

Change-Id: I5509f275aa669abe285f9152935ecdcbcd0c402e
Signed-off-by: Matthias Welwarsky <matthias.welwarsky@sysgo.com>
Reviewed-on: http://openocd.zylin.com/4009
Tested-by: jenkins
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
3 years agoarmv8_dpm: fix exception handling 96/3996/4
Matthias Welwarsky [Fri, 17 Feb 2017 15:22:52 +0000 (16:22 +0100)]
armv8_dpm: fix exception handling

after handling of an exception in debug state, immediately
restore the original core state.

Change-Id: Ie53b63c9f19815f717f4df4390fbc13f0a204cc2
Signed-off-by: Matthias Welwarsky <matthias.welwarsky@sysgo.com>
Reviewed-on: http://openocd.zylin.com/3996
Tested-by: jenkins
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
3 years agoarmv8_dpm: retrieve only necessary registers on halt 95/3995/4
Matthias Welwarsky [Fri, 17 Feb 2017 15:21:41 +0000 (16:21 +0100)]
armv8_dpm: retrieve only necessary registers on halt

to speed up debugging, don't load the complete register context
on a halt event, load only those registers that might be
clobbered during debugging.

Change-Id: I0b58e97aad6f28aefce4a52e870af61e1ef1a44f
Signed-off-by: Matthias Welwarsky <matthias.welwarsky@sysgo.com>
Reviewed-on: http://openocd.zylin.com/3995
Tested-by: jenkins
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
3 years agoarmv8: spelling and formatting updates 94/3994/4
Matthias Welwarsky [Fri, 17 Feb 2017 14:05:15 +0000 (15:05 +0100)]
armv8: spelling and formatting updates

small changes to correct code formatting and spelling of some
log messages.

Change-Id: I645e675f8f9f4731b0271ddc55f64e8cf56ec1db
Signed-off-by: Matthias Welwarsky <matthias.welwarsky@sysgo.com>
Reviewed-on: http://openocd.zylin.com/3994
Tested-by: jenkins
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
3 years agoaarch64: run control rework 93/3993/4
Matthias Welwarsky [Fri, 17 Feb 2017 13:24:53 +0000 (14:24 +0100)]
aarch64: run control rework

This patch contains a major overhaul of the target run control,
mainly for the sake of satisfying gdbs ideas of how a target
should respond to various control requests for the debugger.

The changes allow gdb a slightly better control on how cores
are stepped: a core can be single-stepped while
other cores remain halted or continue normal execution
until the single-stepped core halts again.

Also, on any halting event (user command or breakpoint) the
system is brought into a stable state with all cores halted
before the halt is signaled to the debugger.

This patch also transitions the target code to make use of the
new CTI abstraction instead of accessing CTI registers directly.

Change-Id: I8ddc9abb119e04580d671b57ee12240c3f5070a0
Signed-off-by: Matthias Welwarsky <matthias.welwarsky@sysgo.com>
Reviewed-on: http://openocd.zylin.com/3993
Tested-by: jenkins
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
3 years agoaarch64: clean up struct aarch64_common 92/3992/3
Matthias Welwarsky [Fri, 17 Feb 2017 12:57:08 +0000 (13:57 +0100)]
aarch64: clean up struct aarch64_common

remove some rarely or completely unused components.

Change-Id: Id285bb7075901016297fa173a874db7f11a840d7
Signed-off-by: Matthias Welwarsky <matthias.welwarsky@sysgo.com>
Reviewed-on: http://openocd.zylin.com/3992
Tested-by: jenkins
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
3 years agoaarch64: clean up target specific commands 91/3991/3
Matthias Welwarsky [Fri, 17 Feb 2017 12:42:50 +0000 (13:42 +0100)]
aarch64: clean up target specific commands

- rename "cortex_a" command group to "aarch64"
- remove default blank check, checksum and algorithm hooks
  since they're not going to work in aarch64 mode anyway.

Change-Id: Ieb0046786ed9425baf6774c68f42a8285cc2aefd
Signed-off-by: Matthias Welwarsky <matthias.welwarsky@sysgo.com>
Reviewed-on: http://openocd.zylin.com/3991
Tested-by: jenkins
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
3 years agoaarch64: reset fixes 90/3990/3
Matthias Welwarsky [Wed, 15 Feb 2017 14:30:21 +0000 (15:30 +0100)]
aarch64: reset fixes

Make sure all core register caches are invalidated on reset
assert, make sure to re-init debug registers on deassert.

Change-Id: I82350d04cc3eaae5e35245d13d6c1fb0a8d59807
Signed-off-by: Matthias Welwarsky <matthias.welwarsky@sysgo.com>
Reviewed-on: http://openocd.zylin.com/3990
Tested-by: jenkins
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
3 years agoarmv8: factor out generic bit set/clr for debug registers 89/3989/3
Matthias Welwarsky [Wed, 15 Feb 2017 13:57:21 +0000 (14:57 +0100)]
armv8: factor out generic bit set/clr for debug registers

introduce armv8_set_dbgreg_bits() function to make register
bit-field modifications easier to read.

Change-Id: I6b06f66262587fd301d848c9e0645e8327653de7
Signed-off-by: Matthias Welwarsky <matthias.welwarsky@sysgo.com>
Reviewed-on: http://openocd.zylin.com/3989
Tested-by: jenkins
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
3 years agoarmv8: load aarch32 register through aarch64 equivalent 88/3988/3
Matthias Welwarsky [Sun, 27 Nov 2016 10:39:47 +0000 (11:39 +0100)]
armv8: load aarch32 register through aarch64 equivalent

The aarch32 register cache is only a separate view of the aarch64
registers. Load aarch32 registers through their aarch64 equivalents.

Change-Id: I3e932dfb782f03d73d30d942b24db340a5749e47
Signed-off-by: Matthias Welwarsky <matthias.welwarsky@sysgo.com>
Reviewed-on: http://openocd.zylin.com/3988
Tested-by: jenkins
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
3 years agoaarch64: remove bogus address check before memory access 87/3987/3
Matthias Welwarsky [Sun, 27 Nov 2016 10:28:01 +0000 (11:28 +0100)]
aarch64: remove bogus address check before memory access

Mmu faults can not be prevented on aarch64, they need to be taken and
handled accordingly. Remove the remaining stub code.

Change-Id: I6241efa594fe6b963624f9628cdf1c8e46588223
Signed-off-by: Matthias Welwarsky <matthias.welwarsky@sysgo.com>
Reviewed-on: http://openocd.zylin.com/3987
Tested-by: jenkins
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
3 years agotarget: generic ARM CTI function wrapper 86/3986/3
Matthias Welwarsky [Sat, 19 Nov 2016 09:02:34 +0000 (10:02 +0100)]
target: generic ARM CTI function wrapper

Not specific to ARMv8, the Cross Trigger Interface
deserves an independent access wrapper.

Change-Id: I84f8faad15ed3515e0fff7f6cc5d1109ef91a869
Signed-off-by: Matthias Welwarsky <matthias.welwarsky@sysgo.com>
Reviewed-on: http://openocd.zylin.com/3986
Tested-by: jenkins
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
3 years agoaarch64: optimize core state detection 85/3985/2
Matthias Welwarsky [Tue, 15 Nov 2016 21:10:03 +0000 (22:10 +0100)]
aarch64: optimize core state detection

Replace loop by right-shift.
Inspired by patch from Alamy Liu

Change-Id: I1285f4f54c0695a93fa42e9863ed8ffa4de00f70
Signed-off-by: Matthias Welwarsky <matthias.welwarsky@sysgo.com>
Reviewed-on: http://openocd.zylin.com/3985
Tested-by: jenkins
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
3 years agoaarch64: reduce debug output to improve legibility 84/3984/2
Matthias Welwarsky [Mon, 14 Nov 2016 20:54:26 +0000 (21:54 +0100)]
aarch64: reduce debug output to improve legibility

Suppress some very verbose LOG_DEBUG's that are not really useful
any more.

Change-Id: I67f10ba9510a9e34a027f378f4b62b8901ddc8a4
Signed-off-by: Matthias Welwarsky <matthias.welwarsky@sysgo.com>
Reviewed-on: http://openocd.zylin.com/3984
Tested-by: jenkins
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
3 years agoaarch64: remove mrs/msr functions from struct arm 83/3983/2
Matthias Welwarsky [Mon, 14 Nov 2016 11:23:24 +0000 (12:23 +0100)]
aarch64: remove mrs/msr functions from struct arm

No longer needed, no users.

Change-Id: I0cc82a0ef11e1b72101fa9145f014e5d5d76df0e
Signed-off-by: Matthias Welwarsky <matthias.welwarsky@sysgo.com>
Reviewed-on: http://openocd.zylin.com/3983
Tested-by: jenkins
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
3 years agoaarch64: refactor SCTLR manipulation 82/3982/2
Matthias Welwarsky [Mon, 14 Nov 2016 11:18:43 +0000 (12:18 +0100)]
aarch64: refactor SCTLR manipulation

Reduce SLOCs in SCTLR retrieval and modification functions and make them
less complex.

Change-Id: Ida1a99c223743247f171b52eef80dc9886802101
Signed-off-by: Matthias Welwarsky <matthias.welwarsky@sysgo.com>
Reviewed-on: http://openocd.zylin.com/3982
Tested-by: jenkins
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
3 years agoaarch64: fix software breakpoints when in aarch32 state 81/3981/2
Matthias Welwarsky [Wed, 26 Oct 2016 15:32:43 +0000 (17:32 +0200)]
aarch64: fix software breakpoints when in aarch32 state

Use the correct opcode for Aarch32 state, both for the breakpoint
instruction itself and the cache handling functions.

Change-Id: I975fa67b1e577b54f5c672a01d516419c6a614b2
Signed-off-by: Matthias Welwarsky <matthias.welwarsky@sysgo.com>
Reviewed-on: http://openocd.zylin.com/3981
Tested-by: jenkins
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
3 years agoaarch64: Fix #include guards 75/3975/2
Marc Schink [Sun, 12 Feb 2017 09:59:49 +0000 (10:59 +0100)]
aarch64: Fix #include guards

Change-Id: I9445b04a210dcde5f8a7cf1560ef23eb53149178
Signed-off-by: Marc Schink <openocd-dev@marcschink.de>
Reviewed-on: http://openocd.zylin.com/3975
Tested-by: jenkins
Reviewed-by: Andreas Färber <afaerber@suse.de>
Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
3 years agoflash/nor: avrf: support atmega128rfa1 90/2790/2
Karl Palsson [Sun, 31 May 2015 02:18:36 +0000 (02:18 +0000)]
flash/nor: avrf: support atmega128rfa1

Tested with a Dresden Elektronik deRFmega128 module.

Change-Id: I91da3b11b60e78755360b08453ed368d6d396651
Signed-off-by: Karl Palsson <karlp@tweak.net.au>
Reviewed-on: http://openocd.zylin.com/2790
Tested-by: jenkins
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
3 years agoaarch64: don't try resuming if target is not halted 32/3832/4
Matthias Welwarsky [Fri, 21 Oct 2016 15:00:54 +0000 (17:00 +0200)]
aarch64: don't try resuming if target is not halted

At framework level, the resume hook is not protected. Make sure to
not attempt a resume if the target is not halted.

Change-Id: I4dd1975a95d6c513bd4f4e999e496bc11182a97a
Signed-off-by: Matthias Welwarsky <matthias.welwarsky@sysgo.com>
3 years agoaarch64: don't segfault on reset when target is not examined 31/3831/4
Matthias Welwarsky [Fri, 21 Oct 2016 14:59:28 +0000 (16:59 +0200)]
aarch64: don't segfault on reset when target is not examined

Basically port a fix that was already done for the cortex_a target.

Change-Id: I4cf4519159bda03ed611bc0b2e340a5dad2d85fe
Signed-off-by: Matthias Welwarsky <matthias.welwarsky@sysgo.com>
3 years agoaarch64: use cached value of dscr register where needed 30/3830/4
Matthias Welwarsky [Thu, 20 Oct 2016 15:22:26 +0000 (17:22 +0200)]
aarch64: use cached value of dscr register where needed

Instead of supplying a local, preinitialized "dscr" variable, use the
cached value from arm_dpm, which is kept up-to-date anyway.

Change-Id: I06d548d4dc6db68b9d984c83ed026fa9069d7875
Signed-off-by: Matthias Welwarsky <matthias.welwarsky@sysgo.com>
3 years agoaarch64: remove arm command chain from aarch64 target commands 29/3829/4
Matthias Welwarsky [Thu, 20 Oct 2016 15:15:00 +0000 (17:15 +0200)]
aarch64: remove arm command chain from aarch64 target commands

arm commands are mostly unusable anyway, remove them. to be replaced
by aarch64 specific commands later

Change-Id: Ie994771bc0e86cff1c26f68f1f51ce8ec352a509
Signed-off-by: Matthias Welwarsky <matthias.welwarsky@sysgo.com>
3 years agoaarch64: remove "mrs <Xt>, currentel" opcode 28/3828/4
Matthias Welwarsky [Thu, 20 Oct 2016 15:13:36 +0000 (17:13 +0200)]
aarch64: remove "mrs <Xt>, currentel" opcode

"currentel" special register is not accessible in debug state.

Change-Id: I9022b01b423cd9ae8227ed018d6166078ba44832
Signed-off-by: Matthias Welwarsky <matthias.welwarsky@sysgo.com>
3 years agoaarch64: remove unused struct components 27/3827/4
Matthias Welwarsky [Thu, 20 Oct 2016 15:06:13 +0000 (17:06 +0200)]
aarch64: remove unused struct components

remove unused register index array from armv8_mode_data[]

Change-Id: I686c20eeb3da413f5e9ef6058e31ce939741afb4
Signed-off-by: Matthias Welwarsky <matthias.welwarsky@sysgo.com>
3 years agoaarch64: improve debug output 26/3826/4
Matthias Welwarsky [Thu, 20 Oct 2016 14:59:21 +0000 (16:59 +0200)]
aarch64: improve debug output

Make debug and error messages more informative, fix spelling and
formatting errors

Change-Id: I7245f42c5153bcc95676270814d30e91c113aaed
Signed-off-by: Matthias Welwarsky <matthias.welwarsky@sysgo.com>
3 years agoaarch64: enlarge value buffer of arm_reg to store 64 bit 25/3825/4
Matthias Welwarsky [Thu, 20 Oct 2016 14:48:42 +0000 (16:48 +0200)]
aarch64: enlarge value buffer of arm_reg to store 64 bit

struct arm_reg::value[] must be 8 byte to hold a 64bit register value.

Change-Id: If253e90731d0ee855eafd9d7b63b91f84630cc7c
Signed-off-by: Matthias Welwarsky <matthias.welwarsky@sysgo.com>
3 years agoaarch64: consolidate sticky error handling 24/3824/4
Matthias Welwarsky [Thu, 6 Oct 2016 14:37:25 +0000 (16:37 +0200)]
aarch64: consolidate sticky error handling

Move clearing of DSCR "Sticky Error" condition to the
exception handling function. Clear once on entering debug state.

Change-Id: Iec1d09d6f2d9cdd7e92953da5ea19f3e399ca12c
Signed-off-by: Matthias Welwarsky <matthias.welwarsky@sysgo.com>
3 years agoaarch64: discard async aborts on entering debug state 23/3823/4
Matthias Welwarsky [Thu, 20 Oct 2016 14:23:40 +0000 (16:23 +0200)]
aarch64: discard async aborts on entering debug state

recommended for Corte-A8 cores, not sure if necessary
for ARMv8 based cores as well.

Change-Id: Ibcb36170c5fac6a6b132de17f734c70a56919f9b
Signed-off-by: Matthias Welwarsky <matthias.welwarsky@sysgo.com>
3 years agoaarch64: cleanup context restore 22/3822/4
Matthias Welwarsky [Thu, 20 Oct 2016 13:39:30 +0000 (15:39 +0200)]
aarch64: cleanup context restore

Remove register cache invalidation and target state changes that are
handled appropriately in other functions.

Change-Id: Ic903f41ddc267f4b8765ea022bd4d6da1017e21f
Signed-off-by: Matthias Welwarsky <matthias.welwarsky@sysgo.com>
3 years agoaarch64: enable aarch32 debugging with arm gdb 21/3821/4
Matthias Welwarsky [Thu, 20 Oct 2016 13:36:19 +0000 (15:36 +0200)]
aarch64: enable aarch32 debugging with arm gdb

When a PE is in Aarch32 state and gdb asks for a target description,
provide a register view compatible with the "org.gnu.gdb.arm.core"
feature. Only current-mode registers are exported, banked registers are
not visible.

Change-Id: I99a85d94831cf597fe8cff6a0a1818ce0a33613b
Signed-off-by: Matthias Welwarsky <matthias.welwarsky@sysgo.com>
3 years agoaarch64: allow reading TTBR register when halted in EL0 20/3820/4
Matthias Welwarsky [Thu, 20 Oct 2016 12:46:11 +0000 (14:46 +0200)]
aarch64: allow reading TTBR register when halted in EL0

There's no access to TTBR in EL0. Circumvent by moving the PE to EL1
before reading, and switch back to original mode afterwards.

Change-Id: I22891b958d3d7e6fad1cb27183c192d975d63d89
Signed-off-by: Matthias Welwarsky <matthias.welwarsky@sysgo.com>
3 years agoaarch64: make sure to enable HDE for all SMP PEs to be halted 19/3819/4
Matthias Welwarsky [Thu, 20 Oct 2016 11:59:35 +0000 (13:59 +0200)]
aarch64: make sure to enable HDE for all SMP PEs to be halted

When halting a group of PEs through CTI, HDE must be set in EDSCR for
all of them.

Change-Id: Iaa4bc0b0fe31e46a463c709d8274023225affd85
Signed-off-by: Matthias Welwarsky <matthias.welwarsky@sysgo.com>
3 years agoaarch64: handle exceptions taken in debug state 18/3818/4
Matthias Welwarsky [Thu, 20 Oct 2016 11:37:11 +0000 (13:37 +0200)]
aarch64: handle exceptions taken in debug state

When an armv8-a PE causes an exception while halted, e.g. by performing
a prohibited memory or register access, its state is affected in the
same way as if it was running. That means, a number of registers is
overwritten (notably DLR and DSPSR, but also others) and also
potentially the exception level and therefore also the PE state can
change. This state must be restored before resuming normal operation.

This is done by marking the relevant cached registers "dirty" so that
they are written back before resume.

Change-Id: I9b6967a62d7cb23a477a9f7839f8d2b7087eed09
Signed-off-by: Matthias Welwarsky <matthias.welwarsky@sysgo.com>
3 years agoaarch64: cache identification for aarch32 state 17/3817/4
Matthias Welwarsky [Thu, 20 Oct 2016 11:20:26 +0000 (13:20 +0200)]
aarch64: cache identification for aarch32 state

Use proper T32 opcodes for cache identification when the PE is in
Aarch32 state

Change-Id: I9cd9169409889273a3fd61167f388e68d8dde86d
Signed-off-by: Matthias Welwarsky <matthias.welwarsky@sysgo.com>
3 years agoaarch64: fix mode switching 16/3816/4
Matthias Welwarsky [Thu, 20 Oct 2016 09:31:40 +0000 (11:31 +0200)]
aarch64: fix mode switching

DCPS only allows to enter higher ELs, for lower ELs you need to
use DRPS. Also, of course the encoding differs between A64 and T32.
Both DCPS and DRPS also clobber DLR and DSPSR, which then need to be
restored on resume.

Change-Id: Ifa3dcfa94212702e57170bd59fd0bb25495fb6fd
Signed-off-by: Matthias Welwarsky <matthias.welwarsky@sysgo.com>
3 years agoaarch64: register access rewrite 15/3815/4
Matthias Welwarsky [Thu, 6 Oct 2016 14:10:38 +0000 (16:10 +0200)]
aarch64: register access rewrite

All register access is now performed through common read/write
functions, which delegate the actual register access to the
armv8_common object. armv8_common contains function pointers
to direct read and write requests to the respective low-level
functions for each PE state.

The respective read/write functions are selected on debug state
entry.

At the same time, T32 opcodes are now formatted for ITR in
dpmv8_exec_opcode() and the T32_FMTITR macro is removed from global
visibility.

Change-Id: I9eaef017c7cc9e0c531e693c534901bfdbdb842c
Signed-off-by: Matthias Welwarsky <matthias.welwarsky@sysgo.com>
3 years agoaarch64: simplify armv8_read_ttbcr 14/3814/4
Matthias Welwarsky [Thu, 6 Oct 2016 14:36:29 +0000 (16:36 +0200)]
aarch64: simplify armv8_read_ttbcr

Read registers based on current EL instead of PE mode.

Change-Id: I05d3219ac1bf8585e9f4f024a7e8599fea0913b6
Signed-off-by: Matthias Welwarsky <matthias.welwarsky@sysgo.com>
3 years agoaarch64: allow reading system control register when halted in EL0 13/3813/4
Matthias Welwarsky [Thu, 6 Oct 2016 14:19:20 +0000 (16:19 +0200)]
aarch64: allow reading system control register when halted in EL0

There's no access to system control register in EL0. Circumvent by
moving the PE to EL1 before reading, and switch back to original mode
afterwards.

Change-Id: I309f4eea5597ffc88fc892e9bbb826982e8a44ec
Signed-off-by: Matthias Welwarsky <matthias.welwarsky@sysgo.com>
3 years agoaarch64: simplify armv8_set_cpsr() 12/3812/4
Matthias Welwarsky [Thu, 6 Oct 2016 14:11:19 +0000 (16:11 +0200)]
aarch64: simplify armv8_set_cpsr()

Translate from cpsr value to "enum arm_mode" by shifting up 4 bits and
filling the lowest nibble with 0xF.

Change-Id: Ic32186104b0c29578c4f6f99e04840ab88a0017b
Signed-off-by: Matthias Welwarsky <matthias.welwarsky@sysgo.com>
3 years agoaarch64: provide virt2phys command 11/3811/4
Matthias Welwarsky [Thu, 6 Oct 2016 13:05:53 +0000 (15:05 +0200)]
aarch64: provide virt2phys command

Use AT commands to translate virtual to physical addresses based on
current MMU configuration.

Change-Id: I1bbd7d674c435541b617b17022fa9f7f0f01bdab
Signed-off-by: Matthias Welwarsky <matthias.welwarsky@sysgo.com>