review.openocd Code Review - openocd.git/log

Kinetis: FlexNVM handling

FlexNVM (data flash) is memory mapped at 0x10000000.
Driver used to send the same address to FTFx controller for erase/write ops.
This was wrong as FTFx accepts only low 24 bits of address.
To fix addressing for flash controller kinfo->prog_base was introduced.

Added FlexNVM protection check, blank check and data flash size calculation.
Blank check cannot use block operation on FlexNVM when EEPROM backup is enabled.

Removed non functional reassign logic and bank_ordinal stuff.
Now one can re-probe FlexNVM banks after nvm_partition change.

Change-Id: Ia60b938266963e5d056701278cdf7bf2f62a429a
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/2987
Tested-by: jenkins

Add board config for ST NUCLEO L476RG board

The file was contributed by Sébastien Lorquet.

Change-Id: I118f5b16181488b9e3327891e6130b908419f1c4
Signed-off-by: Freddie Chopin <freddie.chopin@gmail.com>
Reviewed-on: http://openocd.zylin.com/3214
Tested-by: jenkins
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>

jlink: Update for libjaylink API changes

This patch also addresses a problem with devices where no serial
number is available. For further details, see:

http://repo.or.cz/libjaylink.git/commit/7e0508d8487f65f71411117dff2e0b093e00bc80

Such devices are now ignored if device selection via serial number is
used.
Nevertheless, these devices are still usable by using the USB address
for device selection or just by omitting device selection. The latter
one is only possible if only one device is connected.

Change-Id: I5763db25e97ba3d924cb642da7e64e951e09ecb7
Signed-off-by: Marc Schink <openocd-dev@marcschink.de>
Reviewed-on: http://openocd.zylin.com/3225
Tested-by: jenkins
Reviewed-by: Nemui Trinomius <nemuisan_kawausogasuki@live.jp>
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>

cmsis-dap: Fix CMSIS-DAP serial number processing.

Check CMSIS-DAP adapter has serialnumber before pass it to wcscmp.
Keep looking for onother adapter if choosed one doesn't have correct
serialnumber.

Change-Id: I7d386a03cb49b9baf22073ae1c6b14269ed3b618
Signed-off-by: Andrii Anpilogov <anpilog@gmail.com>
Reviewed-on: http://openocd.zylin.com/3226
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>

add Digilent HS2 support

Change-Id: If506c33f22d95f4c47f30c4348d461197c976fdd
Signed-off-by: Paul Fertser <fercerpav@gmail.com>
Reviewed-on: http://openocd.zylin.com/3160
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>

flash: nor: nrf51: add hwid 0x0057

Change-Id: I43b9dc1ce254a8ee8c84ad8e25bb809eb8629e13
Signed-off-by: Jacob Rosenthal <jakerosenthal@gmail.com>
Signed-off-by: Paul Fertser <fercerpav@gmail.com>
Reviewed-on: http://openocd.zylin.com/3102
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>

cfi: support for 16-bit flash with reversed endianness

This is for targets where flash controller has reverse endianness
compared to target. For these, the 'bus_swap' parameter can be given to the
CFI driver, which will cause command CFI commands to be written with
bytes swapped. This is only for x16 CFI flash.

Change-Id: I698b768e92e65d160232e90b0e81a824e3c81a46
Signed-off-by: Esben Haabendal <esben@haabendal.dk>
Reviewed-on: http://openocd.zylin.com/3041
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>

Change isa string

Laying the ground work for adding microAptiv core

Change-Id: I161a8a8cb250240ebc8518c91e746d6f921c41c7
Signed-off-by: Kent Brinkley <jkbrinkley.imgtec@gmail.com>
Reviewed-on: http://openocd.zylin.com/2400
Tested-by: jenkins
Reviewed-by: Mindy Beseler <mbeseler@yahoo.com>
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>

jtag ftdi: sample TDO on falling edge of TCK

Due to signal propagation delays, sampling TDO on rising TCK can become
quite peculiar at fast TCK rates. However, FTDI chips offer a possiblity
to sample TDO on falling edge. With this change, stable operation can be
achieved at 30MHz clock even over 10cm ribbon cable.

Change-Id: Icaf240535dae15512e3c60a944e22a5fbc1b0b06
Signed-off-by: Matthias Welwarsky <matthias@welwarsky.de>
Reviewed-on: http://openocd.zylin.com/3180
Tested-by: jenkins
Reviewed-by: Paul Fertser <fercerpav@gmail.com>

flash/nor/spi: reorder to group micron devices

Change-Id: Ic5b13e8b994d0741a0a12cd7ed427191b42958e2
Signed-off-by: Robert Jordens <jordens@gmail.com>
Reviewed-on: http://openocd.zylin.com/3207
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>

quark: add Intel Quark mcu D2000 support

Add support for the Intel Quark mcu D2000 using the new quark_d2xx
target.

Changes to the lakemont part are needed for the D2000 core and
backwards compatible with the X1000 one.

Change-Id: I6e1ef5a5d116344942f08e413965abd3945235fa
Signed-off-by: Ivan De Cesaris <ivan.de.cesaris@intel.com>
Reviewed-on: http://openocd.zylin.com/3199
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>

Helper time_support: const function arguments

duration_elapsed and duration_kbps will not modify the struct duration
passed as function argument, hence it should be declared const.

Change-Id: I459c396952c78e907257e2c2f2c630abde92aaa8
Signed-off-by: Alexander Kurz <akurz@blala.de>
Reviewed-on: http://openocd.zylin.com/3232
Tested-by: jenkins
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>

adi_v5_swd: invalidate dap->select during (re)connect

Commit 830d0c55c0920606366a15560d1945f1e1942744 introduced
a regression in error recovery after reconnect:
If first SWD queue run in dap_dp_init() fails, DP_SELECT
does not get reset.

Change-Id: I947e2afe9933e4645a6141ece7816af8e6082cf2
Signed-off-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-on: http://openocd.zylin.com/3194
Tested-by: jenkins
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>

tcl: Support for the miniSpartan6+ board.

* https://www.scarabhardware.com/minispartan6/
* https://github.com/scarabhardware/miniSpartan6-plus/raw/master/miniSpartan6%2B_Rev_B.pdf

The miniSpartan6+ board is wired identically to the Pipistrello device but
sadly doesn't have a custom device description.

Change-Id: I07fd57b1ec87d72edf68860684928a3781e2f08a
Signed-off-by: Tim 'mithro' Ansell <mithro@mithis.com>
Reviewed-on: http://openocd.zylin.com/3117
Tested-by: jenkins
Reviewed-by: Paul Fertser <fercerpav@gmail.com>

tlc/board: Add ATMEL SAM E70 Xplained config

atmel_same70_xplained config using on board embedded debuger

Change-Id: I650ec538b42653662bc273e9f3581a6eda95cd39
Signed-off-by: Manuel Limones <limonesu.me@gmail.com>
Reviewed-on: http://openocd.zylin.com/3208
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>

flash: nor: {pic32mx,cfi}: fix register names

Commit fd43be07265b5f3cf3146f2bb80c1c2fc0a44fcf introduced a
regression: since the register names were changed from those
traditional for MIPS to common GDB scheme the code that makes use of
them needs to be changed accordingly.

This commit restores pic32mx flash driver functionality.

Change-Id: Id18c739390fae36737a02dc30c363d0444f53b96
Reported-by: Louis Rannou <louson@users.sf.net>
Signed-off-by: Paul Fertser <fercerpav@gmail.com>
Reviewed-on: http://openocd.zylin.com/3206
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>

flash/nor/niietcm4: minor fixes

niietcm4_write() buffer padding:
add correct buffer padding for 16 bytes.

Args check in FLASH_BANK_COMMAND_HANDLER():
first version of the driver had 7 args, current - 6. This patch will fix
error when flash is rejected (current k1921vk01t.cfg has flash bank init
with 6 args).

Timeouts in flash flag checking procedure:
increase timeouts in niietcm4_opstatus_check() and niietcm4_uopstatus_check()
cause there were problems in some hardware configurations.

JTAG ID:
wrong id in k1921vk01t.cfg replaced with right one.

Signed-off-by: Bogdan Kolbov <kolbov@niiet.ru>
Change-Id: I84296ba3eb4eeda4d4a68b18c94666f1269a500f
Reviewed-on: http://openocd.zylin.com/3171
Tested-by: jenkins
Reviewed-by: Paul Fertser <fercerpav@gmail.com>

helper: Add converter from JEP106 ID to manufacturer name

Use it to print the manufacturer of detected TAPs

Change-Id: Ic4384c61c7f6f7ae2a9b860a805a5997542f72cc
Signed-off-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Reviewed-on: http://openocd.zylin.com/3177
Tested-by: jenkins
Reviewed-by: Jiri Kastner <cz172638@gmail.com>
Reviewed-by: Paul Fertser <fercerpav@gmail.com>

am437x: always use highest possible JTAG clock.

With DAP WAIT support, it's no longer necessary to start with slow
JTAG clock.

Change-Id: I2cb62c44752b27e6854637e8073e9f9501f5a660
Signed-off-by: Matthias Welwarsky <matthias@welwarsky.de>
Reviewed-on: http://openocd.zylin.com/3190
Tested-by: jenkins
Reviewed-by: Felipe Balbi <balbi@ti.com>
Reviewed-by: Paul Fertser <fercerpav@gmail.com>

arm_adi_v5: dap_partnums - correction of partnumbers, new added

according to...
ARM DDI 0433B is:
  0x9a5 Cortex-A5 PMU
ARM DDI 0435C is:
  0x955 Cortex-A5 ETM
ARM DDI 0401C is:
  0x950 Cortex-A9 PTM
ARM DDI 0469B is:
  0x931 Cortex-R5 ETM
ARM DDI 0460D is:
  0xc15 Cortex-R5 Debug
ARM DDI 0458C is:
  0x9b7 Cortex-R7 PMU
  0xc17 Cortex-R7 Debug
ARM DDI 0535C is:
  0x95b Cortex-A17 PTM
  0x9ae Cortex-A17 PMU
  0xc0e Cortex-A17 Debug
ARM DDI 0500F is:
  0x9a8 Cortex-A53 CTI
  0x95d Cortex-A53 ETM
  0x9d3 Cortex-A53 PMU
  0xd03 Cortex-A53 Debug
ARM DDI 0488G is:
  0x906 Cortex-A57/A72 CTI
  0x95e Cortex-A57 ETM
  0x9d7 Cortex-A57 PMU
  0xd07 Cortex-A57 Debug
ARM 100095_0002_03_en is:
  0x95a Cortex-A72 ETM
  0x9d8 Cortex-A72 PMU
  0xd08 Cortex-A72 Debug

Change-Id: Ieffefb30f2e75c45fe1a2f9c8204e3a9b1af3d7a
Signed-off-by: Jiri Kastner <cz172638@gmail.com>
Reviewed-on: http://openocd.zylin.com/3198
Tested-by: jenkins
Reviewed-by: Paul Fertser <fercerpav@gmail.com>

adiv5: introduce optional dap_sync() function

dap_sync() executes all commands in the JTAG queue and then checks
if a WAIT condition happened inside the last batch. If yes, a recovery
is invoked. If not, processing continues without checking for
errors. This function should be called in long AP read or writes, e.g.
while uploading a new application binary, at intermediate points within
the transfer where the cost of flushing the JTAG queue and checking the
journal doesn't affect performance too much.

Change-Id: I99eeaf47cdf951e15e589a04e74b90b5ce911386
Signed-off-by: Matthias Welwarsky <matthias@welwarsky.de>
Reviewed-on: http://openocd.zylin.com/3181
Tested-by: jenkins
Reviewed-by: Paul Fertser <fercerpav@gmail.com>

adi_v5_jtag: implement DAP WAIT support

ADIv5 specifies that DP and AP accesses may generate a WAIT
response when the hardware is not able to complete a request for various
reasons in time before the next request is sent. Currently, the software
treats a WAIT response as a fatal error and aborts operation on the DAP.

This patch implements WAIT handling by keeping a journal of all
outstanding and completed accesses, including their response status.
At certain times (when dap_run() is called), the journal is inspected
for WAIT responses and all discarded accesses are replayed to complete
them. Special care is taken to not re-execute already successfully
completed operations.

Change-Id: I2790070388cf1ab2e8c9a042d74eb3ef776aa583
Signed-off-by: Matthias Welwarsky <matthias@welwarsky.de>
Reviewed-on: http://openocd.zylin.com/3166
Tested-by: jenkins
Reviewed-by: Paul Fertser <fercerpav@gmail.com>

drivers: jlink: rework to allow scans of arbitrary length, bump libjaylink

Make the J-Link driver handle everything needed for FPGA programming,
this includes arbitrary long scans and STABLECLOCKS command.

Also, bump to the latest upstream libjaylink to properly support this.

This code is heavily inspired by Andreas Fritiofson's ftdi.c.

Change-Id: Ic5fd87aa88b58ff1138dc2e0a197bb52321b1541
Signed-off-by: Paul Fertser <fercerpav@gmail.com>
Reviewed-on: http://openocd.zylin.com/2946
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>

Cortex-A: Fix unicode quote in comment

Change-Id: I4747c113ab6c02199f078d9b4a4ec372d011fb2d
Signed-off-by: Evan Hunter <ehunter@broadcom.com>
Reviewed-on: http://openocd.zylin.com/3200
Tested-by: jenkins
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>

jlink: deconflict local variables from global symbols

BeagleBone debian 7 builds produce:
    jlink.c: In function 'jlink_speed':
    jlink.c:218:11: error: declaration of 'div' shadows a global declaration [-Werror=shadow]
    jlink.c: In function 'check_trace_freq':
    jlink.c:1065:54: error: declaration of 'div' shadows a global declaration [-Werror=shadow]
    jlink.c: In function 'config_trace':
    jlink.c:1101:11: error: declaration of 'div' shadows a global declaration [-Werror=shadow]

Fix this by changing the local variable to 'divider'.

Change-Id: I96a0cc0f7d4d4af5a56aa1e918e5416d3c61cbfe
Signed-off-by: Peter A. Bigot <pab@pabigot.com>
Reviewed-on: http://openocd.zylin.com/3185
Tested-by: jenkins
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>

arm_adi_v5: deconflict local variables from global symbols

BeagleBone debian 7 builds produce:
adi_v5_jtag.c: In function 'jtag_ap_q_bankselect':
adi_v5_jtag.c:336:11: error: declaration of 'select' shadows a global declaration [-Werror=shadow]

Fix this by changing the local variable to 'sel'.

Change-Id: I8e29662ac12bc77d38d5064046d59b7364853cd9
Signed-off-by: Peter A. Bigot <pab@pabigot.com>
Reviewed-on: http://openocd.zylin.com/3184
Tested-by: jenkins
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>

ARM ADIv5: CoreSight ROM decode part number and designer id

The existing arm_adi_v5.c code decodes CoreSight peripherals based
on the part number field.  However, these are specific to a
particular manufacturer (often ARM).  The same part number from
two different manufacturers (distinct designer ids) should not
decode as the same CoreSight peripheral.

The Analog Devices ADSP-SC58x and ADSP-BF70x have peripherals that
overlap with existing OpenOCD decoding.  The part number is the
same as existing OpenOCD decoding, but have a different JEP106 code.

Most, if not all, of the existing part number entries in
arm_adi_v5.c are probably specific to ARM. Change all entries
suspected to be designed by ARM to match only ARM's designer ID.

However, to preserve legacy behavior, existing non-ARM entries are
encoded with a wildcard so that they will behave in the same way as
the existing legacy code.  It is desirable, however, to start
encoding the data with designer codes to avoid such ambiguity.

Revising the code to check both the part number and designer id
seemed to a warrant a const array lookup table instead of a
multi-tiered switch statement.

Also try to sync part identification IDs with relevant ARM docs.

Change-Id: Iac1374e4cfc6f04cebb479c0e3fa9bde527cc4a3
Signed-off-by: Peter Lawrence <majbthrd@gmail.com>
[andreas.fritiofson@gmail.com: change JEP106 to designer ID, cleanup]
Signed-off-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Reviewed-on: http://openocd.zylin.com/3128
Tested-by: jenkins

libjaylink: use http mirror for submodule

The other submodules default to http for users behind firewalls.

Change-Id: I58fce00478ec6c94f75992f4e8f0c24f556abe61
Signed-off-by: Spencer Oliver <spen@spen-soft.co.uk>
Reviewed-on: http://openocd.zylin.com/3172
Tested-by: jenkins

target: cortex_m: fix segfault with HLA

The HLA target shares an examine handler with cortex_m but since it
lacks direct access to DAP, some operations need to be omitted.

Change-Id: Ifdd9d3da4a3a3c2e1c9721284b21d041b3ccaa7a
Signed-off-by: Paul Fertser <fercerpav@gmail.com>
Reviewed-on: http://openocd.zylin.com/3183
Tested-by: jenkins
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>

cortex_a: add 'dacrfixup' to cortex-a command group

work around issues with software breakpoints when the text segment
is mapped read-only by the OS. Set DACR to "all-manager" to bypass
TLB permission checks on memory access.

Change-Id: I79fd9b32b04a4d538d489896470ee30b26b72b30
Signed-off-by: Matthias Welwarsky <matthias@welwarsky.de>
Reviewed-on: http://openocd.zylin.com/3107
Tested-by: jenkins
Reviewed-by: Paul Fertser <fercerpav@gmail.com>

tcl/fpga: add config file for Altera EP3C10 FPGA (Cyclone III family)

Change-Id: I4de5156b3c43f548305f8b9a3943a727fa6f0dbe
Signed-off-by: Antony Pavlov <antonynpavlov@gmail.com>
Reviewed-on: http://openocd.zylin.com/2889
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>

AM335x: allow simultaneous debugging of A8 and M3 cores

This patch fixes the tap order so that it matches the actual jtag
chain when all taps are enabled. It also introduces a variable
DEFAULT_TAPS that can be set outside of this script, e.g. on the
command line, to specify which taps are to be enabled on init.
Lastly, a new debug target "am335x.m3" is added so that the Wakeup-M3
can be selected for debugging.

Change-Id: Iccf177fda8d5e3737b1b2bb8fd1eaa7d3262ed9f
Signed-off-by: Matthias Welwarsky <matthias@welwarsky.de>
Reviewed-on: http://openocd.zylin.com/3013
Tested-by: jenkins
Reviewed-by: Paul Fertser <fercerpav@gmail.com>

ADIv5: convert numeric values to use defines with meaningful names

Change-Id: Idb72750d0aa893119fb405eb27215cba455428a0
Signed-off-by: Evan Hunter <ehunter@broadcom.com>
Reviewed-on: http://openocd.zylin.com/2891
Tested-by: jenkins
Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
Reviewed-by: Jiri Kastner <cz172638@gmail.com>
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>

tcl/board: Add Renesas DK-S7G2 config

Tested with "J-Link OB RX621-ARM-SWD V1 compiled Nov 4 2014 10:47:22".

Change-Id: Ib64c0be407f99df57f058a4498556fd5ab7e9112
Signed-off-by: Andreas Färber <afaerber@suse.de>
Reviewed-on: http://openocd.zylin.com/3170
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>

tcl/target: Add Renesas S7G2 config

Tested with Renesas DK-S7G2M v3.0 board.

Change-Id: Ia6acaf70271ed4eb7bc4e921552cbd2ff83f6acb
Signed-off-by: Andreas Färber <afaerber@suse.de>
Reviewed-on: http://openocd.zylin.com/3169
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>

tcl/board: Add Infineon XMC4700 Relax Kit Series config

Tested with Relax Kit for 5V Shields:
J-Link Lite-XMC4200 Rev.1 compiled Oct 14 2015 10:14:50
and with Relax Lite Kit:
J-Link Lite-XMC4200 Rev.1 compiled Oct 14 2015 10:14:50

Derived from xmc4800-relax.cfg.

Change-Id: I4e10fb6ed1f85168634d3b5259d3041ffc6b74d8
Signed-off-by: Andreas Färber <afaerber@suse.de>
Reviewed-on: http://openocd.zylin.com/3130
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>

sysfsgpio: support broken gpio implementations

Change tests when reading from 'value' in sysfs from =='0' to !='1'.
This guards against broken sysfs GPIO implementations that return
non-zero for high rather than just '1' while still being clean and
correct code. Note that sysfs will never output a leading zero even
in a very broken implementation as that is covered in gpiolib.c, not
the offending driver.

Tested against broken Freescale kernel 3.14.38 on i.MX6SL.

Change-Id: Id05567bb8504b1babef33d6ee5172bceefeca8b8
Signed-off-by: Matthew Campbell <mcampbell@izotope.com>
Reviewed-on: http://openocd.zylin.com/3121
Tested-by: jenkins
Reviewed-by: Antonio Borneo <borneo.antonio@gmail.com>
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>

arm_debug: optimize DP and AP reads over JTAG

On JTAG, all reads are pipelined. If you read a register, the result is not
delivered inside the request that issued the read, it is delivered in the
following request. The current code therefore issues a scan of the RDBUFF
register after each read. This adds a superfluous transaction after each
read.

This patch follows a strategy similar to what SWD already implements.
It also leverages that all JTAG reads are pipelined, i.e. the result
will be clocked out in the next JTAG data phase, no matter if it's
READ or WRITE. Therefore it's never necessary to explicitly read RDBUFF
other than for the very last READ before a dap_run().

Change-Id: Ie40b1fef3203f0cdcb503f40dcbd2a68b0f9776c
Signed-off-by: Matthias Welwarsky <matthias@welwarsky.de>
Reviewed-on: http://openocd.zylin.com/3167
Tested-by: jenkins
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>

cortex_a: select APB-AP as the default AP

Debug initialization blindly selects AP#0 as default, which is the AHB-AP
in many cases. This sets the default for target_read/write functions.
However, AHB-AP is the wrong choice, because it bypasses caches on read
and write and also makes some peripherals inaccessible (e.g. l2 outer
caches). This patch explicitely selects the APB-AP (debug_ap) as the
default.

Change-Id: I13f9e0750186d35dcfc135c8d67d437c5884d9c4
Signed-off-by: Matthias Welwarsky <matthias@welwarsky.de>
Reviewed-on: http://openocd.zylin.com/3113
Tested-by: jenkins
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>

arm_adi_v5: Make the DAP API stateless

Remove entirely the concept of a "selected" AP that has to be maintained
between calls. All the information the DAP ops need are now provided to
each call through the AP/DAP pointer.

Consolidate the cache of the SELECT fields into one single field caching
the entire register.

Change-Id: I2e1c93ac5ee8ac38a7d680ca2c660c30093a6b87
Signed-off-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Reviewed-on: http://openocd.zylin.com/3165
Tested-by: jenkins
Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>

arm_adi_v5: dap_queue_ap_* DAP->AP parameter

Move the mandatory dap_ap_select() call into the dap_queue_ap_read/write
wrapper.

This avoids the need for dap_ap_select() and the notion of a "current" AP
within target code.

Change-Id: I5cde8f3eef2c662f7458be6f3b3dd44ea693bd74
Signed-off-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Reviewed-on: http://openocd.zylin.com/3164
Tested-by: jenkins
Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>

arm_adi_v5: Fix dap apsel confusing behaviour.

Make dap apsel without arguments show current state instead of changing
to AP 0.

Change-Id: I75ea10e3e1b8a067f2dc417ec6691dc7ceec1af6
Signed-off-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Reviewed-on: http://openocd.zylin.com/3163
Tested-by: jenkins
Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>

arm_adi_v5: Remove all cases of "restoring" previous dap_ap_select()

All AP operations should select the AP to use before calling it so
there's no point in restoring the previous value afterwards.

The explicit call to dap_ap_select() before all AP operations should be
moved into dap_queue_ap_read/write() which then would have to take the
AP as an argument instead of the DAP.

Change-Id: Icacb0c76ef2a5ac36b4d2f26b52ec01a8850286e
Signed-off-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Reviewed-on: http://openocd.zylin.com/3156
Tested-by: jenkins
Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>

cortex: Set default memaccess_tck only during examine

It's currently set during target creation but the AP that will be used
for the target is not even known.

Change-Id: I4502e7eb1fa8d90f746445b8cf8a4c21cb7d519e
Signed-off-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Reviewed-on: http://openocd.zylin.com/3155
Tested-by: jenkins
Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>

adi_v5_jtag: Remove TAR and CSW prints from jtagdp_transaction_endcheck

The AP for which the TAR/CSW is printed may not be the one that caused
the failure. Remove the flawed output entirely. The correct info is
printed in mem_ap_read/write anyway.

Change-Id: I97580a0662dcf02e80646e45445cdbfc251122d8
Signed-off-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Reviewed-on: http://openocd.zylin.com/3154
Tested-by: jenkins
Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>

arm_adi_v5: Remove all mem_ap_sel_* functions

All mem_ap_* functions now make sure the SELECT register is updated with
the AP number that it's operating on. This shouldn't have to be handled
explicitly.

Change-Id: Ib193d8930fabb6a25715064355f98258c9580b5d
Signed-off-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Reviewed-on: http://openocd.zylin.com/3153
Tested-by: jenkins
Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>

arm_adi_v5: Rename TAR and CSW setters and make them AP-specific

Change-Id: I0ab66b259e929e6ba826ada9cf8e35614df46410
Signed-off-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Reviewed-on: http://openocd.zylin.com/3152
Tested-by: jenkins
Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>

arm_adi_v5: Split ahbap_debugport_init

This function does two separate things, powering up the DP and setting
up a MEM-AP. But the DP needs to be powered before even searching for a
MEM-AP to initialize and targets may have multiple MEM-APs that need
initializing.

Split the function into dap_dp_init() and mem_ap_init() and change all
call sites to use the appropriate one.

Change-Id: I92f55e09754a93f3f01dd8e5aa1ffdf60c856126
Signed-off-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Reviewed-on: http://openocd.zylin.com/3151
Tested-by: jenkins
Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>

arm_adi_v5: Clean up dap info command

Reduce use of magic numbers and add AXI type MEM-AP detection. Don't try
to call dap_rom_display on a non-existent AP.

AP identification is unique per designer, so make sure the JEDEC code
matches ARM when interpreting the AP type.

Change-Id: I8e86b7de61811382afe99bf15094ab71b43f5fdf
Signed-off-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Reviewed-on: http://openocd.zylin.com/3150
Tested-by: jenkins
Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>

arm_adi_v5: Change mem_ap calls to take pointer to AP and not DAP

Change-Id: I8d3e42056aa5828cb917ca578a54b7d53846a150
Signed-off-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Reviewed-on: http://openocd.zylin.com/3149
Tested-by: jenkins
Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>

cortex_a: Find debug base using the detected APB-AP and not AP 1

Change-Id: I6b98c3b4486903029e5a0d6d964bd5c48ff55926
Signed-off-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Reviewed-on: http://openocd.zylin.com/3148
Tested-by: jenkins
Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>

arm_adi_v5: Convert the AP references from numbers to pointers

Change the debug_ap and memory_ap fields of the cortex_a target and
the debug_ap field of the cortex_m target to be pointers to the
struct adiv5_ap instead of AP numbers in some known DAP.

This reduces the dependency on the DAP struct in the targets and
enables MEM-AP accesses to take the relevant AP as parameter.

Change-Id: I39d7b134d78000564b7eec5bff464adf0ef89147
Signed-off-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Reviewed-on: http://openocd.zylin.com/3147
Tested-by: jenkins
Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>

cortex_m: Discover the AP to use, just like Cortex-A

This required fixing the AP ID parsing in dap_find_ap() to
match IHI0031C. The AXI type was added too.

Change-Id: I44577a7848df37586e650dce0fb57ac26f5f858c
Signed-off-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Reviewed-on: http://openocd.zylin.com/3146
Tested-by: jenkins
Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>

cortex_a: Call ahbap_debugport_init on the discovered AP and not 0

Change-Id: I76bb9bd800697776a375ab803402780c3c7bea35
Signed-off-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Reviewed-on: http://openocd.zylin.com/3145
Tested-by: jenkins
Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>

arm_adi_v5: Add a back-pointer from an AP to its DAP

This will make it possible to reference directly the AP used for debug
in the target instance and remove the DAP reference. This will in turn
enable getting rid of the need to select an "active" AP in the DAP (using
dap apsel).

Change-Id: I265846a427c714204f4fd3df3cdb75843686c2d0
Signed-off-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Reviewed-on: http://openocd.zylin.com/3144
Tested-by: jenkins
Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>

arm_adi_v5: Remove unused is_swd flag

Not clear what it was supposed to be used for. It probably shouldn't.

Change-Id: Ife1d833e59ba80f93876447d752a0ca7e7b57b0f
Signed-off-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Reviewed-on: http://openocd.zylin.com/3143
Tested-by: jenkins
Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>

target/arm: Remove usage of struct arm_jtag in ARMv7 targets

The Cortex-A and Cortex-M keeps an arm_jtag struct around just to be
able to pass a pointer to it to one common JTAG function which anyway
only uses the TAP field.

Refactor the function to take a TAP directly, remove the legacy struct
from cortex instances and store the TAP pointer only in the DAP.

Cortex-M makes a call to arm_jtag_setup_connection() with the struct
but the function does nothing useful for a Cortex-M target so remove
the call.

Change-Id: I3b33709ef55372ef14522ed4337e9f2e817ae3ab
Signed-off-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Reviewed-on: http://openocd.zylin.com/3142
Tested-by: jenkins
Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>

swd: Remove DAP from parameter list

Making the SWD driver aware of the DAP that controls it is a layering
violation.

The only usage for the DAP pointer is to store the number of idle cycles
the AP may need to avoid WAITs. Replace the DAP pointer with a cycle
count hint instead to avoid future misuse.

Change-Id: I3e64e11a43ba2396bd646a4cf8f9bc331805d802
Signed-off-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>
Reviewed-on: http://openocd.zylin.com/3141
Tested-by: jenkins
Reviewed-by: Paul Fertser <fercerpav@gmail.com>

arm_debug: Support multiple APs per DAP and remove DAP from armv7* structs

Separate out the values from adiv5_dap that are associated with a specific AP into a new struct, so we can properly support multiple APs. Remove the DAP struct from the armv7* structs, because we can have multiple CPUs per DAP, and we shouldn't have multiple DAP structs. Tidy up a few places where ap_current is used incorrectly.

Change-Id: I0c6ef4b49cc86b140366347aaf9b76c07cbab0a8
Signed-off-by: Patrick Stewart <patstew@gmail.com>
Reviewed-on: http://openocd.zylin.com/2984
Tested-by: jenkins
Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>

cortex_m: Select an AP when accessing the DAP

Prepare to support multiple cortex-m cores on one DAP. Uses mem_ap_sel_*
functions and removes mem_ap_* functions. Adds a new debug_ap
parameter to the cortex_m (currently set to zero as in existing code).

Change-Id: I6926029d1e7bf44a42d453d1aff349bda824ba72
Signed-off-by: Patrick Stewart <patstew@gmail.com>
Reviewed-on: http://openocd.zylin.com/2983
Tested-by: jenkins
Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>

adi_v5: return proper value on timeout

ERROR_WAIT is better than ERROR_FAIL in timeout condition.

Change-Id: Iefe837f276a9091ce6c18db5947212c449f49d89
Signed-off-by: Alamy Liu <alamy.liu@gmail.com>
Reviewed-on: http://openocd.zylin.com/2934
Tested-by: jenkins
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>

adi_v5: Rename AP_REG_* to MEM_AP_REG_* and add LA support

This is a TODO in the src/target/arm_adi_v5.h for MEM-AP registers.

Some new registers are introduced in ADIv5.2 specification.
  MEM_AP_REG_MGT    (0x20) // Memory Barrier Transfer register
  MEM_AP_REG_TAR64  (0x08) // Bits[63:32] of Transfer Address
  MEM_AP_REG_BASE64 (0xF0) // Bits[63:32] of Debug Base Address

Refer to
  7.5 MEM-AP register summary in
  IHI0031C: ARM Debug Interface Architecture Specification ADIv5.0 to ADIv5.2

Change-Id: I3bc4296a04c35f5c64f851e5865d3099922613fa
Signed-off-by: Alamy Liu <alamy.liu@gmail.com>
Reviewed-on: http://openocd.zylin.com/2904
Tested-by: jenkins
Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>

cortex-a: Fix "Detected core" number is always '0'

Problem
No matter what target->coreid is, it always shows
Detected core 0 dbgbase: ...

In dap_lookup_cs_component(), it decreases the core index value to zero
in order to find the desired core.
The reference to coreidx is necessary considering "a device which has nested
ROM tables, with each core described in its own table." (by Paul Fertser).

Change-Id: I9b56d45d6edf6639e748a625ab27787f8e5a5776
Signed-off-by: Alamy Liu <alamy.liu@gmail.com>
Reviewed-on: http://openocd.zylin.com/2902
Tested-by: jenkins
Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>

jtag: drivers: bcm2835gpio: fix a typo in informational message

Change-Id: I70176f9c623e85ba03d8e08992cade232c1bd7fd
Signed-off-by: Paul Fertser <fercerpav@gmail.com>
Reviewed-on: http://openocd.zylin.com/3176
Tested-by: jenkins
Reviewed-by: Andreas Fritiofson <andreas.fritiofson@gmail.com>

tcl/board: Add Infineon XMC4800 Relax EtherCAT Kit config

Tested with "J-Link Lite-XMC4200 Rev.1 compiled Oct 14 2015 10:14:50".

Derived from xmc4500-relax.cfg.

Change-Id: Ia1edf5cb95088ccd34e3b90570d727bbb401cbf5
Signed-off-by: Andreas Färber <afaerber@suse.de>
Reviewed-on: http://openocd.zylin.com/3129
Tested-by: jenkins
Reviewed-by: Paul Fertser <fercerpav@gmail.com>

xmc4xxx: Add XMC4800 support

Tested with EES-AA chip revision on Relax EtherCAT Kit.

Change-Id: I457f24d242e0674d1f446c03a329efadff754d6a
Signed-off-by: Andreas Färber <afaerber@suse.de>
Reviewed-on: http://openocd.zylin.com/3132
Tested-by: jenkins
Reviewed-by: Jeff Ciesielski <jeffciesielski@gmail.com>
Reviewed-by: Paul Fertser <fercerpav@gmail.com>

xmc4xxx: Make sector sizes const

They are only used to initialize the flash bank sectors and never modified.
Explicitly specify the array length while at it.

Cleanup before adding XMC4800 support.

Change-Id: I2985b9a9946b67798dbfd47d8b219d93a7ffc3da
Signed-off-by: Andreas Färber <afaerber@suse.de>
Reviewed-on: http://openocd.zylin.com/3131
Tested-by: jenkins
Reviewed-by: Jeff Ciesielski <jeffciesielski@gmail.com>
Reviewed-by: Paul Fertser <fercerpav@gmail.com>

cortex_a: fix fast-mode memory reads

cortex_a_read_apb_ab_memory_fast() uses the wrong order of ITR and DSCR
writes when setting up the transfer. ARM DDI0406C says in C8.2 regarding
"Fast mode" operation to first switch to fast mode and then latch the
instruction in ITR. Current implementation first wrote ITR, causing
the instruction to be executed immediately, then switched to fast mode
without an instruction latched. Repeated reading of DTRTX didn't
execute LDC and thus replicated its current content into the whole buffer.

This patch uses the following, revised algorithm:
1) switch to non-blocking mode and issue the LDC for the first word
2) if more than one word is to be read:
- switch to fast mode
- latch the LDC instruction into ITR (it is _not_ executed)
- issue (count-1) reads of DTRTX register, each read returns the current
content of DTRTX and re-issues the latched instruction
-> now the second-to-last word is in the buffer and the LDC for the last
word has been issued.
3) wait for the last instruction to complete
4) switch back to non-blocking mode
5) Read DTRTX for the last (or: only) word and put it into the buffer

Change-Id: I44f5c585962ffa5af257c3d5a2a802c122b6b1e4
Signed-off-by: Matthias Welwarsky <matthias@welwarsky.de>
Reviewed-on: http://openocd.zylin.com/3122
Tested-by: jenkins
Reviewed-by: Christopher Head <chead@zaber.com>
Reviewed-by: Paul Fertser <fercerpav@gmail.com>

xsvf: output a warning suggesting using SVF

Change-Id: Iff13019aa96c528268a2be029b4acd65a00a598e
Signed-off-by: Paul Fertser <fercerpav@gmail.com>
Reviewed-on: http://openocd.zylin.com/2907
Tested-by: jenkins

cortex_a: replace cortex_a_check_address function

When accessing memory through the ARM core, privilege levels and mmu
access permissions observed. Thus it depends on the current mode of the
ARM core whether an access is possible or not. the ARM in USR mode can
not access memory mapped to a higher privilege level. This means, if the
ARM core is halted while executing at PL0, the debugger would be
prevented from setting a breakpoint at an address with a higher privilege
level, e.g. in the OS kernel. This is not desirable.

cortex_a_check_address() tried to work around this by predicting if an
access would fail and switched the ARM core to SVC mode. However, the
prediction was based on hardcoded address ranges and only worked for
Linux and a 3G/1G user/kernel space split.

This patch changes the policy to always switch to SVC mode for memory
accesses. It introduces two functions cortex_a_prep_memaccess() and
cortex_a_post_memaccess() which bracket memory reads and writes. These
function encapsulate all actions necessary for preparation and cleanup.

Change-Id: I4ccdb5fd17eadeb2b66ae28caaf0ccd2d014eaa9
Signed-off-by: Matthias Welwarsky <matthias@welwarsky.de>
Reviewed-on: http://openocd.zylin.com/3119
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
Tested-by: jenkins

cortex_a: rework mmu manipulation

when disabling the mmu to access physical addresses, normally the d-cache
must be disabled as well. Disabling the d-cache also requires a full
clean&invalidate. However, since all memory writes are treated as write-
through no-allocate and memory reads do not allocate cache lines,
effectively the d-cache state does not change at all. We can therefore
save the the d-cache disabling and flushing.

This patch also simplifies the function a bit.

Change-Id: Ia17c56a28f432156429cd4596107e3652b788e63
Signed-off-by: Matthias Welwarsky <matthias@welwarsky.de>
Reviewed-on: http://openocd.zylin.com/3114
Tested-by: jenkins
Reviewed-by: Paul Fertser <fercerpav@gmail.com>

cortex_a: force cache and tlb bypass when cpu is in debug state

for minimal impact on the hardware state, force all memory accesses to
bypass the caches and tlbs. This may actually be the default, but ARM
recommends in DDI0406C to set proper default values on debug init.

Change-Id: If5ac097b6ee725c047b1e86c2f90eabe16b98c7b
Signed-off-by: Matthias Welwarsky <matthias@welwarsky.de>
Reviewed-on: http://openocd.zylin.com/3079
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
Tested-by: jenkins

armv7a: fix-up dcache clean and flush functions inner loop pattern

Other cache functions use an updated pattern for the address range loop.
Bring dcache clean and flush functions in line.

Change-Id: Iccb4a05c49054471033a3403363110cb08245d5b
Signed-off-by: Matthias Welwarsky <matthias@welwarsky.de>
Reviewed-on: http://openocd.zylin.com/3035
Tested-by: jenkins
Reviewed-by: Paul Fertser <fercerpav@gmail.com>

cortex_a: Update instruction cache after setting a soft breakpoint

Call armv7a_l1_d_cache_flush_virt() before writing the breakpoint,
to make sure the d-cache is clean and invalid at the breakpoint
location down to PoC.

Call armv7a_l1_d_cache_inval_virt() after writing the breakpoint
again, so that d-cache will pick up the modified code.
Call armv7a_l1_i_cache_inval_virt() after writing the breakpoint
to memory to make the change visible to the CPU.

Change-Id: I24fc27058d99cb00d7f6002ccb623cab66b0d234
Signed-off-by: Matthias Welwarsky <matthias@welwarsky.de>
Reviewed-on: http://openocd.zylin.com/3033
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
Tested-by: jenkins

armv7a: correctly handle invalidation of inner data caches

D-Cache invalidate is a dangerous operation. It will only work correctly
if full cache lines are invalidated. When partial cache lines are
invalidated, i.e. the target address range does not start and end
at a cache line boundary, cpu data writes outside of the target range
will be dropped. This patch adds special treatment for partial cache
lines by doing a clean & invalidate on the partial lines before
invalidating the rest of the range.

Change-Id: I64099ddb058638e990a7eb0ee911b9cc8f6f8901
Signed-off-by: Matthias Welwarsky <matthias@welwarsky.de>
Reviewed-on: http://openocd.zylin.com/3034
Tested-by: jenkins
Reviewed-by: Paul Fertser <fercerpav@gmail.com>

armv7a: fix debug messages regarding cache on/off state

Cache bits are not level specific, remove "l1" from debug message.
Also, fix data/instruction mixup in armv7a_l1_i_cache_sanity_check()

Change-Id: I259665ffe62c7ada5b4f98d3fd907e93662d4091
Signed-off-by: Matthias Welwarsky <matthias@welwarsky.de>
Reviewed-on: http://openocd.zylin.com/3028
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
Tested-by: jenkins

armv7a: rework automatic flush-on-write handling

The following changes are implemented:
- Clean&Invalidate the VA range to PoC *before* the write takes place
- Remove SMP handling since DCCIMVA instruction already maintains SMP
coherence.
- Remove separate Invalidate step

Change-Id: I19fd3cc226d8ecf2937276fc63258b6a26e369a7
Signed-off-by: Matthias Welwarsky <matthias@welwarsky.de>
Reviewed-on: http://openocd.zylin.com/3027
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
Tested-by: jenkins

armv7a: add d-cache virtual address range flush function

This patch adds a function for cleaning & invalidating a virtual
address range from the architecture caches down to the point of
coherence.

Change-Id: I4061ab023a3797fabc967f3a34498034841d52c6
Signed-off-by: Matthias Welwarsky <matthias@welwarsky.de>
Reviewed-on: http://openocd.zylin.com/3026
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
Tested-by: jenkins

armv7a: remove indirection for cache info handler

There's only one function left that handles cache info display,
no need any more for a function pointer and runtime initialization.

Change-Id: I90b09577f81607917b11f0ab5600a0e2dce223e2
Signed-off-by: Matthias Welwarsky <matthias@welwarsky.de>
Reviewed-on: http://openocd.zylin.com/3025
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
Tested-by: jenkins

armv7a: fix handling of inner caches

ARMv7 architecture allows up to 7 cache levels that are architecturally
visible, as opposed to "system caches", which are outside of the domain
defined by ARMv7 and require separate management. This patch enables
detection and identification of caches at all levels. It also implements
a new "flush-all" function that cleans & invalidates all cache levels to
the "Point of Coherence".

Change-Id: Ib77115d6044d39845907941c6f031e208f6e0aa5
Signed-off-by: Matthias Welwarsky <matthias@welwarsky.de>
Reviewed-on: http://openocd.zylin.com/3024
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
Tested-by: jenkins

armv7a: remove special l2x flush-all and cache-info handlers

This patch is on the path to unified handlers for both inner and
outer caches. It removes the special overrides installed when
an outer cache is configured.

Change-Id: I747f2762c6c8c76c700341cbf6cf500ff2a51476
Signed-off-by: Matthias Welwarsky <matthias@welwarsky.de>
Reviewed-on: http://openocd.zylin.com/3022
Tested-by: jenkins
Reviewed-by: Paul Fertser <fercerpav@gmail.com>

armv7a: rename l2_cache to outer_cache

The outer cache is not necessarily at L2 in a system. Rename functions
to make that clear.

Change-Id: Ia636a4844f50634f2bdf5cdce285febc1a47c11f
Signed-off-by: Matthias Welwarsky <matthias@welwarsky.de>
Reviewed-on: http://openocd.zylin.com/3020
Tested-by: jenkins
Reviewed-by: Paul Fertser <fercerpav@gmail.com>

armv7a: remove l1 flush all data handler

deprecated by new code.

Change-Id: Ie3db627803a6aae38a5287bd3a748a78ab084b7d
Signed-off-by: Oleksij Rempel <linux@rempel-privat.de>
Reviewed-on: http://openocd.zylin.com/2801
Tested-by: jenkins
Reviewed-by: Paul Fertser <fercerpav@gmail.com>

add armv7a_cache handlers

This patch introduces, new command set and handlers for l1 and l2x caches.

Patch set 10 folded the following changes into this one:

Ib1a2a1fc1b929dc49532ac13a78e8eb796ab4415
If8d87a03281d0f4ad402909998e7834eb4837e79
I0749f129fa74e04f4e9c20d143a744f09ef750d8

Change-Id: I849f4d1f20610087885eeddefa81d976f77cf199
Signed-off-by: Oleksij Rempel <linux@rempel-privat.de>
Signed-off-by: Matthias Welwarsky <matthias@welwarsky.de>
Reviewed-on: http://openocd.zylin.com/2800
Tested-by: jenkins
Reviewed-by: Paul Fertser <fercerpav@gmail.com>

cortex_a: add cortex_a_[read|write]_memory_ahb

Change-Id: I39c457274e1714a8d42233f7fc490fb58f5cb38e
Signed-off-by: Oleksij Rempel <linux@rempel-privat.de>
Reviewed-on: http://openocd.zylin.com/2798
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
Tested-by: jenkins

cortex_a: add cortex_a_[read|write]_buffer

Change-Id: I82011822d913aa7228f5c6262b540156494bedfe
Signed-off-by: Oleksij Rempel <linux@rempel-privat.de>
Reviewed-on: http://openocd.zylin.com/2797
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
Tested-by: jenkins

cortex_a: remove cache handlers from cortex_a_write_phys_memory

This was needed for ahb access

Change-Id: I638f45a276a593c08140b5d9d7480617aa85f096
Signed-off-by: Oleksij Rempel <linux@rempel-privat.de>
Reviewed-on: http://openocd.zylin.com/2796
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
Tested-by: jenkins

cortex_a: remove ahb support for phys_memory access

Change-Id: I5b7c21c16e95cc1a3160e356d6e64f1f8c449e6e
Signed-off-by: Oleksij Rempel <linux@rempel-privat.de>
Reviewed-on: http://openocd.zylin.com/2795
Tested-by: jenkins
Reviewed-by: Paul Fertser <fercerpav@gmail.com>

adi_v5: Fix wrong ap value

Problem
dap->ap_current is register value, not field value.
it restores invalid ap when it calls dap_ap_select(dap, ap_old) later.

* assume the current ap is 1, dap->ap_current value would be (1 << 24).
ap_old = dap->ap_current;   <-- ap_old = 1<<24 = 0x1000000.
...
dap_ap_select(dap, ap_old); <-- select 0x1000000, not 1.
* All AP registers accessing fail afterwards.

One of the reproducible case(s): CORE residents in AP >= 1
  dap_lookup_cs_component() being used to find PE(*).
  In most cases, PE would be found in AP==0, hence the problem is hidden.
  When AP number is 1, dap->ap_current would have the value of 1<<24.
  Anyone get the AP value with dap->ap_current and resotre it later would
  select the wrong AP and all accessing later would fail.

  The ARM Versatile and/or FPGA would have better chance to provide this
  kind of environment that PE residents in AP>=1. As they have an 'umbrella'
  system at AP0, and main system at AP>=1.

  * PE: Processing Element. AKA Core. See ARM Glossary at
    http://infocenter.arm.com/help/topic/com.arm.doc.aeg0014g/ABCDEFGH.html

Fix
Use dap_ap_get_select() to get ap value.
a. Retrieve current ap value by calling dap_ap_get_select();
     src/flash/nor/kinetis.c
     src/target/arm_adi_v5.c

b. The code is correct (dap->ap_current >> 24), but it's better to use
   dap_ap_get_select() so everything could be synchronized.
     src/flash/nor/sim3x.c

Change-Id: I97b5a13a3fc5506cf287e299c6c35699374de74f
Signed-off-by: Alamy Liu <alamy.liu@gmail.com>
Reviewed-on: http://openocd.zylin.com/2935
Reviewed-by: Andreas Färber <afaerber@suse.de>
Tested-by: jenkins
Reviewed-by: Tomas Vanek <vanekt@fbl.cz>
Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>

jlink: Retrieve maximum speed from device.

If supported, the maximum transport speed is now retrieved from the
device.

Change-Id: I614f405ec91cf199c851781785fd26cbd10c37a6
Signed-off-by: Marc Schink <openocd-dev@marcschink.de>
Reviewed-on: http://openocd.zylin.com/2955
Tested-by: jenkins
Reviewed-by: Spencer Oliver <spen@spen-soft.co.uk>

Improve J-Link driver and introduce libjaylink.

This patch uses libjaylink which is a library to access J-Link
devices. As other tools which are not in the scope of OpenOCD also
need to access J-Link devices a library is used. A firmware upgrade
tool and an advanced configuration tool for J-Link devices are under
development.

Further versions of libjaylink will support additional features
OpenOCD could benefit from. This includes TCP/IP as additional
possibility to connect to J-Link devices as well as power tracing and
device internal communication. The latter is used to access
peripherals on some development boards (e.g EFM32 STK and DVK).

Integration of libjaylink is realized with a git submodule like
jimtcl. As libjaylink depends on libusb-1.0 only, no additional
dependency is introduced for OpenOCD.

All low-level JTAG and SWD implementations of the current driver are
left untouched and therefore no incompabilities are to be expected.

Improvements of this patch:

* Support for more USB Product IDs, including those with the new
   scheme (0x10xx). The corresponding udev rules are also updated.
* Device selection with serial number and USB address.
* Adaptive clocking is now correctly implemented and only usable for
   devices with the corresponding capability.
* The target power supply can now be switched without the need for
   changing configuration and power cycling the device.
* Device configuration is more restrictive and only allowed if the
   required capabilities are available.
* Device configuration now shows the changes between the current
   configuration of the device and the values that will be applied.
* Device configuration is verified after it is written to the device
   exactly as the vendor software does.
* Connection registration is now handled properly and checks if the
   maximum number of connections on a device is reached. This is also
   necessary for devices which are attached via USB to OpenOCD as
   some device models also support connections on TCP/IP.
* Serial Wire Output (SWO) can now be captured. This feature is not
   documented by SEGGER however it is completely supported by
   libjaylink.

This patch and libjaylink were tested on Ubuntu 14.04 (i386),
Debian 7 (amd64), FreeBSD 10.0 (amd64) and Windows XP SP3 (32-bit)
with the following device and target configurations:

* JTAG: J-Link v8.0, v9.0 and v9.3 with AT91SAM7S256
* SWD: SiLabs EFM32 STK 3700 (EFM32GG990F1024)
* SWD: J-Link v8.0, v9.0 and v9.3 with EFM32GG990F1024
* SWD: XMC 2Go (XMC1100)
* SWD: XMC1100 Boot Kit (XMC1100)
* SWD: IAR Systems / Olimex Eval Board (LPC1343F)
* SWD: Nordic Semiconductor nRF51 Dongle (nRF51422)
* SWD: SiLabs EZR32 WSTK 6220A (EZR32WG330FG60G)

Except for Windows XP all builds are tested with Clang in addition to
GCC. This patch and libjaylink are not tested on OSX yet.

Change-Id: I8476c57d37c6091c4b892b183da682c548ca1786
Signed-off-by: Marc Schink <openocd-dev@marcschink.de>
Reviewed-on: http://openocd.zylin.com/2598
Tested-by: jenkins
Reviewed-by: Andreas Färber <afaerber@suse.de>
Reviewed-by: Paul Fertser <fercerpav@gmail.com>
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>

flash/nor/lpc2000: add alternative part ID for LPC1343

http://support.code-red-tech.com/CodeRedWiki/DebugAccessChip
> Note that once you have recovered debug access to your MCU, then in most cases you should then modify your Debug Configuration to turn vector catch off again. If this is not done, then this can cause problems in some circumstances with some versions of the Code Red IDE. For example with NXP LPC13xx parts, connecting more than once to the MCU with vector catch enabled can lead to the part ID being incorrectly read - which can again cause debug connections to fail
This patch adds an alternative part ID for LPC1343. With this patch "program" command works fine for flashing.

Change-Id: I8632e898a4c33102455925d25715b4f4edfa1d97
Signed-off-by: Jakub Kubiak <jakub@kubiak.es>
Reviewed-on: http://openocd.zylin.com/2782
Tested-by: jenkins
Reviewed-by: Andreas Färber <afaerber@suse.de>
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>

niietcm4: support for NIIET's Cortex-M4 microcontrollers

This adds docs, example config, flash driver.
Driver is only supports K1921VK01T model for now.

Change-Id: I135259bb055dd2df1a17de99f066e2b24eae1b0f
Signed-off-by: Bogdan Kolbov <kolbov@niiet.ru>
Reviewed-on: http://openocd.zylin.com/3011
Tested-by: jenkins
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>

efm32: remove duplicate part name decoding.

The probe and info methods had duplicate sections decoding family names
to generate a human friendly part name. Extract this to a common
helper.

Change-Id: I4c6309d83c601e154b7c14ad9c15c53854ee1e98
Signed-off-by: Karl Palsson <karlp@tweak.net.au>
Reviewed-on: http://openocd.zylin.com/2932
Tested-by: jenkins
Reviewed-by: Andreas Färber <afaerber@suse.de>
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>

efm32: basic Happy Gecko target support

Basic basic support to get running, magic numbers taken from revision
0.90 of the reference manual.

Signed-off-by: Karl Palsson <karlp@tweak.net.au>
Change-Id: Iff6ab94d30698f056ef09f7a856b7285fed8f441
Reviewed-on: http://openocd.zylin.com/2931
Tested-by: jenkins
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>

jtag: commands: save a pointer to list tail

By saving a pointer to the tail of the list,
we don't need to traverse the entire command
queue before we're able to append an item to
it.

With this patch, I see a 10% improvement when
using the embedded XDS100v2 on AM437x IDK board
to load a 4MiB binary (linux zImage) to DDR
with load_image.

IOW, we went from ~305kB/sec to ~336kb/sec.

Change-Id: Idb55d49f0d0106043374ab520b2f3b6b32f2c50f
Signed-off-by: Felipe Balbi <balbi@ti.com>
Reviewed-on: http://openocd.zylin.com/2709
Tested-by: jenkins
Reviewed-by: Stian Skjelstad <stian@nixia.no>
Reviewed-by: Daniele Emancipato <daniele12457@hotmail.com>
Reviewed-by: Matthias Welwarsky <matthias@welwarsky.de>
Reviewed-by: Freddie Chopin <freddie.chopin@gmail.com>

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